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manual_slop/docs/twitter
ed aef260d907 docs(twitter): add 1859395250537595016 corpus (NOTimothyLottes hard-core shader dev mega-thread)
33-post thread, 13 PNGs, the canonical 'shader dev' walkthrough. Reads
FXAA 3.11 / FSR1 / Unity STP, names the permutations pattern (32-bit /
packed 16-bit / implicit mediump / MIN-MAX sampling). DXIL no bitfield
ops vs SPIR-V (HLSL pre-processing on non-Xbox = fail). 16-bit
perf: don't permute from 32-bit float constants (instant PC perf
death), alias FP16 as UINT32 binary blobs. Designing shaders like
GPU assembly, AMD RDNA2 as the design target. Defines map logic to
associated instruction (fma, bitfieldExtract), all-ints-unsigned
convention with SI1_I1()-style bitcast macros, 3-letter type macros.
Compiler pattern-match bugs: tried always-UINT4 bitcast, didn't
work; native types except waveops. Argument passing SSA state
explosion: inout uint4[16] (all VGPRs) didn't end well - shader langs
support globals, use them. Next level: mostly globals with type-
bitcast aliasing; x86-64 union-of-structs-on-globals as the GPU
calling ABI. Foundation for the SPIR-V-from-data + cart-file work
(Aug 2025).
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