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21-post thread, 0 media, 20 numbered GPU tips - the earliest
NOTimothyLottes thread in the corpus. Highlights:
[0] Normalization 'rsq(0)=INF*0=NaN' -> 'normalize_safe(x){return x*min(MAX_FLOAT,rsq(dot(x,x)));}'
[1] FP16 1/denormals -> INFs -> NaNs; fix 'rcp(max(x,SMALLEST_NORMAL))'
[2] 'spirv-opt -Os' against IHV compile times
[3] Driver ignoring '[[dont_unroll]]' workaround via constantBuffer.zero
[4-5] 'Ship-One-Shader' = one SPIR-V binary + specialization constants at PSO gen (requires spirv-opt -Os)
[6-8] Bit masking: signed 'bitfieldExtract(int(v),bit,1)' to all-0/1 mask; AMD 'Bfi' as '(ins&mask)|(src&(~mask))'; bitfieldInsert hits V_BFI_B32 portable
[9] clamp = med3 on AMD (V_MED3_* non-portable)
[10-11] Bool-as-float: 'saturate(a*b+c)' for AND|OR, '(-a)*b+1.0' for NAND
[12] INF-to-NaN: 'x*0.0+x'
[13-15] Semi-persistent workgroups (4x 8x8 tiles in 16x16 footprint, 64-wide group) - up to 10% perf on AMD, gains via L0 retention, no wait-for-store on exit
[16-17] Merge passes to avoid DRAM round-trips; serial dependent passes can be merged into one shader for >10% L2-resident gains
[18-19] Packed 16-bit double-rate: up to 30% (except NV); even without, 16-bit manages register pressure esp with smaller HW limits or compiler troubles