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1.8 KiB
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44 lines
1.8 KiB
Markdown
← [Back to Twitter thread index](../README.md)
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---
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title: "SAR on a control word can in theory grab 3 values."
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author: "NOTimothyLottes"
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handle: "@NOTimothyLottes"
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post_url: "https://x.com/NOTimothyLottes/status/2077241596869751029"
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post_id: "2077241596869751029"
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timestamp: "2026-07-15 03:59:24"
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post_count: 5
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reply_count: 0
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repost_count: 0
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like_count: 2
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view_count: 428
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---
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# @NOTimothyLottes — SAR on a control word can in theory grab 3 values.
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## Post 1 (2026-07-15 02:51:51)
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One advantage of SAR (aka signed '>>') is that the shift-by operand HW uses only the 5|6 LSBs automatically. So if you have a mixed used control word, you don't have to mask out the MSBs. Can save an instruction.
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## Post 2 (2026-07-15 02:54:50) — reply to Post 1
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Working through an idea of a single uber-instruction interpreted language for code generation. Meaning something that never misses the instruction cache and executes fully out of the micro-op cache. Fully data driven with a direct map 64k entry symbol table.
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## Post 3 (2026-07-15 03:03:02) — reply to Post 2
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Borrows some ideas from SIMD GPU programming. Like instead of branching/predicating to avoid stores, just store to a discarded area (like a negative offset on the GPU, or a designated trash address on the CPU).
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## Post 4 (2026-07-15 03:31:21) — reply to Post 3
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Don't want exit condition logic in the infinite loop, so exit will have to be having the program store an exit value into a set address, and an external watchdog polling for exit at some sleep frequency.
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## Post 5 (2026-07-15 03:59:24) — reply to Post 4
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SAR on a control word can in theory grab 3 values.
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SF (sign flag) is set to MSB bit
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CF (carry flag) is set to what shifts into bit -1
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and output
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The SF and CF can be used for CMOVcc
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Output can be used for another shift (after CMOVccs)
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