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ed a6229e9308 docs(twitter): add 1687062786273062912 corpus (NOTimothyLottes SPC 8-deep swap BO + 3-thread load)
5-post thread, 2 JPGs, 2023-08-03. SPC: 8-deep swap all aliasing same
BO (image) fixes Game Mode crash with external display. Pipelined
load: 2 ms to black screen; 460 ms to allocate 4 GiB GTT video RAM;
558 ms to copy 256 MiB cart from page cache to USWC (page faults),
all in parallel. Cold-launch worst case (cache cleared): 1.5 sec
to read 256 MiB from stock SSD; no compile after this, 'literally
in game at this point.' 3-thread load: (1.) X11 then spin present/
keyboard, (2.) AMDgpu device open + SDMA after CART read then
dispatch, (3.) CART disk->USWC GTT read(). SSD needs linear reads
to be fast so don't manually thread read(). Sibling to SPC project
intro (1687257354490818561).
2026-07-27 13:01:26 -04:00

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"post_id": "1687062786273062912",
"author": "NOTimothyLottes",
"handle": "NOTimothyLottes",
"text": "SPC: Using 8 deep swap all aliasing same BO (image) fixes Game Mode crash with external display. Pipelined load gets to black screen in 2 ms. Takes 460 ms to allocate 4 GiB GTT video ram, 558 ms to copy 256 MiB cart from page cache to USWC (page faults), all in parallel.",
"timestamp": "2023-08-03 11:28:07",
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"post_id": "1687065863512285185",
"author": "NOTimothyLottes",
"handle": "NOTimothyLottes",
"text": "Clearing page cache to simulate a cold launch: Takes 1.5 sec to read 256 MiB from the stock SSD. This is worst case load time in desktop mode. Won't be any compile/etc after this. So literally in game at this point. Speed of light. This is how it is done.",
"timestamp": "2023-08-03 11:40:20",
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"post_id": "1687066126268674048",
"author": "NOTimothyLottes",
"handle": "NOTimothyLottes",
"text": "Forgot the timing capture ... Load from SSD.",
"timestamp": "2023-08-03 11:41:23",
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"post_id": "1687068433584738304",
"author": "NOTimothyLottes",
"handle": "NOTimothyLottes",
"text": "There are only 3 threads on load: (1.) to open X11 then spin doing present/keyboard, (2.) to open the AMDgpu device, SDMA copy after CART read, and then eventually spin doing dispatchs, (3.) one to load the CART from disk to mapped USWC GTT via read().",
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"post_id": "1687069108355866625",
"author": "NOTimothyLottes",
"handle": "NOTimothyLottes",
"text": "Something I don't know: does read() since it's kernel- side automatically get some multi-core parallelism? Not a good idea to manually thread the read() because SSD needs linear reads to be fast. Not possible to know if the reads are page cache hits in advance either ...",
"timestamp": "2023-08-03 11:53:14",
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