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TimothyLottes
2016-11-09 18:24:08 -05:00
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20161005.html
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<html><head><link rel="stylesheet" href="style.css"></head><body><div class="page">
<h1>20161005 - Epiphany-V Taped Out</h1>
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<a href="https://www.parallella.org/2016/10/05/epiphany-v-a-1024-core-64-bit-risc-processor/">Epiphany V Tape Out Page</a><br>
<a href="https://www.parallella.org/wp-content/uploads/2016/10/e5_1024core_soc.pdf">Epiphany-V: A 1024 processor 64-bit RISC System-On-Chip PDF</a><br>
Looks like it does 2 32-bit d = a * b + c floating point operations, or 4096 flops/clock.<br>
If they hit 1 GHz they would be around 4 Tflop/s with 64 MB of on-chip memory.<br>
In 16nmFF+ with 117 mm^2 area, with 4.56 B transistors.<br>
Looks quite disruptive.<br>
NV's 1080 in 16nmFF+ is nearly 3x area for maybe only around 2x the flops, with a lot less on-chip memory.<br>
</div></body></html>
index.html
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<a href="20161013.html">20161013 - SymbOS - 8-bit OS Awesome Sause</a><br>
<a href="20161012.html">20161012 - Technical Evaluation of Traditional vs New "HDR" Encoding Crossed With Display Capability</a><br>
<a href="20161011.html">20161011 - Forth Hardware Thoughts</a><br>
<a href="20161005.html">20161005 - Epiphany-V Taped Out</a><br>
<a href="20160715.html">20160715 - LED Displays</a><br>
<a href="20160127.html">20160127 - Temporal AA Neighborhood Clamp</a><br>
<br>