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remove x86 register code

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This commit is contained in:
Nikita Smith
2025-12-05 16:39:02 -08:00
parent ce77442d37
commit 8005c31276
23 changed files with 31 additions and 1625 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/regs/generated/regs.meta.c
+3 -312
View File
@@ -10,7 +10,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = sizeof(REGS_RegBlockX64);}break;
case Arch_x86:{result = sizeof(REGS_RegBlockX86);}break;
}
return result;
}
@@ -21,7 +20,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = REGS_RegCodeX64_COUNT;}break;
case Arch_x86:{result = REGS_RegCodeX86_COUNT;}break;
}
return result;
}
@@ -32,7 +30,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = REGS_AliasCodeX64_COUNT;}break;
case Arch_x86:{result = REGS_AliasCodeX86_COUNT;}break;
}
return result;
}
@@ -43,7 +40,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = regs_g_reg_code_x64_string_table;}break;
case Arch_x86:{result = regs_g_reg_code_x86_string_table;}break;
}
return result;
}
@@ -54,7 +50,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = regs_g_alias_code_x64_string_table;}break;
case Arch_x86:{result = regs_g_alias_code_x86_string_table;}break;
}
return result;
}
@@ -65,7 +60,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = regs_g_reg_code_x64_rng_table;}break;
case Arch_x86:{result = regs_g_reg_code_x86_rng_table;}break;
}
return result;
}
@@ -76,7 +70,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = regs_g_alias_code_x64_slice_table;}break;
case Arch_x86:{result = regs_g_alias_code_x86_slice_table;}break;
}
return result;
}
@@ -87,7 +80,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = regs_g_reg_code_x64_usage_kind_table;}break;
case Arch_x86:{result = regs_g_reg_code_x86_usage_kind_table;}break;
}
return result;
}
@@ -98,7 +90,6 @@ switch(arch)
{
default:{}break;
case Arch_x64:{result = regs_g_alias_code_x64_usage_kind_table;}break;
case Arch_x86:{result = regs_g_alias_code_x86_usage_kind_table;}break;
}
return result;
}
@@ -202,7 +193,7 @@ REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
};
REGS_UsageKind regs_g_alias_code_x64_usage_kind_table[96] =
REGS_UsageKind regs_g_alias_code_x64_usage_kind_table[95] =
{
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
@@ -259,7 +250,6 @@ REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
@@ -401,7 +391,7 @@ str8_lit_comp("tr"),
str8_lit_comp("ldtr"),
};
String8 regs_g_alias_code_x64_string_table[96] =
String8 regs_g_alias_code_x64_string_table[95] =
{
str8_lit_comp(""),
str8_lit_comp("eax"),
@@ -420,7 +410,6 @@ str8_lit_comp("r12d"),
str8_lit_comp("r13d"),
str8_lit_comp("r14d"),
str8_lit_comp("r15d"),
str8_lit_comp("eip"),
str8_lit_comp("eflags"),
str8_lit_comp("ax"),
str8_lit_comp("cx"),
@@ -600,7 +589,7 @@ REGS_Rng regs_g_reg_code_x64_rng_table[95] =
{(U16)OffsetOf(REGS_RegBlockX64, ldtr), 2},
};
REGS_Slice regs_g_alias_code_x64_slice_table[96] =
REGS_Slice regs_g_alias_code_x64_slice_table[95] =
{
{0},
{REGS_RegCodeX64_rax, 0, 4},
@@ -619,7 +608,6 @@ REGS_Slice regs_g_alias_code_x64_slice_table[96] =
{REGS_RegCodeX64_r13, 0, 4},
{REGS_RegCodeX64_r14, 0, 4},
{REGS_RegCodeX64_r15, 0, 4},
{REGS_RegCodeX64_rip, 0, 4},
{REGS_RegCodeX64_rflags, 0, 4},
{REGS_RegCodeX64_rax, 0, 2},
{REGS_RegCodeX64_rcx, 0, 2},
@@ -700,302 +688,5 @@ REGS_Slice regs_g_alias_code_x64_slice_table[96] =
{REGS_RegCodeX64_st7, 0, 8},
};
REGS_UsageKind regs_g_reg_code_x86_usage_kind_table[55] =
{
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
};
REGS_UsageKind regs_g_alias_code_x86_usage_kind_table[36] =
{
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
REGS_UsageKind_Vector,
};
String8 regs_g_reg_code_x86_string_table[55] =
{
str8_lit_comp(""),
str8_lit_comp("eax"),
str8_lit_comp("ecx"),
str8_lit_comp("edx"),
str8_lit_comp("ebx"),
str8_lit_comp("esp"),
str8_lit_comp("ebp"),
str8_lit_comp("esi"),
str8_lit_comp("edi"),
str8_lit_comp("fsbase"),
str8_lit_comp("gsbase"),
str8_lit_comp("eflags"),
str8_lit_comp("eip"),
str8_lit_comp("dr0"),
str8_lit_comp("dr1"),
str8_lit_comp("dr2"),
str8_lit_comp("dr3"),
str8_lit_comp("dr4"),
str8_lit_comp("dr5"),
str8_lit_comp("dr6"),
str8_lit_comp("dr7"),
str8_lit_comp("st0"),
str8_lit_comp("st1"),
str8_lit_comp("st2"),
str8_lit_comp("st3"),
str8_lit_comp("st4"),
str8_lit_comp("st5"),
str8_lit_comp("st6"),
str8_lit_comp("st7"),
str8_lit_comp("fcw"),
str8_lit_comp("fsw"),
str8_lit_comp("ftw"),
str8_lit_comp("fop"),
str8_lit_comp("fcs"),
str8_lit_comp("fds"),
str8_lit_comp("fip"),
str8_lit_comp("fdp"),
str8_lit_comp("mxcsr"),
str8_lit_comp("mxcsr_mask"),
str8_lit_comp("ss"),
str8_lit_comp("cs"),
str8_lit_comp("ds"),
str8_lit_comp("es"),
str8_lit_comp("fs"),
str8_lit_comp("gs"),
str8_lit_comp("tr"),
str8_lit_comp("ldtr"),
str8_lit_comp("ymm0"),
str8_lit_comp("ymm1"),
str8_lit_comp("ymm2"),
str8_lit_comp("ymm3"),
str8_lit_comp("ymm4"),
str8_lit_comp("ymm5"),
str8_lit_comp("ymm6"),
str8_lit_comp("ymm7"),
};
String8 regs_g_alias_code_x86_string_table[36] =
{
str8_lit_comp(""),
str8_lit_comp("ax"),
str8_lit_comp("cx"),
str8_lit_comp("bx"),
str8_lit_comp("dx"),
str8_lit_comp("sp"),
str8_lit_comp("bp"),
str8_lit_comp("si"),
str8_lit_comp("di"),
str8_lit_comp("ip"),
str8_lit_comp("ah"),
str8_lit_comp("ch"),
str8_lit_comp("dh"),
str8_lit_comp("bh"),
str8_lit_comp("al"),
str8_lit_comp("cl"),
str8_lit_comp("dl"),
str8_lit_comp("bl"),
str8_lit_comp("bpl"),
str8_lit_comp("spl"),
str8_lit_comp("xmm0"),
str8_lit_comp("xmm1"),
str8_lit_comp("xmm2"),
str8_lit_comp("xmm3"),
str8_lit_comp("xmm4"),
str8_lit_comp("xmm5"),
str8_lit_comp("xmm6"),
str8_lit_comp("xmm7"),
str8_lit_comp("mm0"),
str8_lit_comp("mm1"),
str8_lit_comp("mm2"),
str8_lit_comp("mm3"),
str8_lit_comp("mm4"),
str8_lit_comp("mm5"),
str8_lit_comp("mm6"),
str8_lit_comp("mm7"),
};
REGS_Rng regs_g_reg_code_x86_rng_table[55] =
{
{0},
{(U16)OffsetOf(REGS_RegBlockX86, eax), 4},
{(U16)OffsetOf(REGS_RegBlockX86, ecx), 4},
{(U16)OffsetOf(REGS_RegBlockX86, edx), 4},
{(U16)OffsetOf(REGS_RegBlockX86, ebx), 4},
{(U16)OffsetOf(REGS_RegBlockX86, esp), 4},
{(U16)OffsetOf(REGS_RegBlockX86, ebp), 4},
{(U16)OffsetOf(REGS_RegBlockX86, esi), 4},
{(U16)OffsetOf(REGS_RegBlockX86, edi), 4},
{(U16)OffsetOf(REGS_RegBlockX86, fsbase), 4},
{(U16)OffsetOf(REGS_RegBlockX86, gsbase), 4},
{(U16)OffsetOf(REGS_RegBlockX86, eflags), 4},
{(U16)OffsetOf(REGS_RegBlockX86, eip), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr0), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr1), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr2), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr3), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr4), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr5), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr6), 4},
{(U16)OffsetOf(REGS_RegBlockX86, dr7), 4},
{(U16)OffsetOf(REGS_RegBlockX86, st0), 10},
{(U16)OffsetOf(REGS_RegBlockX86, st1), 10},
{(U16)OffsetOf(REGS_RegBlockX86, st2), 10},
{(U16)OffsetOf(REGS_RegBlockX86, st3), 10},
{(U16)OffsetOf(REGS_RegBlockX86, st4), 10},
{(U16)OffsetOf(REGS_RegBlockX86, st5), 10},
{(U16)OffsetOf(REGS_RegBlockX86, st6), 10},
{(U16)OffsetOf(REGS_RegBlockX86, st7), 10},
{(U16)OffsetOf(REGS_RegBlockX86, fcw), 2},
{(U16)OffsetOf(REGS_RegBlockX86, fsw), 2},
{(U16)OffsetOf(REGS_RegBlockX86, ftw), 2},
{(U16)OffsetOf(REGS_RegBlockX86, fop), 2},
{(U16)OffsetOf(REGS_RegBlockX86, fcs), 2},
{(U16)OffsetOf(REGS_RegBlockX86, fds), 2},
{(U16)OffsetOf(REGS_RegBlockX86, fip), 4},
{(U16)OffsetOf(REGS_RegBlockX86, fdp), 4},
{(U16)OffsetOf(REGS_RegBlockX86, mxcsr), 4},
{(U16)OffsetOf(REGS_RegBlockX86, mxcsr_mask), 4},
{(U16)OffsetOf(REGS_RegBlockX86, ss), 2},
{(U16)OffsetOf(REGS_RegBlockX86, cs), 2},
{(U16)OffsetOf(REGS_RegBlockX86, ds), 2},
{(U16)OffsetOf(REGS_RegBlockX86, es), 2},
{(U16)OffsetOf(REGS_RegBlockX86, fs), 2},
{(U16)OffsetOf(REGS_RegBlockX86, gs), 2},
{(U16)OffsetOf(REGS_RegBlockX86, tr), 2},
{(U16)OffsetOf(REGS_RegBlockX86, ldtr), 2},
{(U16)OffsetOf(REGS_RegBlockX86, ymm0), 32},
{(U16)OffsetOf(REGS_RegBlockX86, ymm1), 32},
{(U16)OffsetOf(REGS_RegBlockX86, ymm2), 32},
{(U16)OffsetOf(REGS_RegBlockX86, ymm3), 32},
{(U16)OffsetOf(REGS_RegBlockX86, ymm4), 32},
{(U16)OffsetOf(REGS_RegBlockX86, ymm5), 32},
{(U16)OffsetOf(REGS_RegBlockX86, ymm6), 32},
{(U16)OffsetOf(REGS_RegBlockX86, ymm7), 32},
};
REGS_Slice regs_g_alias_code_x86_slice_table[36] =
{
{0},
{REGS_RegCodeX86_eax, 0, 2},
{REGS_RegCodeX86_ecx, 0, 2},
{REGS_RegCodeX86_ebx, 0, 2},
{REGS_RegCodeX86_edx, 0, 2},
{REGS_RegCodeX86_esp, 0, 2},
{REGS_RegCodeX86_ebp, 0, 2},
{REGS_RegCodeX86_esi, 0, 2},
{REGS_RegCodeX86_edi, 0, 2},
{REGS_RegCodeX86_eip, 0, 2},
{REGS_RegCodeX86_eax, 1, 1},
{REGS_RegCodeX86_ecx, 1, 1},
{REGS_RegCodeX86_edx, 1, 1},
{REGS_RegCodeX86_ebx, 1, 1},
{REGS_RegCodeX86_eax, 0, 1},
{REGS_RegCodeX86_ecx, 0, 1},
{REGS_RegCodeX86_edx, 0, 1},
{REGS_RegCodeX86_ebx, 0, 1},
{REGS_RegCodeX86_ebp, 0, 1},
{REGS_RegCodeX86_esp, 0, 1},
{REGS_RegCodeX86_ymm0, 0, 16},
{REGS_RegCodeX86_ymm1, 0, 16},
{REGS_RegCodeX86_ymm2, 0, 16},
{REGS_RegCodeX86_ymm3, 0, 16},
{REGS_RegCodeX86_ymm4, 0, 16},
{REGS_RegCodeX86_ymm5, 0, 16},
{REGS_RegCodeX86_ymm6, 0, 16},
{REGS_RegCodeX86_ymm7, 0, 16},
{REGS_RegCodeX86_st0, 0, 8},
{REGS_RegCodeX86_st1, 0, 8},
{REGS_RegCodeX86_st2, 0, 8},
{REGS_RegCodeX86_st3, 0, 8},
{REGS_RegCodeX86_st4, 0, 8},
{REGS_RegCodeX86_st5, 0, 8},
{REGS_RegCodeX86_st6, 0, 8},
{REGS_RegCodeX86_st7, 0, 8},
};
C_LINKAGE_END
src/regs/generated/regs.meta.h
+3 -170
View File
@@ -125,7 +125,6 @@ REGS_AliasCodeX64_r12d,
REGS_AliasCodeX64_r13d,
REGS_AliasCodeX64_r14d,
REGS_AliasCodeX64_r15d,
REGS_AliasCodeX64_eip,
REGS_AliasCodeX64_eflags,
REGS_AliasCodeX64_ax,
REGS_AliasCodeX64_cx,
@@ -207,107 +206,6 @@ REGS_AliasCodeX64_mm7,
REGS_AliasCodeX64_COUNT,
} REGS_AliasCodeX64;
typedef enum REGS_RegCodeX86
{
REGS_RegCodeX86_NULL,
REGS_RegCodeX86_eax,
REGS_RegCodeX86_ecx,
REGS_RegCodeX86_edx,
REGS_RegCodeX86_ebx,
REGS_RegCodeX86_esp,
REGS_RegCodeX86_ebp,
REGS_RegCodeX86_esi,
REGS_RegCodeX86_edi,
REGS_RegCodeX86_fsbase,
REGS_RegCodeX86_gsbase,
REGS_RegCodeX86_eflags,
REGS_RegCodeX86_eip,
REGS_RegCodeX86_dr0,
REGS_RegCodeX86_dr1,
REGS_RegCodeX86_dr2,
REGS_RegCodeX86_dr3,
REGS_RegCodeX86_dr4,
REGS_RegCodeX86_dr5,
REGS_RegCodeX86_dr6,
REGS_RegCodeX86_dr7,
REGS_RegCodeX86_st0,
REGS_RegCodeX86_st1,
REGS_RegCodeX86_st2,
REGS_RegCodeX86_st3,
REGS_RegCodeX86_st4,
REGS_RegCodeX86_st5,
REGS_RegCodeX86_st6,
REGS_RegCodeX86_st7,
REGS_RegCodeX86_fcw,
REGS_RegCodeX86_fsw,
REGS_RegCodeX86_ftw,
REGS_RegCodeX86_fop,
REGS_RegCodeX86_fcs,
REGS_RegCodeX86_fds,
REGS_RegCodeX86_fip,
REGS_RegCodeX86_fdp,
REGS_RegCodeX86_mxcsr,
REGS_RegCodeX86_mxcsr_mask,
REGS_RegCodeX86_ss,
REGS_RegCodeX86_cs,
REGS_RegCodeX86_ds,
REGS_RegCodeX86_es,
REGS_RegCodeX86_fs,
REGS_RegCodeX86_gs,
REGS_RegCodeX86_tr,
REGS_RegCodeX86_ldtr,
REGS_RegCodeX86_ymm0,
REGS_RegCodeX86_ymm1,
REGS_RegCodeX86_ymm2,
REGS_RegCodeX86_ymm3,
REGS_RegCodeX86_ymm4,
REGS_RegCodeX86_ymm5,
REGS_RegCodeX86_ymm6,
REGS_RegCodeX86_ymm7,
REGS_RegCodeX86_COUNT,
} REGS_RegCodeX86;
typedef enum REGS_AliasCodeX86
{
REGS_AliasCodeX86_NULL,
REGS_AliasCodeX86_ax,
REGS_AliasCodeX86_cx,
REGS_AliasCodeX86_bx,
REGS_AliasCodeX86_dx,
REGS_AliasCodeX86_sp,
REGS_AliasCodeX86_bp,
REGS_AliasCodeX86_si,
REGS_AliasCodeX86_di,
REGS_AliasCodeX86_ip,
REGS_AliasCodeX86_ah,
REGS_AliasCodeX86_ch,
REGS_AliasCodeX86_dh,
REGS_AliasCodeX86_bh,
REGS_AliasCodeX86_al,
REGS_AliasCodeX86_cl,
REGS_AliasCodeX86_dl,
REGS_AliasCodeX86_bl,
REGS_AliasCodeX86_bpl,
REGS_AliasCodeX86_spl,
REGS_AliasCodeX86_xmm0,
REGS_AliasCodeX86_xmm1,
REGS_AliasCodeX86_xmm2,
REGS_AliasCodeX86_xmm3,
REGS_AliasCodeX86_xmm4,
REGS_AliasCodeX86_xmm5,
REGS_AliasCodeX86_xmm6,
REGS_AliasCodeX86_xmm7,
REGS_AliasCodeX86_mm0,
REGS_AliasCodeX86_mm1,
REGS_AliasCodeX86_mm2,
REGS_AliasCodeX86_mm3,
REGS_AliasCodeX86_mm4,
REGS_AliasCodeX86_mm5,
REGS_AliasCodeX86_mm6,
REGS_AliasCodeX86_mm7,
REGS_AliasCodeX86_COUNT,
} REGS_AliasCodeX86;
typedef struct REGS_RegBlockX64 REGS_RegBlockX64;
struct REGS_RegBlockX64
{
@@ -407,78 +305,13 @@ REGS_Reg16 tr;
REGS_Reg16 ldtr;
};
typedef struct REGS_RegBlockX86 REGS_RegBlockX86;
struct REGS_RegBlockX86
{
REGS_Reg32 eax;
REGS_Reg32 ecx;
REGS_Reg32 edx;
REGS_Reg32 ebx;
REGS_Reg32 esp;
REGS_Reg32 ebp;
REGS_Reg32 esi;
REGS_Reg32 edi;
REGS_Reg32 fsbase;
REGS_Reg32 gsbase;
REGS_Reg32 eflags;
REGS_Reg32 eip;
REGS_Reg32 dr0;
REGS_Reg32 dr1;
REGS_Reg32 dr2;
REGS_Reg32 dr3;
REGS_Reg32 dr4;
REGS_Reg32 dr5;
REGS_Reg32 dr6;
REGS_Reg32 dr7;
REGS_Reg80 st0;
REGS_Reg80 st1;
REGS_Reg80 st2;
REGS_Reg80 st3;
REGS_Reg80 st4;
REGS_Reg80 st5;
REGS_Reg80 st6;
REGS_Reg80 st7;
REGS_Reg16 fcw;
REGS_Reg16 fsw;
REGS_Reg16 ftw;
REGS_Reg16 fop;
REGS_Reg16 fcs;
REGS_Reg16 fds;
REGS_Reg32 fip;
REGS_Reg32 fdp;
REGS_Reg32 mxcsr;
REGS_Reg32 mxcsr_mask;
REGS_Reg16 ss;
REGS_Reg16 cs;
REGS_Reg16 ds;
REGS_Reg16 es;
REGS_Reg16 fs;
REGS_Reg16 gs;
REGS_Reg16 tr;
REGS_Reg16 ldtr;
REGS_Reg256 ymm0;
REGS_Reg256 ymm1;
REGS_Reg256 ymm2;
REGS_Reg256 ymm3;
REGS_Reg256 ymm4;
REGS_Reg256 ymm5;
REGS_Reg256 ymm6;
REGS_Reg256 ymm7;
};
C_LINKAGE_BEGIN
extern REGS_UsageKind regs_g_reg_code_x64_usage_kind_table[95];
extern REGS_UsageKind regs_g_alias_code_x64_usage_kind_table[96];
extern REGS_UsageKind regs_g_alias_code_x64_usage_kind_table[95];
extern String8 regs_g_reg_code_x64_string_table[95];
extern String8 regs_g_alias_code_x64_string_table[96];
extern String8 regs_g_alias_code_x64_string_table[95];
extern REGS_Rng regs_g_reg_code_x64_rng_table[95];
extern REGS_Slice regs_g_alias_code_x64_slice_table[96];
extern REGS_UsageKind regs_g_reg_code_x86_usage_kind_table[55];
extern REGS_UsageKind regs_g_alias_code_x86_usage_kind_table[36];
extern String8 regs_g_reg_code_x86_string_table[55];
extern String8 regs_g_alias_code_x86_string_table[36];
extern REGS_Rng regs_g_reg_code_x86_rng_table[55];
extern REGS_Slice regs_g_alias_code_x86_slice_table[36];
extern REGS_Slice regs_g_alias_code_x64_slice_table[95];
C_LINKAGE_END