mirror of
https://github.com/Ed94/pikuma_ps1.git
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220 lines
10 KiB
C
220 lines
10 KiB
C
#ifdef INTELLISENSE_DIRECTIVES
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# pragma once
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# include "assert.h"
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#endif
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#define offset_of(type, member) cast(U8,__builtin_offsetof(type,member))
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#define static_assert _Static_assert
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#define typeof __typeof__
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#define typeof_ptr(ptr) typeof((ptr)[0])
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#define typeof_same(a, b) _Generic((a), typeof((b)): 1, default: 0)
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#define m_expand(...) __VA_ARGS__
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#define glue_impl(A, B) A ## B
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#define glue(A, B) glue_impl(A, B)
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#define tmpl(prefix, type) prefix ## _ ## type
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#define stringify_impl(S) #S
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#define stringify(S) stringify_impl(S)
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#define VA_Sel_1( _1, ... ) _1 // <-- Of all th args passed pick _1.
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#define VA_Sel_2( _1, _2, ... ) _2 // <-- Of all the args passed pick _2.
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#define VA_Sel_3( _1, _2, _3, ... ) _3 // etc..
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#define global static // Mark global data
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#define gknown // Mark global data used in procedure
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#define LP_ static // static data within procedure scope
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#define internal static // internal
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#define asm __asm__
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#define align_(value) __attribute__((aligned (value))) // for easy alignment
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#define align_(value) __attribute__((aligned (value))) // for easy alignment
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#define C_(type,data) ((type)(data)) // for enforced precedence
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#define expect_(x, y) __builtin_expect(x, y) // so compiler knows the common path
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#define cexpr_ __builtin_constant_p
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#define I_ internal inline
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#define FI_ inline __attribute__((always_inline)) // inline always
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#define NI_ internal __attribute__((noinline)) // inline never
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#define RO_ __attribute__((section(".rodata"))) // Read only data allocation
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#define T_ typeof //
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#define T_same(a,b) _Generic((a), typeof((b)): 1, default: 0)
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#define R_ restrict
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#define V_ volatile
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// Fictional, used for intiution.
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#define EUB_ restrict // Execute Unit Bound: Data is siloed in the ALU Register File. The Load/Store Unit is bypassed. (Route to Execution Unit. Keep in registers)
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#define ISO_ restrict // Isolated Provenance: Alternative to Exu_. Guarantees electrical memory isolation,
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// unlocking the compiler’s ability to safely pack data across multiple parallel SIMD lanes (vectorization).
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#define LSU_ volatile // Load/Store Unit Bound: The compiler is forbidden from caching in registers. Forces physical L1 Cache matrix sampling.
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#define LIVE_ volatile // Live External Data: Alternative to Lsu_ emphasizing the memory is tapped by an external electrical actor.
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#define latch_store /* ~: atomic_store*/ // Blasts voltages from the Store Buffer into the L1 SRAM, physically flipping the cross-coupled inverters to lock the state.
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#define pulse_rfo /* ~: atomic_xchg*/ // Broadcasts an electrical RFO (Request For Ownership) pulse across the CPU mesh network to invalidate other L1 caches.
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#define tact_acquire /* ~: memory_order_acquire*/ // Clamp. Sends a voltage signal to the instruction decoder to halt the Out-of-Order engine until the load resolves.
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#define tact_release /* ~: memory_order_release*/ // Drain. Forces the Store Buffer flip-flops to completely empty into the L1 cache before proceeding.
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// -----------------------------------------------------------------------------
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// Out-of-Order (OoO) Pipeline Modifiers
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// -----------------------------------------------------------------------------
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#define ooo_drift_ __ATOMIC_RELAXED // OoO engine allowed to drift
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#define ooo_anchor_ __ATOMIC_ACQUIRE // Anchor the Load Queue (halt spec lookahead)
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#define ooo_drain_ __ATOMIC_RELEASE // Drain the Store Buffer (force writeback)
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#define ooo_weld_ __ATOMIC_SEQ_CST // Weld pipeline (total order bus lock)
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// Latch operations with physical queue modifiers
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#define latch_load_anchor(ptr) //__atomic_load_n(ptr, ooo_anchor_)
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#define latch_store_drain(ptr, val) //__atomic_store_n(ptr, val, ooo_drain_)
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#define pulse_xchg_weld(ptr, val) //__atomic_exchange_n(ptr, val, ooo_weld_)
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//end of: Fictional.
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// R_ (restrict) establishes an "Eigen" or "Proprius" mapping.
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// Unlike volatile (V_), which assumes the memory can be changed by anything,
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// R_ tells the compiler that this pointer holds the *sole*, private (idios)
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// ownership of the memory slice. Writes to this memory are exclusively bound
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// to this single symbolic mapping for the duration of the scope, guaranteeing
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// zero aliasing.
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#define r_(ptr) C_(T_(ptr[0])*R_, ptr) // Constrain pointer to restrict
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#define v_(ptr) C_(T_(ptr[0])V_*, ptr) //
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#define tr_(type, ptr) C_(type *R_, ptr)
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#define tv_(type, ptr) C_(type V_*, ptr)
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#define TypeR_(type) type *R_ type ## _R // type *restrict type_R
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#define TypeV_(type) type V_* type ## _V // type volatile* type_V
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#define PtrSet_(type) TypeR_(type); typedef TypeV_(type)
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#define TSet_(type) type; typedef PtrSet_(type)
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#define array_len(a) (U8)(sizeof(a) / sizeof(typeof((a)[0])))
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#define array_decl(type, ...) (type[]){__VA_ARGS__}
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#define Array_sym(type,len) A ## len ## _ ## type
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#define Array_expand(type,len) type Array_sym(type, len)[len]; typedef PtrSet_(Array_sym(type, len))
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#define Array_(type,len) Array_expand(type,len)
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#define Bit_(id,b) id = (1 << b), tmpl(id,pos) = b
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#define Enum_(underlying_type, symbol) underlying_type TSet_(symbol); enum symbol
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#define Proc_(symbol) symbol
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#define Struct_(symbol) struct symbol TSet_(symbol); struct symbol
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#define Union_(symbol) union symbol TSet_(symbol); union symbol
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#define Opt_(proc) Struct_(tmpl(Opt,proc))
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#define opt_(symbol, ...) (tmpl(Opt,symbol)){__VA_ARGS__}
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#define Ret_(proc) Struct_(tmpl(Ret,proc))
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#define ret_(proc) tmpl(Ret,proc) proc
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// Using Byte-Width convention for the fundamental types.
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typedef __UINT8_TYPE__ TSet_(U1);
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typedef __UINT16_TYPE__ TSet_(U2);
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typedef __UINT32_TYPE__ TSet_(U4);
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typedef __INT8_TYPE__ TSet_(S1);
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typedef __INT16_TYPE__ TSet_(S2);
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typedef __INT32_TYPE__ TSet_(S4);
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typedef unsigned char TSet_(B1);
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typedef __UINT16_TYPE__ TSet_(B2);
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typedef __UINT32_TYPE__ TSet_(B4);
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#define u1_(value) C_(U1, value)
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#define u2_(value) C_(U2, value)
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#define u4_(value) C_(U4, value)
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#define s1_(value) C_(S1, value)
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#define s2_(value) C_(S2, value)
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#define s4_(value) C_(S4, value)
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#define u1_r(value) C_(U1 *R_, value)
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#define u2_r(value) C_(U2 *R_, value)
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#define u4_r(value) C_(U4 *R_, value)
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#define u1_v(value) C_(U1 V_*, value)
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#define u2_v(value) C_(U2 V_*, value)
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#define u4_v(value) C_(U4 V_*, value)
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enum { false = 0, true = 1, true_overflow, };
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#define u4_lo(value) ((value) & 0xFFFFU)
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#define u4_hi(value) ((value) >> 12)
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typedef void Proc_(VoidFn) (void);
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#define kilo(n) (C_(U4, n) << 10)
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#define mega(n) (C_(U4, n) << 20)
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#define giga(n) (C_(U4, n) << 30)
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#define tera(n) (C_(U4, n) << 40)
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#define null C_(U4, 0)
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#define nullptr C_(void*, 0)
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#define O_(type,member) C_(U4,__builtin_offsetof(type,member))
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#define S_(data) C_(U4, sizeof(data))
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#define sop_1(op,a,b) C_(U1, s1_(a) op s1_(b))
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#define sop_2(op,a,b) C_(U2, s2_(a) op s2_(b))
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#define sop_4(op,a,b) C_(U4, s4_(a) op s4_(b))
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#undef def_signed_op
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#define def_signed_op(id,op,width) FI_ U ## width id ## _s ## width(U ## width a, U ## width b) {return sop_ ## width(op, a, b); }
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#define def_signed_ops(id,op) def_signed_op(id, op, 1) def_signed_op(id, op, 2) def_signed_op(id, op, 4)
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def_signed_ops(add, +)
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def_signed_ops(sub, -)
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def_signed_ops(mut, *)
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def_signed_ops(div, /)
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def_signed_ops(gt, >)
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def_signed_ops(lt, <)
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def_signed_ops(ge, >=)
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def_signed_ops(le, <=)
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#undef def_signed_ops
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#undef def_signed_op
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#define def_generic_sop(op, a, ...) _Generic((a), U1: op ## _s1, U2: op ## _s2, U4: op ## _s4) (a, __VA_ARGS__)
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#define add_s(a,b) def_generic_sop(add,a,b)
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#define sub_s(a,b) def_generic_sop(sub,a,b)
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#define mut_s(a,b) def_generic_sop(mut,a,b)
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#define gt_s(a,b) def_generic_sop(gt, a,b)
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#define lt_s(a,b) def_generic_sop(lt, a,b)
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#define ge_s(a,b) def_generic_sop(ge, a,b)
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#define le_s(a,b) def_generic_sop(le, a,b)
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#undef def_generic_sop
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#define o_(field) offset_of(typeof_ptr(& field), filed))
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#define alignas _Alignas
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#define alignof _Alignof
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#define byte_pad(amount, ...) B1 glue(_PAD_, __VA_ARGS__) [amount]
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#define pcast(type, data) (C_(type*, & (data)) [0])
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#define dbg_args(...) __VA_ARGS__
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#pragma region Control Flow & Iteration
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#define each_iter(type, iter, end) (type iter = 0; iter < end; ++ iter)
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#define index_iter(type, iter, begin, op, end) (type iter = begin; iter op end; (begin < end ? ++ iter : -- iter))
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#define range_iter(iter,op,range) (T_((range).p0) iter = (range).p0; iter op (range).p1; ((range).p0 < (range).p1 ? ++ iter : -- iter))
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#define defer(expr) for(U4 once= 1; once!=1;++ once,(expr)) // Basic do something after body
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#define scope(begin,end) for(U4 once=(1,(begin)); once!=1;++ once,(end )) // Do things before or after a scope
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#define defer_rewind(cursor) for(T_(cursor) sp=cursor,once=0; once!=1;++ once,cursor=sp) // Used with arenas/stacks
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#define defer_info(type,expr, ...) for(type info= {__VA_ARGS__}; info.once!=1;++info.once,(expr)) // Defer with tracked state
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#define do_while(cond) for (U8 once=0; once!=1 || (cond); ++once)
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#pragma endregion Control Flow & Iteration
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#define span_iter(type, iter, m_begin, op, m_end) ( \
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tmpl(Iter_Span,type) iter = { \
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.r = {(m_begin), (m_end)}, \
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.cursor = (m_begin) }; \
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iter.cursor op iter.r.end; \
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++ iter.cursor \
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)
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#define Span_(type) \
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Struct_(tmpl( Span,type)) { type begin; type end; }; \
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typedef Struct_(tmpl(Iter_Span,type)) { tmpl(Span,type) r; type cursor; }
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typedef Span_(S4);
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typedef Span_(U4);
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#if 0
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#pragma region Debug
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#define debug_trap() __builtin_debugtrap()
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#if BUILD_DEBUG
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IA_ void assert(U8 cond) { if(cond){return;} else{debug_trap(); ms_exit_process(1);} }
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#else
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#define assert(cond)
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#endif
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#pragma endregion Debug
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#endif
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