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https://github.com/Ed94/pikuma_ps1.git
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267 lines
13 KiB
C
267 lines
13 KiB
C
#ifdef INTELLISENSE_DIRECTIVES
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# pragma once
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# include "gen/macs.h"
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# include "gen/offsets.h"
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# include "dsl.h"
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# include "gcc_asm.h"
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# include "mips.h"
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# include "gte.h"
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# include "memory.h"
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# include "dsl.atom.h"
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#endif
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#pragma region Tape Drive
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/* -----------------------------------------------------------------------------
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* TAPE DRIVE ABI
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* -----------------------------------------------------------------------------
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* Note(Ed): One of the main purposes of this codebase is to help me
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* learn this, as such the information below may be entirely realized
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* or finalized conceptually.
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* -----------------------------------------------------------------------------
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* This ABI and its associated legos were directly inspired by researching
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* the work of Timothy Lottes and Onat Türkçüoğlu; along with many others.
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* It's the simplest bootstrap of a a directly executed chain of assemby
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* arrays (Atoms) that terminate with a yield sequence to the next atom.
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* These eventually lead to a terminal atom for the tape which is defined
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* below as "tape_exit".
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*
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* This behaves as one of the simplest runtime harnesses ontop of a
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* host-enviornment's execution engine to author and compose programs with.
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* From here various conventions can be further applied.
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* To make things easier to understand it may be better to focus on what this
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* ABI does not have. It does not have have any branching within the tape but
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* relative branches between atoms. Branching nearly is always downstream.
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* Stack usage is non-existent. Push/Pop, FIFO, or Arena/Bump data structures
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* are used by atoms explicitly. In it's current form withe C11 macro dsl,
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* the user also has to do manual register allocation per atom.
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*
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* One of the remarkable things about utilizing this abi is its essentially
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* interopable with CPUs, GPUs, FPGA, or, basically anything
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* from the 5th generation consoles and onward.
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* The ABI directly reflects how all computational hardware must be architected
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* in order to execute digital logic effectively on current era tech.
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* On the PS1 we don't have access to a few features like multi-threading,
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* speculative execution, or L3 cache; but, we can set the foundation for legoing
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* whats required baseline wise for eventually expanding the harness and core atoms
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* to take those newer hardware features into account. For example, you can easily
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* expand this to support wave-based execution model on a PS2 or PS3.
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* Not having a stack or automatic register allocation means the user can't ignore
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* excessive argument shuffle across workload or waves and thier phases.
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* Crossing ABI boundaries to other runtimes that do has an obviouss penalties.
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*
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* Learning data-oreinted code becomes a natural progression. Your not fighting
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* a stack-based procedural paradigm that wants to argument shuffle on the stack
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* by lack of constraints on how the user may "call" a procedure. The user doesn't
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* have to hammer down "rules" or patterns to know how to massage the compiler
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* to get the asesmbly into its natural form. The form is obvious, and once
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* the user gets to author their compoonents it becomes a game of tetris.
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*
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* Another feature is this ABI is very compatible with bootstrapping and developing
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* simple toolchains built off of bit-packed annotated command streams the user can
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* directly author, maintatain, and immediately execute. That being a color forth.
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* This can make the tetris less of a chore with some helpful policy generation for
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* allocation of registers, helping to choose resuable components, designing DSL on
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* the fly, etc.
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* -----------------------------------------------------------------------------
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* TODO(Ed): We ned pretty ascii diagrams and proper guides, articles, etc.
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* -----------------------------------------------------------------------------
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* For now this thing is just functioning and I'm abusing C11 + a lua metaprogram
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* to help establish a hybrid toolchain to ideate on a traditional text-based
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* authoring UX for this paradigm.
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* If pcsx-redux gets me viable hot-reload and persistent data storage beyond
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* save-states (just copying ram to filesystem). I can author a color forth to
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* mess around with, with an editor in-emulator or on the actual machine itself.
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* Assembly is tedius, but I think this codebase most likely has some of the most,
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* ergonomic you can come across..
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* */
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/* Register Allocation Info */
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enum {
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R_AtomJmp = R_T8 atom_reg, /* debug-visible; tape yield handshake scratch */
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R_TapePtr = R_T9 atom_reg, /* The Instruction Stream Pointer */
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/* Stringification codes for the GCC inline assembler clobber lists. */
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#define R_AtomJmp_Code R_T8_Code
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#define R_TapePtr_Code R_T9_Code
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// R_InCursor = R_T4,
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// #define R_InCursor_Code R_T4_Code
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// Reserved Registers (Callee-saved):
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// - R_T9: Holds the Tape Ptr which we need to increment
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// If we hit a wall with register allocations we can clobber V0 & V1 (return values), defering as opt-in by user.
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// - R_RA: Not sure??
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// Needed by ac_yield but can be used as atom scratch:
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// - R_T8: Will be used as the atom jump register.
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// All allocatable registers for mips atoms:
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R_TScratchVolatile = R_AT, // This one is reserved for psuedo instructions, but you can technically use it.
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R_TScratch0 = R_T0,
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R_TScratch1 = R_T1,
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R_TScratch2 = R_T2,
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R_TScratch3 = R_T3,
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R_TScratch4 = R_T4,
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R_TScratch5 = R_T5,
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R_TScratch6 = R_T6,
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R_TScratch7 = R_T7,
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R_TScratch8 = R_T8,
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R_TScratch10 = R_V0, // Tend to be used with gte DMAs
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R_TScratch11 = R_V1, // Tend to be used with gte DMAs
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// Note(Ed): We can technically clobber these, but don't unless we hit a bottleneck.
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// A 0-2
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// S 0-7
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};
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typedef U4 const MipsCode; // Underlying type to mips asm words.
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typedef Slice_(MipsCode);
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typedef U4 const MipsAtom; // Underlying type to an array of mips asm words that must terminate with an ac_yield.
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#define MipsAtom_(sym) MipsCode sym [] align_(4) =
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// Used for components with no args (e.g., ac_load_tri_indices) or identifier-args (hardcoded register names).
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// MipsAtomComp_(ac_X) { body }
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// expands to:
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// MipsCode ac_X[] align_(4) = { body };
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#define MipsAtomComp_(sym) MipsCode sym [] align_(4) =
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// Used for components with value-args (e.g., ac_format_f3_color).
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// FI_ Slice_MipsCode ac_X(args) MipsAtomComp_Proc_(ac_X, { body })
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// expands to:
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// FI_ Slice_MipsCode ac_X(args) { MipsCode ac_X[] align_(4) = { body }; return slice_from_array(MipsCode, ac_X); }
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#define MipsAtomComp_Proc_(sym, ...) { MipsCode sym [] align_(4) = __VA_ARGS__; return slice_from_array(MipsCode, sym); }
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/* Line-table anchor: gcc only adds a file to the .debug_line file table when the
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file contains line-numbered content. Files containing only:
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- `MipsAtomComp_` static-array declarations, or
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- `MipsAtomComp_Proc_` (force-inline) function bodies whose line info gets
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attributed to the call site at the include point are otherwise omitted from the file table,
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which breaks the DWARF injection when it tries to resolve atom-component provenance paths.
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Place `ATOM_FILE_LINE_MARKER();` once at file scope in any `.atom.c` that defines atoms.
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The macro expands to a file-scope `internal U4 const` declaration keeps the file in the line table.
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The constant is in `.rodata` and unreferenced; the linker may eliminate it.
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The two-level concat + `__LINE__` suffix makes the identifier unique per call site
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(the identifier embeds the source line, so duplicates across `#include`d files don't collide). */
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#define ATOM_FILE_DEBUGGER_LINE_MARKER(file_name) internal U4 const tmpl(atom_file_debugger_line_marker,file_name) = 0
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typedef Slice_(MipsAtom); typedef Slice_MipsAtom Tape;
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/* The 'Exit' Atom */
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atom_dbg_skip MipsAtom_(tape_exit) { jump_reg(rret_addr), nop };
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// TODO(Ed): When we have a substantial workload/throughput, profile each of these to see impact at ABI boundaries.
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/* Tape Runner (Default) */
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FI_ void tape_run(Tape tape) { register U4* tape_ptr rgcc(R_TapePtr) = u4_r(tape.ptr); asm volatile(
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asm_words(
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load_word( R_AtomJmp, R_TapePtr, 0) /* Bootstrap the first jump */
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, add_ui_self(R_TapePtr, S_(MipsAtom)) /* Advance tape */
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, call_reg( R_AtomJmp) /* jalr $t9 */
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, nop /* Branch delay slot */
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)
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asm_rpins, r_use(tape_ptr)
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asm_clobber:
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rlit(R_AT),
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rlit(R_V0), rlit(R_V1), // We clobber these for GTE ACs (that don't expose register selection, might expose them in the future...)
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rlit(R_T0), rlit(R_T1), rlit(R_T2), rlit(R_T3), rlit(R_T4),
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rlit(R_T5), rlit(R_T6), rlit(R_T7), rlit(R_T8),
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clb_mem_drain
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); }
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/* Tape Runner (Static and Arg Clobbers) */
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FI_ void tape_run_a02_s07(Tape tape) { register U4* tape_ptr rgcc(R_TapePtr) = u4_r(tape.ptr); asm volatile(
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asm_words(
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load_word( R_AtomJmp, R_TapePtr, 0) /* Bootstrap the first jump */
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, add_ui_self(R_TapePtr, S_(MipsAtom)) /* Advance tape */
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, call_reg( R_AtomJmp) /* jalr $t9 */
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, nop /* Branch delay slot */
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)
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asm_rpins, r_use(tape_ptr)
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asm_clobber:
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rlit(R_AT),
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rlit(R_V0), rlit(R_V1), rlit(R_A0), rlit(R_A1), rlit(R_A2),
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rlit(R_T0), rlit(R_T1), rlit(R_T2), rlit(R_T3), rlit(R_T4),
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rlit(R_T5), rlit(R_T6), rlit(R_T7), rlit(R_T8),
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rlit(R_S0), rlit(R_S1), rlit(R_S2), rlit(R_S3), rlit(R_S4),
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rlit(R_S5), rlit(R_S6), rlit(R_S7),
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clb_mem_drain
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); }
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// Procedural authoring of tapes:
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typedef Relative_(FArena) Struct_(TapeBuilder) { U4 ptr; U4 capacity; U4 used; };
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FI_ void tb_init(TapeBuilder* tb, FArena* arena) { tb->ptr = arena->start; tb->used = 0; }
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FI_ TapeBuilder tb_make_old( FArena* arena) { return (TapeBuilder){ arena->start, 0 }; }
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FI_ TapeBuilder tb_make(Slice mem) { return (TapeBuilder){ mem.ptr, mem.len, 0 }; }
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FI_ void tb_emit(TapeBuilder* tb, MipsCode* atom) { u4_r(tb->ptr)[tb->used] = u4_(atom); ++ tb->used; }
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FI_ void tb_data(TapeBuilder* tb, U4 data) { u4_r(tb->ptr)[tb->used] = u4_(data); ++ tb->used; }
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#define tb_emit_(atom) tb_emit(& tb, atom)
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#define tb_data_(field, data) tb_data(& tb, u4_(data))
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FI_ Tape tb_end (TapeBuilder* tb) { tb_emit(tb,tape_exit); return (Tape){ C_(U4*,tb->ptr), tb->used }; }
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FI_ Tape tb_slice(TapeBuilder tb) { return (Tape){ C_(U4*,tb.ptr), tb.used }; }
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#define tb_scope(tb) for(U4 tbs_once=0;tbs_once==0;++tbs_once,tb_emit(tb,tape_exit))
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FI_ void tb_scope_run_end(TapeBuilder* tb) { tb_emit(tb,tape_exit); tape_run(tb_slice(tb[0])); }
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#define tb_scope_run(tb) for(U4 tbs_once=0;tbs_once==0;++tbs_once,tb_scope_run_end(tb))
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#pragma endregion Tape Drive
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#pragma region Macro Mips Atom Components
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/* ---------------------------------------------------------------------------
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* MACRO ATOM Components (Reusable Assembly Components)
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* These do NOT yield. They are expanded inline inside Tape Atoms.
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* ---------------------------------------------------------------------------*/
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// The 'Yield' sequence for Tape Atoms (mac_yield).
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// - mac_yield() is the safe default for atom-endings: 4 words, BD-slot of jr is mandatory nop.
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// - mac_yield_load() + mac_yield_tail():
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// - unconditional branch: mac_yield_load fills the branch's BD-slot (replaces a nop);
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// - mac_yield_tail runs at the branch target (does NOT re-load R_AtomJmp).
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atom_dbg_skip MipsAtomComp_(ac_yield) {
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load_word(R_AtomJmp, R_TapePtr, 0),
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add_ui_self( R_TapePtr, S_(MipsCode)),
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jump_reg( R_AtomJmp), nop,
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};
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atom_dbg_skip MipsAtomComp_(ac_yield_load) {
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load_word(R_AtomJmp, R_TapePtr, 0),
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};
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atom_dbg_skip MipsAtomComp_(ac_yield_tail) {
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add_ui_self(R_TapePtr, S_(MipsCode)),
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jump_reg( R_AtomJmp), nop,
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};
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#pragma endregion Macro Atom Components
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#pragma region Mips Atom Builder
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// This helps with runtime procedural authoring of mips atoms.
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typedef Struct_(FMipsAtom512) { U4 data[512]; U4 used; };
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// FArena Related
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typedef Relative_(FArena) Struct_(MipsAtomBuilder) { U4 start; U4 capacity; U4 used; };
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// Whatever the builder is writting to should most likely coresspond
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// to something that can fit within instruction cache?
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FI_ void atombuilder_unroll(MipsAtomBuilder_R ab, Slice_MipsCode_R code) {
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assert(ab->capacity - ab->used - code->len);
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mem_copy(ab->start, u4_(code->ptr), code->len);
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mem_bump(ab->start, ab->capacity, & ab->used, code->len);
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}
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#define atombuilder_unroll_mac(ab, mac) atombuilder_unroll(ab, slice_arg_from_array(Slice_MipsCode, mac))
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// When done authoring, utilize this to cap-off the atom
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FI_ void atombuilder_end(MipsAtomBuilder_R ab) {
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mem_copy(ab->start, u4_(ac_yield), S_(ac_yield));
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mem_bump(ab->start, ab->capacity, & ab->used, S_(ac_yield));
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}
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#define mipsatom_from_builder(ab) (Slice_MipsCode){ab.start, ab.used}
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#pragma endregion Mips Atom Builder
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#pragma region Baked Mips Atoms
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// These atoms are resolved at compile time and are (usually) statically linked readonly data.
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#pragma endregion Baked Mips Atoms
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