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45 lines
1.9 KiB
C
45 lines
1.9 KiB
C
/* ============================================================================
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* duffle DSL — GTE Vendor Mnemonics (opt-in)
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* ============================================================================
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*
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* Provides the textbook MIPS assembly mnemonics for the GTE/COP2
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* instructions as thin aliases to the canonical duffle macros in gte.h.
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* The duffle names are primary; this header is for users who prefer
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* the textbook mnemonics.
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*
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* USAGE: #include "duffle/gte_vendor_sym.h" // after gte.h
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*
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* Mapping (vendor -> duffle):
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* Transfers (move GPR <-> GTE control/data register):
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* gte_mfc2 -> gte_mv_from_data_r (move from coprocessor 2 data reg)
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* gte_mtc2 -> gte_mv_to_data_r (move to coprocessor 2 data reg)
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* gte_cfc2 -> gte_mv_from_ctrl_r (move from coprocessor 2 control reg)
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* gte_ctc2 -> gte_mv_to_ctrl_r (move to coprocessor 2 control reg)
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*
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* Data load/store (load/store word to coprocessor 2 data register):
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* gte_lwc2(rt, base, off) -> gte_lw(rt, base, off)
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* gte_swc2(rt, base, off) -> gte_sw(rt, base, off)
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* (the lower-level vector variants gte_lw_v0_xy etc. don't have
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* vendor mnemonics; they're already gte_-prefixed and short)
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* ============================================================================ */
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#ifdef INTELLISENSE_DIRECTIVES
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# pragma once
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# include "gte.h"
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#endif
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#ifndef DUFFLE_GTE_VENDOR_SYM_H
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#define DUFFLE_GTE_VENDOR_SYM_H
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/* Transfers (move GPR <-> GTE control/data register) */
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#define gte_mfc2(rt, rd) gte_mv_from_data_r((rt), (rd))
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#define gte_mtc2(rt, rd) gte_mv_to_data_r((rt), (rd))
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#define gte_cfc2(rt, rd) gte_mv_from_ctrl_r((rt), (rd))
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#define gte_ctc2(rt, rd) gte_mv_to_ctrl_r((rt), (rd))
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/* Data load/store (load/store word to coprocessor 2 data register) */
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#define gte_lwc2(rt, base, off) gte_lw((rt), (base), (off))
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#define gte_swc2(rt, base, off) gte_sw((rt), (base), (off))
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#endif
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