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fixes, de-obufscation... still confused about formating color...

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This commit is contained in:
Edward R. Gonzalez
2026-07-07 22:12:06 -04:00
parent a01e724211
commit 101b07fe71
8 changed files with 73 additions and 42 deletions
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code/duffle/gp.h
+6 -1
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@@ -100,6 +100,12 @@ void gp_screen_init(void) __asm__("gp_screen_init_asm");
// TODO REVIEW:
enum {
gcmd_poly_f3 = 0x20,
gp_poly_f3
};
/* --- GPU Command Semantics (GP0) --- */
#define GPU_CMD_CLEAR_CACHE 0x01
@@ -119,4 +125,3 @@ void gp_screen_init(void) __asm__("gp_screen_init_asm");
#define HW_GP0_ADDR 0x1F801810 /* GPU Data Port */
#define HW_GP1_ADDR 0x1F801814 /* GPU Status/Control Port */
code/duffle/gte.h
+13 -13
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@@ -217,17 +217,17 @@ enum {
* Same pattern as the GPR `_Code` set in mips.h. Note: indices 21-23
* are reserved/unused on real hardware, so there's a gap. */
#define gte_cr_RT11_Code 0
#define gte_cr_RT12_Code 1
#define gte_cr_RT13_Code 2
#define gte_cr_RT21_Code 3
#define gte_cr_RT22_Code 4
#define gte_cr_RT23_Code 5
#define gte_cr_RT31_Code 6
#define gte_cr_RT32_Code 7
#define gte_cr_RT33_Code 8
#define gte_cr_TRX_Code 9
#define gte_cr_TRY_Code 10
#define gte_cr_TRZ_Code 11
#define gte_cr_RT12_Code 1 /* packed with RT13 in bits 16..31 */
#define gte_cr_RT13_Code 2 /* packed with RT22 in bits 16..31 */
#define gte_cr_RT21_Code 3 /* packed with RT31 in bits 16..31 */
#define gte_cr_RT22_Code 4 /* RT33 alone (low 16 bits used) */
// #define gte_cr_RT23_Code 5
// #define gte_cr_RT31_Code 6
// #define gte_cr_RT32_Code 7
// #define gte_cr_RT33_Code 8
#define gte_cr_TRX_Code 5 /* PSX SDK convention: C2 r5 = TRX (alone, 32-bit) */
#define gte_cr_TRY_Code 6 /* PSX SDK convention: C2 r6 = TRY (alone, 32-bit) */
#define gte_cr_TRZ_Code 7 /* PSX SDK convention: C2 r7 = TRZ (alone, 32-bit) */
#define gte_cr_L11_Code 12
#define gte_cr_L12_Code 13
#define gte_cr_L13_Code 14
@@ -248,8 +248,8 @@ enum {
enum {
gte_cr_RT11 = gte_cr_RT11_Code, gte_cr_RT12 = gte_cr_RT12_Code, gte_cr_RT13 = gte_cr_RT13_Code,
gte_cr_RT21 = gte_cr_RT21_Code, gte_cr_RT22 = gte_cr_RT22_Code, gte_cr_RT23 = gte_cr_RT23_Code,
gte_cr_RT31 = gte_cr_RT31_Code, gte_cr_RT32 = gte_cr_RT32_Code, gte_cr_RT33 = gte_cr_RT33_Code,
gte_cr_RT21 = gte_cr_RT21_Code, gte_cr_RT22 = gte_cr_RT22_Code, //gte_cr_RT23 = gte_cr_RT23_Code,
// gte_cr_RT31 = gte_cr_RT31_Code, gte_cr_RT32 = gte_cr_RT32_Code, gte_cr_RT33 = gte_cr_RT33_Code,
gte_cr_TRX = gte_cr_TRX_Code, gte_cr_TRY = gte_cr_TRY_Code, gte_cr_TRZ = gte_cr_TRZ_Code,
gte_cr_L11 = gte_cr_L11_Code, gte_cr_L12 = gte_cr_L12_Code, gte_cr_L13 = gte_cr_L13_Code,
gte_cr_L21 = gte_cr_L21_Code, gte_cr_L22 = gte_cr_L22_Code, gte_cr_L23 = gte_cr_L23_Code,
code/duffle/lottes_tape.h
+17 -18
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@@ -108,24 +108,23 @@ FI_ Slice_U4 tb_slice(TapeBuilder tb) { return (Sli
gte_mt(R_V1, V.z [#]);
*/
#define mac_load_tri_verts(rId_0, rId_1, rId_2) \
shift_ll(R_AT, rId_0, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0) \
, shift_ll(R_AT, rId_1, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY1), gte_mt(R_V1, C2_VZ1) \
, shift_ll(R_AT, rId_2, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY2), gte_mt(R_V1, C2_VZ2)
shift_ll(R_AT, rId_0, v3s2_byteoff), add_u_1(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0) \
, shift_ll(R_AT, rId_1, v3s2_byteoff), add_u_1(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mt(R_V0, C2_VXY1), gte_mt(R_V1, C2_VZ1) \
, shift_ll(R_AT, rId_2, v3s2_byteoff), add_u_1(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mt(R_V0, C2_VXY2), gte_mt(R_V1, C2_VZ2)
//TODO(Ed): Add more type annotation
/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list */
#define mac_insert_ot_tag(r_otz, prim_length) \
shift_ll( R_T1, r_otz, 2) \
, add_u( R_T1, R_T1, R_OtBase) /* T1 = &OrderingTable[OTZ] */ \
, load_word( R_AT, R_T1, 0) /* AT = old_ot_head */ \
, load_ui( R_V0, prim_length) /* V0 = Length << 24 */ \
, shift_ll( R_AT, R_AT, 8) /* Strip upper 8 bits from old_ot */ \
, shift_lr( R_AT, R_AT, 8) \
, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
, store_word(R_AT, R_PrimCursor, 0) /* prim->tag = old_ot_head */ \
, shift_ll( R_AT, R_PrimCursor, 8) /* AT = PrimCur & 0x00FFFFFF */ \
, shift_lr( R_AT, R_AT, 8) \
, store_word(R_AT, R_T1, 0) /* OrderingTable[OTZ] = PrimCur */
#define mac_insert_ot_tag(r_otz, prim_length) \
shift_ll( R_T1, r_otz, 2) /* T1 = r_otz * S_(U4) */ \
, add_u( R_T1, R_T1, R_OtBase) /* T1 = & OrderingTable[OTZ] */ \
, load_word(R_AT, R_T1, O_(PolyTag,bf_addr_len)) /* AT = old_ot_head */ \
, load_ui( R_V0, prim_length) /* V0 = prim_length << 16 (high 16 bits of a tag) */ \
, shift_ll_lr(R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \
, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
, store_word(R_AT, R_PrimCursor, O_(PolyTag,bf_addr_len)) /* prim->tag = packed(prim_length, old_addr) */ \
, shift_ll( R_AT, R_PrimCursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \
, shift_lr( R_AT, R_AT, S_(PolyTag_len_bits)) \
, store_word(R_AT, R_T1, O_(PolyTag,bf_addr_len)) /* OrderingTable[OTZ] = PrimCursor */
#pragma endregion Macro Atom Components
@@ -179,7 +178,7 @@ enum {
*/
// TODO(Ed): Annotate magic offsets
internal MipsAtom_(mips_flush_icache) {
add_ui(rstack_ptr, rstack_ptr, -8) /* sp -= 8 */
add_ui(rstack_ptr, rstack_ptr, -MipsStackAlignment) /* sp -= 8 */
, store_word(rret_addr, rstack_ptr, 4) /* sw $ra, 4($sp) */
, add_ui(rret_0, rdiscard, bios_flushcache) /* addiu $a0, $0, 0x44 */
, add_ui(rtmp_0, rdiscard, bios_table_addr) /* addiu $t0, $0, 0xA0 */
@@ -187,7 +186,7 @@ internal MipsAtom_(mips_flush_icache) {
, nop /* BD slot */
, load_word(rret_addr, rstack_ptr, 4) /* lw $ra, 4($sp) */
, jump_reg(rret_addr) /* jr $ra */
, add_ui(rstack_ptr, rstack_ptr, 8) /* sp += 8 (BD) */
, add_ui(rstack_ptr, rstack_ptr, MipsStackAlignment) /* sp += 8 (BD) */
, mac_yield()
};
@@ -221,7 +220,7 @@ internal MipsAtom_(diag_yield) { mac_yield() };
/* DIAGNOSTIC 2: Pure memory test (No GTE). Draws a fixed cyan triangle. */
internal MipsAtom_(diag_color) {
store_word(R_0, R_T7, 0),
load_ui( R_AT, 0x20FF), /* High: MipsCode 0x20 + Color B:FF */
load_ui( R_AT, gcmd_poly_f3 << 8 | 0xFF), /* High: MipsCode Poly_F3(0x20) + Color B:FF */
or_i( R_AT, R_AT, 0xFF00), /* Low: Color G:FF, R:00 (Cyan) */
store_word(R_AT, R_T7, 4),
code/duffle/math.h
+4
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@@ -7,6 +7,10 @@
#define max(A, B) (((A) > (B)) ? (A) : (B))
#define clamp_bot(X, B) max(X, B)
enum {
v3s2_byteoff = 3, // log2(8), used with shift_left_logical op for index via byte offset.
};
typedef Array_(U4, 2);
typedef Array_(S2, 2);
typedef Array_(S2, 3);
code/duffle/mips.h
+4
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@@ -279,6 +279,8 @@ enum { _BitOffsets = 0
#define shift_lr(rd, rt, shamt) enc_r(op_special, R_0, (rt), (rd), (shamt), fc_srl)
#define shift_ra(rd, rt, shamt) enc_r(op_special, R_0, (rt), (rd), (shamt), fc_sra)
#define shift_ll_lr(rd, rt, shamt) shift_ll(rd, rt, shamt), shift_lr(rd, rt, shamt)
/* jr rs — jump to address in rs. */
#define jump_reg(rs) enc_r(op_special, (rs), R_0, R_0, 0, fc_jr)
@@ -325,6 +327,8 @@ enum { _BitOffsets = 0
#define div_s(rd, rs, rt) enc_r(op_special, (rs), (rt), (rd), 0, fc_div)
#define div_u(rd, rs, rt) enc_r(op_special, (rs), (rt), (rd), 0, fc_divu)
#define add_u_1(rd_rs, rt) add_u(rd_rs, rd_rs, rt)
/* --- Arithmetic I-type (immediate) --- */
#define add_si(rt, rs, imm) enc_i(op_addi, (rs), (rt), (imm))
/* add_ui already exists above as add_ui */
code/gte_hello/hello_gte.c
+6 -6
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@@ -335,8 +335,8 @@ void update(PrimitiveArena* pa, U4* ordering_buf)
m3s2_translation(& smem.tform_world, & smem.floor.pos);
m3s2_scale (& smem.tform_world, & smem.floor.scale);
// TODO(Ed): This can either be in the tape or here...
gte_matrix_set_rotation (& smem.tform_world);
gte_matrix_set_translation(& smem.tform_world);
// gte_matrix_set_rotation (& smem.tform_world);
// gte_matrix_set_translation(& smem.tform_world);
U4 prim_base = u4_(pa->buf[smem.active_buf_id]);
U4 prim_cursor = prim_base + pa->used;
@@ -348,8 +348,8 @@ void update(PrimitiveArena* pa, U4* ordering_buf)
LP_ U4 mem_temp_tape[512];
TapeBuilder tb = tb_make(slice_ut_arr(mem_temp_tape)); tb_scope(& tb) {
// TODO(Ed): This is bugged.
// tb_emit(& tb, code_set_gte_world);
// tb_data(& tb, u4_(& smem.tform_world));
tb_emit(& tb, code_set_gte_world);
tb_data(& tb, u4_(& smem.tform_world));
tb_emit(& tb, code_rbind_floor_tri);
// TODO(Ed): Just use a single context struct ref
@@ -372,7 +372,7 @@ void update(PrimitiveArena* pa, U4* ordering_buf)
smem.floor.rot.y += 5;
}
// --- TAPE DIAGNOSTICS ---
if (0)
if (1)
{
LP_ U4 mem_temp_tape[512]; FArena tape_arena; farena_init(& tape_arena, slice_ut_arr(mem_temp_tape));
TapeBuilder tb = tb_make_old(& tape_arena); tb_scope(& tb) {
@@ -385,7 +385,7 @@ void update(PrimitiveArena* pa, U4* ordering_buf)
// 2. code_diag_color -> Tests OT and Prim Arena memory
// 3. code_diag_gte -> Tests Vertex arrays and GTE Math
// tb_emit(& tb, code_diag_yield);
// tb_emit(& tb, code_diag_color); //TODO(Ed): Stopped working
tb_emit(& tb, code_diag_color);
// tb_emit(& tb, code_diag_gte);
}
}
code/gte_hello/hello_gte.h
+11 -2
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@@ -63,9 +63,18 @@ U4 vsync(U4 mode) __asm__("VSync");
void draw_orderingtbl(U4* buf) __asm__("DrawOTag");
enum {
PolyTag_addr_bits = 24,
PolyTag_len_bits = 8,
};
typedef Struct_(PolyTag) {
U4 addr: 24;
U4 len: 8;
union {
U4 bf_addr_len;
struct {
U4 addr: 24;
U4 len: 8;
};
};
RGB8 color;
B1 code;
};
code/gte_hello/hello_gte_tape.c
+12 -2
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@@ -7,10 +7,19 @@
#endif
#pragma region MACs (Mips Atom components)
// load_ui( R_AT, color_hi) \
enum fack {
ah = gcmd_poly_f3 << 8 | 0xFF,
};
void fk() {
(void*)ah;
}
/* Words: 3; High: 0x20/B, Low: G/R */
#define mac_format_f3_color(color_hi, color_lo) \
load_ui(R_AT, color_hi), or_i(R_AT, R_AT, color_lo) \
load_ui( R_AT, gcmd_poly_f3 << 8 | color_hi) \
, or_i( R_AT, R_AT, color_lo) \
, store_word(R_AT, R_PrimCursor, O_(Poly_F3,color)) \
/* Words: 3 */
@@ -192,7 +201,8 @@ MipsAtom_(floor_tri) {
nop, branch_le_zero(R_T0, atom_offset(culling, floor_tri_exit)),
nop,
/* Format Primitive */
mac_format_f3_color(0x20FF, 0xFFFF),
// mac_format_f3_color(0x20FF, 0xFFFF), // works
mac_format_f3_color(0xFF, 0xFFFF), // doesn't work
mac_gte_store_f3(),
/* Calculate Depth */
nop, nop, gte_avg_sort_z3,