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30 lines
1.1 KiB
HTML
30 lines
1.1 KiB
HTML
<html><head><link rel="stylesheet" href="style.css"></head><body><div class="page">
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<h1>20090605 - SIMD Binning And Caches</h1>
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<br>
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<pre>... since scatter time is a function of the number of cache lines,
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it might NOT be wise to bin into queues arranged in memory like this,
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int Queue4Pixel0[16], int Queue4Pixel1[16], int Queue4Pixel2[16], ...
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offset = (pixel << 4) + bin
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Because only 1 queue would be on a cache line, so the scatter at best would be 16 cycles.
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Read back of the data later also might not be ideal in this format.
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Other option is this which has better cache locality at the expense of more complex offset logic,
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int QueueBin0ForPixels0to16[16], int QueueBin1ForPixels0to16[16], ...
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offset = (pixel & 15) + (((pixel & (~15)) + bin) << 4);
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So for each grouping of 16 pixels, each queue bin is on the same cache line.
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Which in the completely coherent case would take a clock cycle to scatter to,
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and would degrade in performance as a function of
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how many different queue lengths there are in the groupings of 16 pixels.
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</pre>
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</div></body></html>
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