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Remove intrinsics.x86_mmx type

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This commit is contained in:
gingerBill
2021-04-22 10:39:20 +01:00
parent 158e4c0b6c
commit 0a66f8c9a3
14 changed files with 25 additions and 101 deletions
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core/fmt/fmt.odin
-3
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@@ -1638,9 +1638,6 @@ fmt_value :: proc(fi: ^Info, v: any, verb: rune) {
}
case runtime.Type_Info_Simd_Vector:
if info.is_x86_mmx {
io.write_string(fi.writer, "intrinsics.x86_mmx<>");
}
io.write_byte(fi.writer, '<');
defer io.write_byte(fi.writer, '>');
for i in 0..<info.count {
core/intrinsics/intrinsics.odin
-4
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@@ -2,10 +2,6 @@
//+ignore
package intrinsics
// Types
x86_mmx :: x86_mmx; // Specialized SIMD Vector type
// Types
simd_vector :: proc($N: int, $T: typeid) -> type/#simd[N]T
soa_struct :: proc($N: int, $T: typeid) -> type/#soa[N]T
core/odin/doc-format/doc_format.odin
-5
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@@ -212,11 +212,6 @@ Type_Flag_Bit_Set :: enum u32le {
Underlying_Type = 4,
}
Type_Flags_SimdVector :: distinct bit_set[Type_Flag_SimdVector; u32le];
Type_Flag_SimdVector :: enum u32le {
x86_mmx = 1,
}
from_array :: proc(base: ^Header_Base, a: $A/Array($T)) -> []T {
s: mem.Raw_Slice;
s.data = rawptr(uintptr(base) + uintptr(a.offset));
core/reflect/types.odin
+4 -8
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@@ -565,14 +565,10 @@ write_type_writer :: proc(w: io.Writer, ti: ^Type_Info) -> (n: int) {
n += _n(io.write_byte(w, ']'));
case Type_Info_Simd_Vector:
if info.is_x86_mmx {
n += write_string(w, "intrinsics.x86_mmx");
} else {
n += write_string(w, "#simd[");
n += _n(io.write_i64(w, i64(info.count)));
n += _n(io.write_byte(w, ']'));
n += write_type(w, info.elem);
}
n += write_string(w, "#simd[");
n += _n(io.write_i64(w, i64(info.count)));
n += _n(io.write_byte(w, ']'));
n += write_type(w, info.elem);
case Type_Info_Relative_Pointer:
n += write_string(w, "#relative(");
core/runtime/core.odin
-1
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@@ -144,7 +144,6 @@ Type_Info_Simd_Vector :: struct {
elem: ^Type_Info,
elem_size: int,
count: int,
is_x86_mmx: bool,
};
Type_Info_Relative_Pointer :: struct {
pointer: ^Type_Info,
core/runtime/print.odin
+4 -8
View File
@@ -347,14 +347,10 @@ print_type :: proc "contextless" (ti: ^Type_Info) {
case Type_Info_Simd_Vector:
if info.is_x86_mmx {
print_string("intrinsics.x86_mmx");
} else {
print_string("#simd[");
print_u64(u64(info.count));
print_byte(']');
print_type(info.elem);
}
print_string("#simd[");
print_u64(u64(info.count));
print_byte(']');
print_type(info.elem);
case Type_Info_Relative_Pointer:
print_string("#relative(");
src/check_expr.cpp
-3
View File
@@ -9324,9 +9324,6 @@ ExprKind check_expr_base_internal(CheckerContext *c, Operand *o, Ast *node, Type
if (!is_constant) {
error(node, "Expected all constant elements for a simd vector");
}
if (t->SimdVector.is_x86_mmx) {
error(node, "Compound literals are not allowed with intrinsics.x86_mmx");
}
}
src/checker.cpp
-9
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@@ -783,15 +783,6 @@ void init_universal(void) {
}
}
// TODO(bill): Set the correct arch for this
if (bc->metrics.arch == TargetArch_amd64 || bc->metrics.arch == TargetArch_386) {
t_vector_x86_mmx = alloc_type(Type_SimdVector);
t_vector_x86_mmx->SimdVector.is_x86_mmx = true;
Entity *entity = alloc_entity(Entity_TypeName, nullptr, make_token_ident(str_lit("x86_mmx")), t_vector_x86_mmx);
add_global_entity(entity, intrinsics_pkg->scope);
}
bool defined_values_double_declaration = false;
for_array(i, bc->defined_values.entries) {
char const *name = cast(char const *)cast(uintptr)bc->defined_values.entries[i].key.key;
src/docs_format.cpp
-4
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@@ -114,10 +114,6 @@ enum OdinDocTypeFlag_BitSet : u32 {
OdinDocTypeFlag_BitSet_UnderlyingType = 1<<4,
};
enum OdinDocTypeFlag_SimdVector : u32 {
OdinDocTypeFlag_BitSet_x86_mmx = 1<<1,
};
enum {
// constants
OdinDocType_ElemsCap = 4,
src/docs_writer.cpp
+3 -7
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@@ -724,13 +724,9 @@ OdinDocTypeIndex odin_doc_type(OdinDocWriter *w, Type *type) {
break;
case Type_SimdVector:
doc_type.kind = OdinDocType_SimdVector;
if (type->SimdVector.is_x86_mmx) {
doc_type.flags |= OdinDocTypeFlag_BitSet_x86_mmx;
} else {
doc_type.elem_count_len = 1;
doc_type.elem_counts[0] = type->SimdVector.count;
doc_type.types = odin_doc_type_as_slice(w, type->SimdVector.elem);
}
doc_type.elem_count_len = 1;
doc_type.elem_counts[0] = type->SimdVector.count;
doc_type.types = odin_doc_type_as_slice(w, type->SimdVector.elem);
// TODO(bill):
break;
case Type_RelativePointer:
src/ir.cpp
+3 -7
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@@ -12564,13 +12564,9 @@ void ir_setup_type_info_data(irProcedure *proc) { // NOTE(bill): Setup type_info
case Type_SimdVector:
ir_emit_comment(proc, str_lit("Type_SimdVector"));
tag = ir_emit_conv(proc, variant_ptr, t_type_info_simd_vector_ptr);
if (t->SimdVector.is_x86_mmx) {
ir_emit_store(proc, ir_emit_struct_ep(proc, tag, 3), v_true);
} else {
ir_emit_store(proc, ir_emit_struct_ep(proc, tag, 0), ir_get_type_info_ptr(proc, t->SimdVector.elem));
ir_emit_store(proc, ir_emit_struct_ep(proc, tag, 1), ir_const_int(type_size_of(t->SimdVector.elem)));
ir_emit_store(proc, ir_emit_struct_ep(proc, tag, 2), ir_const_int(t->SimdVector.count));
}
ir_emit_store(proc, ir_emit_struct_ep(proc, tag, 0), ir_get_type_info_ptr(proc, t->SimdVector.elem));
ir_emit_store(proc, ir_emit_struct_ep(proc, tag, 1), ir_const_int(type_size_of(t->SimdVector.elem)));
ir_emit_store(proc, ir_emit_struct_ep(proc, tag, 2), ir_const_int(t->SimdVector.count));
break;
case Type_RelativePointer:
src/ir_print.cpp
+3 -7
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@@ -624,13 +624,9 @@ void ir_print_type(irFileBuffer *f, irModule *m, Type *t, bool in_struct) {
}
case Type_SimdVector:
if (t->SimdVector.is_x86_mmx) {
ir_write_str_lit(f, "x86_mmx");
} else {
ir_fprintf(f, "<%lld x ", t->SimdVector.count);;
ir_print_type(f, m, t->SimdVector.elem);
ir_write_byte(f, '>');
}
ir_fprintf(f, "<%lld x ", t->SimdVector.count);;
ir_print_type(f, m, t->SimdVector.elem);
ir_write_byte(f, '>');
return;
case Type_RelativePointer:
src/llvm_backend.cpp
+4 -14
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@@ -1445,9 +1445,6 @@ LLVMTypeRef lb_type_internal(lbModule *m, Type *type) {
}
case Type_SimdVector:
if (type->SimdVector.is_x86_mmx) {
return LLVMX86MMXTypeInContext(ctx);
}
return LLVMVectorType(lb_type(m, type->SimdVector.elem), cast(unsigned)type->SimdVector.count);
case Type_RelativePointer:
@@ -1899,9 +1896,6 @@ LLVMMetadataRef lb_debug_type_internal(lbModule *m, Type *type) {
break;
case Type_SimdVector:
if (type->SimdVector.is_x86_mmx) {
return LLVMDIBuilderCreateVectorType(m->debug_builder, 2, 8*cast(unsigned)type_align_of(type), lb_debug_type(m, t_f64), nullptr, 0);
}
return LLVMDIBuilderCreateVectorType(m->debug_builder, cast(unsigned)type->SimdVector.count, 8*cast(unsigned)type_align_of(type), lb_debug_type(m, type->SimdVector.elem), nullptr, 0);
case Type_RelativePointer: {
@@ -13432,15 +13426,11 @@ void lb_setup_type_info_data(lbProcedure *p) { // NOTE(bill): Setup type_info da
{
tag = lb_const_ptr_cast(m, variant_ptr, t_type_info_simd_vector_ptr);
LLVMValueRef vals[4] = {};
LLVMValueRef vals[3] = {};
if (t->SimdVector.is_x86_mmx) {
vals[3] = lb_const_bool(m, t_bool, true).value;
} else {
vals[0] = lb_get_type_info_ptr(m, t->SimdVector.elem).value;
vals[1] = lb_const_int(m, t_int, type_size_of(t->SimdVector.elem)).value;
vals[2] = lb_const_int(m, t_int, t->SimdVector.count).value;
}
vals[0] = lb_get_type_info_ptr(m, t->SimdVector.elem).value;
vals[1] = lb_const_int(m, t_int, type_size_of(t->SimdVector.elem)).value;
vals[2] = lb_const_int(m, t_int, t->SimdVector.count).value;
lbValue res = {};
res.type = type_deref(tag.type);
src/types.cpp
+4 -21
View File
@@ -283,7 +283,6 @@ struct TypeProc {
TYPE_KIND(SimdVector, struct { \
i64 count; \
Type *elem; \
bool is_x86_mmx; \
}) \
TYPE_KIND(RelativePointer, struct { \
Type *pointer_type; \
@@ -679,8 +678,6 @@ gb_global Type *t_source_code_location_ptr = nullptr;
gb_global Type *t_map_hash = nullptr;
gb_global Type *t_map_header = nullptr;
gb_global Type *t_vector_x86_mmx = nullptr;
gb_global Type *t_equal_proc = nullptr;
gb_global Type *t_hasher_proc = nullptr;
@@ -2162,12 +2159,8 @@ bool are_types_identical(Type *x, Type *y) {
case Type_SimdVector:
if (y->kind == Type_SimdVector) {
if (x->SimdVector.is_x86_mmx == y->SimdVector.is_x86_mmx) {
if (x->SimdVector.is_x86_mmx) {
return true;
} else if (x->SimdVector.count == y->SimdVector.count) {
return are_types_identical(x->SimdVector.elem, y->SimdVector.elem);
}
if (x->SimdVector.count == y->SimdVector.count) {
return are_types_identical(x->SimdVector.elem, y->SimdVector.elem);
}
}
break;
@@ -2967,9 +2960,6 @@ i64 type_align_of_internal(Type *t, TypePath *path) {
}
case Type_SimdVector: {
if (t->SimdVector.is_x86_mmx) {
return 8;
}
// align of
i64 count = t->SimdVector.count;
Type *elem = t->SimdVector.elem;
@@ -3233,9 +3223,6 @@ i64 type_size_of_internal(Type *t, TypePath *path) {
}
case Type_SimdVector: {
if (t->SimdVector.is_x86_mmx) {
return 8;
}
i64 count = t->SimdVector.count;
Type *elem = t->SimdVector.elem;
return count * type_size_of_internal(elem, path);
@@ -3670,12 +3657,8 @@ gbString write_type_to_string(gbString str, Type *type) {
break;
case Type_SimdVector:
if (type->SimdVector.is_x86_mmx) {
return gb_string_appendc(str, "intrinsics.x86_mmx");
} else {
str = gb_string_append_fmt(str, "#simd[%d]", cast(int)type->SimdVector.count);
str = write_type_to_string(str, type->SimdVector.elem);
}
str = gb_string_append_fmt(str, "#simd[%d]", cast(int)type->SimdVector.count);
str = write_type_to_string(str, type->SimdVector.elem);
break;
case Type_RelativePointer: