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avx512 registers & fixes for getting & setting x64 context

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This commit is contained in:
Martins Mozeiko
2024-07-23 08:43:35 -07:00
committed by Ryan Fleury
parent 14759e49e9
commit ce7c8d5244
10 changed files with 1207 additions and 819 deletions
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src/regs/generated/regs.meta.c
+233 -113
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@@ -103,7 +103,7 @@ case Architecture_x86:{result = regs_g_alias_code_x86_usage_kind_table;}break;
return result;
}
C_LINKAGE_BEGIN
REGS_UsageKind regs_g_reg_code_x64_usage_kind_table[77] =
REGS_UsageKind regs_g_reg_code_x64_usage_kind_table[101] =
{
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
@@ -182,66 +182,6 @@ REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
};
REGS_UsageKind regs_g_alias_code_x64_usage_kind_table[80] =
{
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
@@ -268,7 +208,107 @@ REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
};
String8 regs_g_reg_code_x64_string_table[77] =
REGS_UsageKind regs_g_alias_code_x64_usage_kind_table[96] =
{
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
REGS_UsageKind_Normal,
};
String8 regs_g_reg_code_x64_string_table[101] =
{
str8_lit_comp(""),
str8_lit_comp("rax"),
@@ -331,25 +371,49 @@ str8_lit_comp("ds"),
str8_lit_comp("es"),
str8_lit_comp("fs"),
str8_lit_comp("gs"),
str8_lit_comp("ymm0"),
str8_lit_comp("ymm1"),
str8_lit_comp("ymm2"),
str8_lit_comp("ymm3"),
str8_lit_comp("ymm4"),
str8_lit_comp("ymm5"),
str8_lit_comp("ymm6"),
str8_lit_comp("ymm7"),
str8_lit_comp("ymm8"),
str8_lit_comp("ymm9"),
str8_lit_comp("ymm10"),
str8_lit_comp("ymm11"),
str8_lit_comp("ymm12"),
str8_lit_comp("ymm13"),
str8_lit_comp("ymm14"),
str8_lit_comp("ymm15"),
str8_lit_comp("zmm0"),
str8_lit_comp("zmm1"),
str8_lit_comp("zmm2"),
str8_lit_comp("zmm3"),
str8_lit_comp("zmm4"),
str8_lit_comp("zmm5"),
str8_lit_comp("zmm6"),
str8_lit_comp("zmm7"),
str8_lit_comp("zmm8"),
str8_lit_comp("zmm9"),
str8_lit_comp("zmm10"),
str8_lit_comp("zmm11"),
str8_lit_comp("zmm12"),
str8_lit_comp("zmm13"),
str8_lit_comp("zmm14"),
str8_lit_comp("zmm15"),
str8_lit_comp("zmm16"),
str8_lit_comp("zmm17"),
str8_lit_comp("zmm18"),
str8_lit_comp("zmm19"),
str8_lit_comp("zmm20"),
str8_lit_comp("zmm21"),
str8_lit_comp("zmm22"),
str8_lit_comp("zmm23"),
str8_lit_comp("zmm24"),
str8_lit_comp("zmm25"),
str8_lit_comp("zmm26"),
str8_lit_comp("zmm27"),
str8_lit_comp("zmm28"),
str8_lit_comp("zmm29"),
str8_lit_comp("zmm30"),
str8_lit_comp("zmm31"),
str8_lit_comp("k0"),
str8_lit_comp("k1"),
str8_lit_comp("k2"),
str8_lit_comp("k3"),
str8_lit_comp("k4"),
str8_lit_comp("k5"),
str8_lit_comp("k6"),
str8_lit_comp("k7"),
};
String8 regs_g_alias_code_x64_string_table[80] =
String8 regs_g_alias_code_x64_string_table[96] =
{
str8_lit_comp(""),
str8_lit_comp("eax"),
@@ -423,6 +487,22 @@ str8_lit_comp("xmm12"),
str8_lit_comp("xmm13"),
str8_lit_comp("xmm14"),
str8_lit_comp("xmm15"),
str8_lit_comp("ymm0"),
str8_lit_comp("ymm1"),
str8_lit_comp("ymm2"),
str8_lit_comp("ymm3"),
str8_lit_comp("ymm4"),
str8_lit_comp("ymm5"),
str8_lit_comp("ymm6"),
str8_lit_comp("ymm7"),
str8_lit_comp("ymm8"),
str8_lit_comp("ymm9"),
str8_lit_comp("ymm10"),
str8_lit_comp("ymm11"),
str8_lit_comp("ymm12"),
str8_lit_comp("ymm13"),
str8_lit_comp("ymm14"),
str8_lit_comp("ymm15"),
str8_lit_comp("mm0"),
str8_lit_comp("mm1"),
str8_lit_comp("mm2"),
@@ -433,7 +513,7 @@ str8_lit_comp("mm6"),
str8_lit_comp("mm7"),
};
REGS_Rng regs_g_reg_code_x64_rng_table[77] =
REGS_Rng regs_g_reg_code_x64_rng_table[101] =
{
{0},
{(U16)OffsetOf(REGS_RegBlockX64, rax), 8},
@@ -496,25 +576,49 @@ REGS_Rng regs_g_reg_code_x64_rng_table[77] =
{(U16)OffsetOf(REGS_RegBlockX64, es), 2},
{(U16)OffsetOf(REGS_RegBlockX64, fs), 2},
{(U16)OffsetOf(REGS_RegBlockX64, gs), 2},
{(U16)OffsetOf(REGS_RegBlockX64, ymm0), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm1), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm2), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm3), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm4), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm5), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm6), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm7), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm8), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm9), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm10), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm11), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm12), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm13), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm14), 32},
{(U16)OffsetOf(REGS_RegBlockX64, ymm15), 32},
{(U16)OffsetOf(REGS_RegBlockX64, zmm0), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm1), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm2), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm3), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm4), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm5), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm6), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm7), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm8), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm9), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm10), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm11), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm12), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm13), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm14), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm15), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm16), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm17), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm18), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm19), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm20), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm21), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm22), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm23), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm24), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm25), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm26), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm27), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm28), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm29), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm30), 64},
{(U16)OffsetOf(REGS_RegBlockX64, zmm31), 64},
{(U16)OffsetOf(REGS_RegBlockX64, k0), 8},
{(U16)OffsetOf(REGS_RegBlockX64, k1), 8},
{(U16)OffsetOf(REGS_RegBlockX64, k2), 8},
{(U16)OffsetOf(REGS_RegBlockX64, k3), 8},
{(U16)OffsetOf(REGS_RegBlockX64, k4), 8},
{(U16)OffsetOf(REGS_RegBlockX64, k5), 8},
{(U16)OffsetOf(REGS_RegBlockX64, k6), 8},
{(U16)OffsetOf(REGS_RegBlockX64, k7), 8},
};
REGS_Slice regs_g_alias_code_x64_slice_table[80] =
REGS_Slice regs_g_alias_code_x64_slice_table[96] =
{
{0},
{REGS_RegCodeX64_rax, 0, 4},
@@ -572,22 +676,38 @@ REGS_Slice regs_g_alias_code_x64_slice_table[80] =
{REGS_RegCodeX64_rcx, 1, 1},
{REGS_RegCodeX64_rdx, 1, 1},
{REGS_RegCodeX64_rbx, 1, 1},
{REGS_RegCodeX64_ymm0, 0, 16},
{REGS_RegCodeX64_ymm1, 0, 16},
{REGS_RegCodeX64_ymm2, 0, 16},
{REGS_RegCodeX64_ymm3, 0, 16},
{REGS_RegCodeX64_ymm4, 0, 16},
{REGS_RegCodeX64_ymm5, 0, 16},
{REGS_RegCodeX64_ymm6, 0, 16},
{REGS_RegCodeX64_ymm7, 0, 16},
{REGS_RegCodeX64_ymm8, 0, 16},
{REGS_RegCodeX64_ymm9, 0, 16},
{REGS_RegCodeX64_ymm10, 0, 16},
{REGS_RegCodeX64_ymm11, 0, 16},
{REGS_RegCodeX64_ymm12, 0, 16},
{REGS_RegCodeX64_ymm13, 0, 16},
{REGS_RegCodeX64_ymm14, 0, 16},
{REGS_RegCodeX64_ymm15, 0, 16},
{REGS_RegCodeX64_zmm0, 0, 16},
{REGS_RegCodeX64_zmm1, 0, 16},
{REGS_RegCodeX64_zmm2, 0, 16},
{REGS_RegCodeX64_zmm3, 0, 16},
{REGS_RegCodeX64_zmm4, 0, 16},
{REGS_RegCodeX64_zmm5, 0, 16},
{REGS_RegCodeX64_zmm6, 0, 16},
{REGS_RegCodeX64_zmm7, 0, 16},
{REGS_RegCodeX64_zmm8, 0, 16},
{REGS_RegCodeX64_zmm9, 0, 16},
{REGS_RegCodeX64_zmm10, 0, 16},
{REGS_RegCodeX64_zmm11, 0, 16},
{REGS_RegCodeX64_zmm12, 0, 16},
{REGS_RegCodeX64_zmm13, 0, 16},
{REGS_RegCodeX64_zmm14, 0, 16},
{REGS_RegCodeX64_zmm15, 0, 16},
{REGS_RegCodeX64_zmm0, 0, 32},
{REGS_RegCodeX64_zmm1, 0, 32},
{REGS_RegCodeX64_zmm2, 0, 32},
{REGS_RegCodeX64_zmm3, 0, 32},
{REGS_RegCodeX64_zmm4, 0, 32},
{REGS_RegCodeX64_zmm5, 0, 32},
{REGS_RegCodeX64_zmm6, 0, 32},
{REGS_RegCodeX64_zmm7, 0, 32},
{REGS_RegCodeX64_zmm8, 0, 32},
{REGS_RegCodeX64_zmm9, 0, 32},
{REGS_RegCodeX64_zmm10, 0, 32},
{REGS_RegCodeX64_zmm11, 0, 32},
{REGS_RegCodeX64_zmm12, 0, 32},
{REGS_RegCodeX64_zmm13, 0, 32},
{REGS_RegCodeX64_zmm14, 0, 32},
{REGS_RegCodeX64_zmm15, 0, 32},
{REGS_RegCodeX64_fpr0, 0, 8},
{REGS_RegCodeX64_fpr1, 0, 8},
{REGS_RegCodeX64_fpr2, 0, 8},