mirror of
https://github.com/Ed94/raddebugger.git
synced 2026-08-14 17:28:07 +00:00
re-plug raddbg markup data section into module image info cache; fix detachment signifying
This commit is contained in:
+1
-1
@@ -47,7 +47,7 @@ commands =
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{
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{
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//- rjf: [raddbg]
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//- rjf: [raddbg]
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// .f1 = { .win = "raddbg_stable --ipc kill_all && build raddbg meta telemetry", .linux = "", .out = "*compilation*", .footer_panel = true, .save_dirty_files = true, .cursor_at_end = false, },
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// .f1 = { .win = "raddbg_stable --ipc kill_all && build raddbg meta telemetry", .linux = "", .out = "*compilation*", .footer_panel = true, .save_dirty_files = true, .cursor_at_end = false, },
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.f1 = { .win = "raddbg_stable --ipc kill_all && build radbin debug telemetry", .linux = "", .out = "*compilation*", .footer_panel = true, .save_dirty_files = true, .cursor_at_end = false, },
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.f1 = { .win = "raddbg_stable --ipc kill_all && build raddbg debug telemetry", .linux = "", .out = "*compilation*", .footer_panel = true, .save_dirty_files = true, .cursor_at_end = false, },
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//- rjf: [raddbg wsl]
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//- rjf: [raddbg wsl]
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// .f1 = { .win = "wsl ./build.sh raddbg", .linux = "", .out = "*compilation*", .footer_panel = true, .save_dirty_files = true, .cursor_at_end = false, },
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// .f1 = { .win = "wsl ./build.sh raddbg", .linux = "", .out = "*compilation*", .footer_panel = true, .save_dirty_files = true, .cursor_at_end = false, },
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+56
-54
@@ -1883,7 +1883,7 @@ ctrl_establish_frame_unwind_context__dwarf(Arena *arena, CTRL_Handle process_han
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{
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{
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Temp scratch = scratch_begin(&arena, 1);
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Temp scratch = scratch_begin(&arena, 1);
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CTRL_UnwindStepResult result = { .flags = CTRL_UnwindFlag_Error };
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CTRL_UnwindStepResult result = { .flags = CTRL_UnwindFlag_Error };
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// gather context for virtual stack unwinder
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// gather context for virtual stack unwinder
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U64 cfi_rebase = 0;
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U64 cfi_rebase = 0;
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B32 is_unwind_eh = 0;
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B32 is_unwind_eh = 0;
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@@ -2057,11 +2057,11 @@ ctrl_establish_frame_unwind_context__dwarf(Arena *arena, CTRL_Handle process_han
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}break;
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}break;
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default: { InvalidPath; }break;
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default: { InvalidPath; }break;
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}
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}
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// compute CFA for the row
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// compute CFA for the row
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U64 cfa = 0;
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U64 cfa = 0;
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MachineOpResult unwind_status = dw_compute_cfa(arch, cfi_row, mem_read_func, mem_read_ctx, reg_read_func, reg_read_ctx, &cfa);
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MachineOpResult unwind_status = dw_compute_cfa(arch, cfi_row, mem_read_func, mem_read_ctx, reg_read_func, reg_read_ctx, &cfa);
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// on success fill out output
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// on success fill out output
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if(unwind_status == MachineOpResult_Ok)
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if(unwind_status == MachineOpResult_Ok)
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{
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{
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@@ -2069,13 +2069,13 @@ ctrl_establish_frame_unwind_context__dwarf(Arena *arena, CTRL_Handle process_han
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ctx_out->cfi_row = cfi_row;
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ctx_out->cfi_row = cfi_row;
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ctx_out->ret_addr_reg = cie.ret_addr_reg;
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ctx_out->ret_addr_reg = cie.ret_addr_reg;
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}
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}
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// translate unwind status code
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// translate unwind status code
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result = ctrl_unwind_step_result_from_machine_op_result(unwind_status);
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result = ctrl_unwind_step_result_from_machine_op_result(unwind_status);
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}
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}
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}
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}
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}
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}
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scratch_end(scratch);
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scratch_end(scratch);
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return result;
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return result;
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}
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}
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@@ -2119,7 +2119,7 @@ ctrl_unwind_step__dwarf(CTRL_Handle process_handle, Arch arch, void *regs, CTRL_
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}break;
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}break;
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default: { InvalidPath; }break;
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default: { InvalidPath; }break;
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}
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}
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// apply register rules to the context
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// apply register rules to the context
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MachineOpResult unwind_status = dw_cfi_apply_register_rules(arch,
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MachineOpResult unwind_status = dw_cfi_apply_register_rules(arch,
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frame_ctx->cfa,
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frame_ctx->cfa,
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@@ -2130,7 +2130,7 @@ ctrl_unwind_step__dwarf(CTRL_Handle process_handle, Arch arch, void *regs, CTRL_
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reg_read_ctx,
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reg_read_ctx,
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reg_write_func,
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reg_write_func,
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reg_write_ctx);
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reg_write_ctx);
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// last frame typically has undefined rule for IP
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// last frame typically has undefined rule for IP
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if(frame_ctx->cfi_row->regs[frame_ctx->ret_addr_reg].rule == DW_CFI_RegisterRule_Undefined)
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if(frame_ctx->cfi_row->regs[frame_ctx->ret_addr_reg].rule == DW_CFI_RegisterRule_Undefined)
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{
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{
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@@ -3013,16 +3013,16 @@ ctrl_unwind_from_thread(Arena *arena, CTRL_EntityCtx *ctx, CTRL_Handle thread, U
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{
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{
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U64 rip = regs_rip_from_arch_block(arch, regs_block);
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U64 rip = regs_rip_from_arch_block(arch, regs_block);
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U64 rsp = regs_rsp_from_arch_block(arch, regs_block);
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U64 rsp = regs_rsp_from_arch_block(arch, regs_block);
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// rjf: cancel on 0 rip
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// rjf: cancel on 0 rip
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if(rip == 0)
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if(rip == 0)
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{
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{
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break;
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break;
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}
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}
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// rip -> module
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// rip -> module
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CTRL_Entity *module_entity = ctrl_module_from_process_vaddr(process_entity, rip);
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CTRL_Entity *module_entity = ctrl_module_from_process_vaddr(process_entity, rip);
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// establish frame context
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// establish frame context
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CTRL_FrameUnwindContext frame_ctx = {0};
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CTRL_FrameUnwindContext frame_ctx = {0};
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CTRL_UnwindStepResult frame_ctx_result = {0};
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CTRL_UnwindStepResult frame_ctx_result = {0};
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@@ -3095,7 +3095,7 @@ ctrl_unwind_from_thread(Arena *arena, CTRL_EntityCtx *ctx, CTRL_Handle thread, U
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// stop unwinding on errors or stale data
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// stop unwinding on errors or stale data
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unwind.flags |= step_result.flags;
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unwind.flags |= step_result.flags;
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if(unwind.flags & (CTRL_UnwindFlag_Stale|CTRL_UnwindFlag_Error) ||
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if(unwind.flags & (CTRL_UnwindFlag_Stale|CTRL_UnwindFlag_Error) ||
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(regs_rsp_from_arch_block(arch, regs_block) == rsp && regs_rip_from_arch_block(arch, regs_block) == rip))
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(regs_rsp_from_arch_block(arch, regs_block) == rsp && regs_rip_from_arch_block(arch, regs_block) == rip))
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{
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{
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break;
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break;
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}
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}
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@@ -3772,29 +3772,28 @@ ctrl_thread__module_open(CTRL_Handle process, CTRL_Handle module, Rng1U64 vaddr_
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{
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{
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Temp scratch = scratch_begin(0,0);
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Temp scratch = scratch_begin(0,0);
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Arena *arena = arena_alloc();
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//- rjf: set up per-module info
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U64 entry_point_voff = 0;
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Arena *arena = arena_alloc();
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U32 rdi_dbg_time = 0;
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U64 entry_point_voff = 0;
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Guid rdi_dbg_guid = {0};
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U32 rdi_dbg_time = 0;
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String8 exe_dbg_path = {0};
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Guid rdi_dbg_guid = {0};
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String8 rdi_dbg_path = {0};
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String8 exe_dbg_path = {0};
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String8 raddbg_data = {0};
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String8 rdi_dbg_path = {0};
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Rng1U64 raddbg_section_voff_range = r1u64(0, 0);
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String8 raddbg_data = {0};
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Rng1U64 raddbg_is_attached_section_voff_range = r1u64(0, 0);
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Rng1U64 raddbg_section_voff_range = {0};
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Rng1U64 raddbg_is_attached_section_voff_range = {0};
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PE_IntelPdata *pdatas = 0;
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PE_IntelPdata *pdatas = 0;
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U64 pdatas_count = 0;
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U64 pdatas_count = 0;
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U32 pdb_dbg_time = 0;
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U32 pdb_dbg_time = 0;
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U32 pdb_dbg_age = 0;
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U32 pdb_dbg_age = 0;
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Guid pdb_dbg_guid = {0};
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Guid pdb_dbg_guid = {0};
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String8 pdb_dbg_path = {0};
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String8 pdb_dbg_path = {0};
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U64 cfi_rebase = 0;
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U64 cfi_rebase = 0;
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B32 is_unwind_eh = 0;
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B32 is_unwind_eh = 0;
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EH_FrameHdr eh_frame_hdr = {0};
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EH_FrameHdr eh_frame_hdr = {0};
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EH_PtrCtx eh_ptr_ctx = { .pc_vaddr = max_U64, .text_vaddr = max_U64, .data_vaddr = max_U64, .func_vaddr = max_U64, .ptr_align = 0 };
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EH_PtrCtx eh_ptr_ctx = { .pc_vaddr = max_U64, .text_vaddr = max_U64, .data_vaddr = max_U64, .func_vaddr = max_U64, .ptr_align = 0 };
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// read module's signature bytes
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//- read module's signature bytes
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U64 module_sig_size = Max(elf_magic_string.size, sizeof(PE_DosMagic));
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U64 module_sig_size = Max(elf_magic_string.size, sizeof(PE_DosMagic));
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U8 *module_sig_bytes = push_array(scratch.arena, U8, module_sig_size);
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U8 *module_sig_bytes = push_array(scratch.arena, U8, module_sig_size);
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dmn_process_read(process.dmn_handle, rng_1u64(vaddr_range.min, vaddr_range.min + module_sig_size), module_sig_bytes);
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dmn_process_read(process.dmn_handle, rng_1u64(vaddr_range.min, vaddr_range.min + module_sig_size), module_sig_bytes);
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@@ -4004,6 +4003,7 @@ ctrl_thread__module_open(CTRL_Handle process, CTRL_Handle module, Rng1U64 vaddr_
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}
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}
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}
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}
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}
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}
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//////////////////////////////
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//////////////////////////////
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//- parse ELF module
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//- parse ELF module
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//
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//
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@@ -4137,11 +4137,11 @@ ctrl_thread__module_open(CTRL_Handle process, CTRL_Handle module, Rng1U64 vaddr_
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//- rjf: insert info into cache
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//- rjf: insert info into cache
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//
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//
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{
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{
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U64 hash = ctrl_hash_from_handle(module);
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U64 hash = ctrl_hash_from_handle(module);
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U64 slot_idx = hash%ctrl_state->module_image_info_cache.slots_count;
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U64 slot_idx = hash%ctrl_state->module_image_info_cache.slots_count;
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U64 stripe_idx = slot_idx%ctrl_state->module_image_info_cache.stripes_count;
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U64 stripe_idx = slot_idx%ctrl_state->module_image_info_cache.stripes_count;
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CTRL_ModuleImageInfoCacheSlot *slot = &ctrl_state->module_image_info_cache.slots[slot_idx];
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CTRL_ModuleImageInfoCacheSlot *slot = &ctrl_state->module_image_info_cache.slots[slot_idx];
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CTRL_ModuleImageInfoCacheStripe *stripe = &ctrl_state->module_image_info_cache.stripes[stripe_idx];
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CTRL_ModuleImageInfoCacheStripe *stripe = &ctrl_state->module_image_info_cache.stripes[stripe_idx];
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MutexScopeW(stripe->rw_mutex)
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MutexScopeW(stripe->rw_mutex)
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{
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{
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CTRL_ModuleImageInfoCacheNode *node = 0;
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CTRL_ModuleImageInfoCacheNode *node = 0;
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@@ -4157,16 +4157,18 @@ ctrl_thread__module_open(CTRL_Handle process, CTRL_Handle module, Rng1U64 vaddr_
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{
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{
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node = push_array(arena, CTRL_ModuleImageInfoCacheNode, 1);
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node = push_array(arena, CTRL_ModuleImageInfoCacheNode, 1);
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DLLPushBack(slot->first, slot->last, node);
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DLLPushBack(slot->first, slot->last, node);
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node->module = module;
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node->module = module;
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node->arena = arena;
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node->arena = arena;
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node->pdatas = pdatas;
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node->pdatas = pdatas;
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node->pdatas_count = pdatas_count;
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node->pdatas_count = pdatas_count;
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node->cfi_rebase = cfi_rebase;
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node->cfi_rebase = cfi_rebase;
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node->is_unwind_eh = is_unwind_eh;
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node->is_unwind_eh = is_unwind_eh;
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node->eh_frame_hdr = eh_frame_hdr;
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node->eh_frame_hdr = eh_frame_hdr;
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node->eh_ptr_ctx = eh_ptr_ctx;
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node->eh_ptr_ctx = eh_ptr_ctx;
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node->entry_point_voff = entry_point_voff;
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node->entry_point_voff = entry_point_voff;
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node->initial_debug_info_path = initial_debug_info_path;
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node->initial_debug_info_path = initial_debug_info_path;
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node->raddbg_attached_marker_voff = raddbg_is_attached_section_voff_range.min;
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node->raddbg_data = str8_copy(arena, raddbg_data);
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}
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}
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}
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}
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}
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}
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@@ -4180,7 +4182,7 @@ ctrl_thread__module_close(CTRL_Handle process, CTRL_Handle module, Rng1U64 vaddr
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//////////////////////////////
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//////////////////////////////
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//- rjf: evict module image info from cache
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//- rjf: evict module image info from cache
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//
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//
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Rng1U64 raddbg_section_voff_range = {0};
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U64 raddbg_attached_marker_voff = 0;
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{
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{
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U64 hash = ctrl_hash_from_handle(module);
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U64 hash = ctrl_hash_from_handle(module);
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U64 slot_idx = hash%ctrl_state->module_image_info_cache.slots_count;
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U64 slot_idx = hash%ctrl_state->module_image_info_cache.slots_count;
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@@ -4200,7 +4202,7 @@ ctrl_thread__module_close(CTRL_Handle process, CTRL_Handle module, Rng1U64 vaddr
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}
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}
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if(node)
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if(node)
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{
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{
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raddbg_section_voff_range = node->raddbg_section_voff_range;
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raddbg_attached_marker_voff = node->raddbg_attached_marker_voff;
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DLLRemove(slot->first, slot->last, node);
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DLLRemove(slot->first, slot->last, node);
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arena_release(node->arena);
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arena_release(node->arena);
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}
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}
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@@ -4208,12 +4210,12 @@ ctrl_thread__module_close(CTRL_Handle process, CTRL_Handle module, Rng1U64 vaddr
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}
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}
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//////////////////////////////
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//////////////////////////////
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//- rjf: write 0 into first byte of raddbg data section, to signify detachment
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//- rjf: write 0 at attachment market, to signify detachment
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//
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//
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if(raddbg_section_voff_range.max != raddbg_section_voff_range.min)
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if(raddbg_attached_marker_voff != 0)
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{
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{
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U8 new_value = 0;
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U8 new_value = 0;
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dmn_process_write_struct(process.dmn_handle, vaddr_range.min + raddbg_section_voff_range.min, &new_value);
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dmn_process_write_struct(process.dmn_handle, vaddr_range.min + raddbg_attached_marker_voff, &new_value);
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}
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}
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}
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}
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@@ -4399,7 +4401,7 @@ ctrl_thread__next_dmn_event(Arena *arena, DMN_CtrlCtx *ctrl_ctx, CTRL_Msg *msg,
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{
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{
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dmn_process_write(spoof->process, r1u64(spoof->vaddr, spoof->vaddr+size_of_spoof), &spoof->new_ip_value);
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dmn_process_write(spoof->process, r1u64(spoof->vaddr, spoof->vaddr+size_of_spoof), &spoof->new_ip_value);
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}
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}
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// rjf: run for new events
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// rjf: run for new events
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ProfScope("run for new events")
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ProfScope("run for new events")
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{
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{
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@@ -4423,7 +4425,7 @@ ctrl_thread__next_dmn_event(Arena *arena, DMN_CtrlCtx *ctrl_ctx, CTRL_Msg *msg,
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}
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}
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}
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}
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}
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}
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DMN_EventList events = dmn_ctrl_run(scratch.arena, ctrl_ctx, run_ctrls);
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DMN_EventList events = dmn_ctrl_run(scratch.arena, ctrl_ctx, run_ctrls);
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ins_atomic_u64_inc_eval(&ctrl_state->mem_gen);
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ins_atomic_u64_inc_eval(&ctrl_state->mem_gen);
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ins_atomic_u64_inc_eval(&ctrl_state->reg_gen);
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ins_atomic_u64_inc_eval(&ctrl_state->reg_gen);
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@@ -634,7 +634,7 @@ struct CTRL_ModuleImageInfoCacheNode
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EH_PtrCtx eh_ptr_ctx;
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EH_PtrCtx eh_ptr_ctx;
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U64 entry_point_voff;
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U64 entry_point_voff;
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String8 initial_debug_info_path;
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String8 initial_debug_info_path;
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Rng1U64 raddbg_section_voff_range;
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U64 raddbg_attached_marker_voff;
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String8 raddbg_data;
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String8 raddbg_data;
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};
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};
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