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https://github.com/Ed94/raddebugger.git
synced 2026-08-02 12:08:11 +00:00
bundle per-module info in eval system; use all modules in all processes in ctrl layer evaluations; further sketching out of space info
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@@ -35,7 +35,7 @@ e_autoresolved_eval_from_eval(E_Eval eval)
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{
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if(e_parse_ctx &&
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e_interpret_ctx &&
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e_parse_ctx->rdis_count > 0 &&
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e_parse_ctx->modules_count > 0 &&
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e_interpret_ctx->module_base != 0 &&
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(eval.mode == E_Mode_Value || eval.mode == E_Mode_Reg) &&
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(e_type_key_match(eval.type_key, e_type_key_basic(E_TypeKind_S64)) ||
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@@ -45,7 +45,7 @@ e_autoresolved_eval_from_eval(E_Eval eval)
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{
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U64 vaddr = eval.value.u64;
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U64 voff = vaddr - e_interpret_ctx->module_base[0];
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RDI_Parsed *rdi = e_parse_ctx->rdis[e_parse_ctx->rdis_primary_idx];
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RDI_Parsed *rdi = e_parse_ctx->primary_module->rdi;
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RDI_Scope *scope = rdi_scope_from_voff(rdi, voff);
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RDI_Procedure *procedure = rdi_procedure_from_voff(rdi, voff);
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RDI_GlobalVariable *gvar = rdi_global_variable_from_voff(rdi, voff);
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@@ -98,13 +98,13 @@ e_dynamically_typed_eval_from_eval(E_Eval eval)
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U32 rdi_idx = 0;
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RDI_Parsed *rdi = 0;
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U64 module_base = 0;
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for(U64 idx = 0; idx < e_type_state->ctx->rdis_count; idx += 1)
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for(U64 idx = 0; idx < e_type_state->ctx->modules_count; idx += 1)
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{
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if(contains_1u64(e_type_state->ctx->rdis_vaddr_ranges[idx], vtable_vaddr))
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if(contains_1u64(e_type_state->ctx->modules[idx].vaddr_range, vtable_vaddr))
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{
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rdi_idx = (U32)idx;
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rdi = e_type_state->ctx->rdis[idx];
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module_base = e_type_state->ctx->rdis_vaddr_ranges[idx].min;
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rdi = e_type_state->ctx->modules[idx].rdi;
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module_base = e_type_state->ctx->modules[idx].vaddr_range.min;
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break;
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}
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}
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