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https://github.com/Ed94/raddebugger.git
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copyright year
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+72
-72
@@ -1,4 +1,4 @@
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// Copyright (c) 2024 Epic Games Tools
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// Copyright (c) Epic Games Tools
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// Licensed under the MIT license (https://opensource.org/license/mit/)
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////////////////////////////////
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@@ -14,30 +14,30 @@ cv_arch_from_coff_machine(COFF_MachineType machine)
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CV_Arch arch = 0;
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switch(machine)
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{
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case COFF_MachineType_X64: arch = CV_Arch_X64; break;
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case COFF_MachineType_X86: arch = CV_Arch_8086; break;
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case COFF_MachineType_Am33: arch = CV_Arch_AM33; break;
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case COFF_MachineType_Arm: NotImplemented; break;
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case COFF_MachineType_Arm64: arch = CV_Arch_ARM64; break;
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case COFF_MachineType_ArmNt: arch = CV_Arch_ARMNT; break;
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case COFF_MachineType_Ebc: arch = CV_Arch_EBC; break;
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case COFF_MachineType_Ia64: arch = CV_Arch_IA64; break;
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case COFF_MachineType_M32R: arch = CV_Arch_M32R; break;
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case COFF_MachineType_Mips16: arch = CV_Arch_MIPS16; break;
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case COFF_MachineType_MipsFpu: NotImplemented; break;
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case COFF_MachineType_MipsFpu16: NotImplemented; break;
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case COFF_MachineType_PowerPc: NotImplemented; break;
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case COFF_MachineType_PowerPcFp: arch = CV_Arch_PPCFP; break;
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case COFF_MachineType_R4000: NotImplemented; break;
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case COFF_MachineType_RiscV32: NotImplemented; break;
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case COFF_MachineType_RiscV64: NotImplemented; break;
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case COFF_MachineType_RiscV128: NotImplemented; break;
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case COFF_MachineType_Sh3: arch = CV_Arch_SH3; break;
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case COFF_MachineType_Sh3Dsp: arch = CV_Arch_SH3DSP; break;
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case COFF_MachineType_Sh4: arch = CV_Arch_SH4; break;
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case COFF_MachineType_Sh5: NotImplemented; break;
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case COFF_MachineType_Thumb: arch = CV_Arch_THUMB; break;
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case COFF_MachineType_WceMipsV2: NotImplemented; break;
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case COFF_MachineType_X64: arch = CV_Arch_X64; break;
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case COFF_MachineType_X86: arch = CV_Arch_8086; break;
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case COFF_MachineType_Am33: arch = CV_Arch_AM33; break;
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case COFF_MachineType_Arm: NotImplemented; break;
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case COFF_MachineType_Arm64: arch = CV_Arch_ARM64; break;
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case COFF_MachineType_ArmNt: arch = CV_Arch_ARMNT; break;
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case COFF_MachineType_Ebc: arch = CV_Arch_EBC; break;
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case COFF_MachineType_Ia64: arch = CV_Arch_IA64; break;
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case COFF_MachineType_M32R: arch = CV_Arch_M32R; break;
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case COFF_MachineType_Mips16: arch = CV_Arch_MIPS16; break;
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case COFF_MachineType_MipsFpu: NotImplemented; break;
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case COFF_MachineType_MipsFpu16: NotImplemented; break;
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case COFF_MachineType_PowerPc: NotImplemented; break;
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case COFF_MachineType_PowerPcFp: arch = CV_Arch_PPCFP; break;
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case COFF_MachineType_R4000: NotImplemented; break;
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case COFF_MachineType_RiscV32: NotImplemented; break;
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case COFF_MachineType_RiscV64: NotImplemented; break;
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case COFF_MachineType_RiscV128: NotImplemented; break;
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case COFF_MachineType_Sh3: arch = CV_Arch_SH3; break;
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case COFF_MachineType_Sh3Dsp: arch = CV_Arch_SH3DSP; break;
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case COFF_MachineType_Sh4: arch = CV_Arch_SH4; break;
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case COFF_MachineType_Sh5: NotImplemented; break;
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case COFF_MachineType_Thumb: arch = CV_Arch_THUMB; break;
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case COFF_MachineType_WceMipsV2: NotImplemented; break;
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}
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return arch;
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}
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@@ -47,9 +47,9 @@ cv_size_from_reg(CV_Arch arch, CV_Reg reg)
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{
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switch(arch)
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{
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case CV_Arch_8086: return cv_size_from_reg_x86(reg);
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case CV_Arch_X64 : return cv_size_from_reg_x64(reg);
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default: NotImplemented;
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case CV_Arch_8086: return cv_size_from_reg_x86(reg);
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case CV_Arch_X64 : return cv_size_from_reg_x64(reg);
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default: NotImplemented;
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}
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return 0;
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}
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@@ -59,9 +59,9 @@ cv_is_reg_sp(CV_Arch arch, CV_Reg reg)
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{
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switch(arch)
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{
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case CV_Arch_8086: return reg == CV_Regx86_ESP;
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case CV_Arch_X64: return reg == CV_Regx64_RSP;
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default: NotImplemented;
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case CV_Arch_8086: return reg == CV_Regx86_ESP;
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case CV_Arch_X64: return reg == CV_Regx64_RSP;
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default: NotImplemented;
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}
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return 0;
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}
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@@ -84,7 +84,7 @@ cv_size_from_reg_x64(CV_Reg reg)
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switch(reg)
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{
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#define X(NAME, CODE, RDI_NAME, BYTE_POS, BYTE_SIZE) case CV_Regx64_##NAME: return BYTE_SIZE;
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CV_Reg_X64_XList(X)
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CV_Reg_X64_XList(X)
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#undef X
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}
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return 0;
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@@ -111,30 +111,30 @@ cv_decode_fp_reg(CV_Arch arch, CV_EncodedFramePtrReg encoded_reg)
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CV_Reg fp_reg = 0;
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switch (arch)
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{
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case CV_Arch_8086:
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{
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switch (encoded_reg)
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{
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case CV_EncodedFramePtrReg_None : break;
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case CV_EncodedFramePtrReg_StackPtr: AssertAlways(!"TODO: not tested, this is a guess");
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fp_reg = CV_Regx86_ESP; break;
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case CV_EncodedFramePtrReg_FramePtr: fp_reg = CV_Regx86_EBP; break;
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case CV_EncodedFramePtrReg_BasePtr : fp_reg = CV_Regx86_EBX; break;
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default: InvalidPath;
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}
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} break;
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case CV_Arch_X64:
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{
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switch (encoded_reg)
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{
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case CV_EncodedFramePtrReg_None : break;
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case CV_EncodedFramePtrReg_StackPtr: fp_reg = CV_Regx64_RSP; break;
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case CV_EncodedFramePtrReg_FramePtr: fp_reg = CV_Regx64_RBP; break;
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case CV_EncodedFramePtrReg_BasePtr : fp_reg = CV_Regx64_R13; break;
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default: InvalidPath;
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}
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} break;
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default: NotImplemented;
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case CV_Arch_8086:
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{
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switch (encoded_reg)
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{
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case CV_EncodedFramePtrReg_None : break;
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case CV_EncodedFramePtrReg_StackPtr: AssertAlways(!"TODO: not tested, this is a guess");
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fp_reg = CV_Regx86_ESP; break;
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case CV_EncodedFramePtrReg_FramePtr: fp_reg = CV_Regx86_EBP; break;
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case CV_EncodedFramePtrReg_BasePtr : fp_reg = CV_Regx86_EBX; break;
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default: InvalidPath;
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}
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} break;
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case CV_Arch_X64:
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{
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switch (encoded_reg)
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{
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case CV_EncodedFramePtrReg_None : break;
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case CV_EncodedFramePtrReg_StackPtr: fp_reg = CV_Regx64_RSP; break;
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case CV_EncodedFramePtrReg_FramePtr: fp_reg = CV_Regx64_RBP; break;
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case CV_EncodedFramePtrReg_BasePtr : fp_reg = CV_Regx64_R13; break;
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default: InvalidPath;
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}
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} break;
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default: NotImplemented;
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}
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return fp_reg;
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}
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@@ -144,22 +144,22 @@ cv_map_encoded_base_pointer(CV_Arch arch, U32 encoded_frame_reg)
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{
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U32 r = 0;
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switch (arch) {
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case CV_Arch_8086: {
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switch (encoded_frame_reg) {
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case 0: r = 0; break;
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case 1: r = CV_AllReg_VFRAME; break;
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case 2: r = CV_Regx86_EBP; break;
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case 3: r = CV_Regx86_EBX; break;
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}
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} break;
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case CV_Arch_X64: {
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switch (encoded_frame_reg) {
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case 0: r = 0; break;
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case 1: r = CV_Regx64_RSP; break;
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case 2: r = CV_Regx64_RBP; break;
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case 3: r = CV_Regx64_R13; break;
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}
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} break;
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case CV_Arch_8086: {
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switch (encoded_frame_reg) {
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case 0: r = 0; break;
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case 1: r = CV_AllReg_VFRAME; break;
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case 2: r = CV_Regx86_EBP; break;
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case 3: r = CV_Regx86_EBX; break;
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}
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} break;
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case CV_Arch_X64: {
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switch (encoded_frame_reg) {
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case 0: r = 0; break;
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case 1: r = CV_Regx64_RSP; break;
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case 2: r = CV_Regx64_RBP; break;
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case 3: r = CV_Regx64_R13; break;
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}
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} break;
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default: NotImplemented;
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}
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return r;
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