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increase wait time for memory slice in line stepping
This commit is contained in:
committed by
Ryan Fleury
parent
a8c167c6ae
commit
4648b27a06
@@ -396,7 +396,10 @@ d_trap_net_from_thread__step_over_line(Arena *arena, D_Entity *thread)
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B32 good_machine_code = 0;
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B32 good_machine_code = 0;
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if(good_line_info)
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if(good_line_info)
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{
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{
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D_ProcessMemorySlice machine_code_slice = d_process_memory_slice_from_vaddr_range(scratch.arena, process->handle, line_vaddr_rng, 0, now_time_us()+50000);
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// TODO: Under WSL, memory fetch takes longer to complete. Previously, 50ms was not enough and d_process_memory_slice_from_vaddr_range
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// would return stale memory, causing stepping alg to stop mid-source-line. If I understand correctly, 'wait_for_fresh' should
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// guarantee successful stepping here, but even after enabling it, stale memory is returned.
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D_ProcessMemorySlice machine_code_slice = d_process_memory_slice_from_vaddr_range(scratch.arena, process->handle, line_vaddr_rng, 0, now_time_us()+10000000);
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machine_code = machine_code_slice.data;
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machine_code = machine_code_slice.data;
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good_machine_code = (machine_code.size >= dim_1u64(line_vaddr_rng) && !machine_code_slice.any_byte_bad);
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good_machine_code = (machine_code.size >= dim_1u64(line_vaddr_rng) && !machine_code_slice.any_byte_bad);
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LogInfoNamedBlockF("machine_code_slice")
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LogInfoNamedBlockF("machine_code_slice")
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