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https://github.com/Ed94/raddebugger.git
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first pass at checksum baking
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@@ -1920,6 +1920,109 @@ rdim_bake(Arena *arena, RDIM_BakeParams *params)
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}
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}
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//////////////////////////////////////////////////////////////
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//- rjf: @rdim_bake_stage compute lane checksum layouts
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//
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ProfScope("compute lane checksum layouts")
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{
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// rjf: allocate
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if(lane_idx() == 0)
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{
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rdim_shared->lane_chunk_src_file_checksum_counts = push_array(arena, U64, lane_count()*params->src_files.chunk_count);
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rdim_shared->lane_chunk_src_file_checksum_sizes = push_array(arena, U64, lane_count()*params->src_files.chunk_count);
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rdim_shared->lane_chunk_src_file_checksum_off_offs = push_array(arena, U64, lane_count()*params->src_files.chunk_count);
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rdim_shared->lane_chunk_src_file_checksum_data_offs = push_array(arena, U64, lane_count()*params->src_files.chunk_count);
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}
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lane_sync();
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// rjf: compute counts / sizes of all checksum data
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{
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U64 chunk_idx = 0;
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for EachNode(n, RDIM_SrcFileChunkNode, params->src_files.first)
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{
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Rng1U64 range = lane_range(n->count);
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U64 slot_idx = lane_idx()*params->src_files.chunk_count + chunk_idx;
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for EachInRange(n_idx, range)
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{
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if(n->v[n_idx].checksum_kind != RDI_ChecksumKind_Null && n->v[n_idx].checksum.size != 0)
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{
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rdim_shared->lane_chunk_src_file_checksum_counts[slot_idx] += 1;
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rdim_shared->lane_chunk_src_file_checksum_sizes[slot_idx] += n->v[n_idx].checksum.size;
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}
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}
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chunk_idx += 1;
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}
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}
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lane_sync();
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// rjf: lay out per-lane-chunk offsets
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if(lane_idx() == 0)
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{
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U64 off_off = 0;
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U64 data_off = 0;
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U64 chunk_idx = 0;
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for EachNode(n, RDIM_SrcFileChunkNode, params->src_files.first)
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{
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for EachIndex(l_idx, lane_count())
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{
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U64 slot_idx = l_idx*params->src_files.chunk_count + chunk_idx;
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rdim_shared->lane_chunk_src_file_checksum_off_offs[slot_idx] = off_off;
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rdim_shared->lane_chunk_src_file_checksum_data_offs[slot_idx] = data_off;
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off_off += rdim_shared->lane_chunk_src_file_checksum_counts[slot_idx];
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data_off += rdim_shared->lane_chunk_src_file_checksum_sizes[slot_idx];
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}
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chunk_idx += 1;
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}
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rdim_shared->total_checksum_count = off_off;
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rdim_shared->total_checksum_size = data_off;
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}
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}
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lane_sync();
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//////////////////////////////////////////////////////////////
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//- rjf: @rdim_bake_stage bake checksums
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//
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ProfScope("bake checksums")
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{
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// rjf: allocate
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if(lane_idx() == 0)
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{
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rdim_shared->baked_checksums.offs_count = rdim_shared->total_checksum_count+1;
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rdim_shared->baked_checksums.offs = push_array(arena, U32, rdim_shared->baked_checksums.offs_count);
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rdim_shared->baked_checksums.data_size = rdim_shared->total_checksum_size;
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rdim_shared->baked_checksums.data = push_array(arena, U8, rdim_shared->baked_checksums.data_size);
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}
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lane_sync();
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// rjf: fill
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{
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U64 chunk_idx = 0;
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for EachNode(n, RDIM_SrcFileChunkNode, params->src_files.first)
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{
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Rng1U64 range = lane_range(n->count);
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U64 slot_idx = lane_idx()*params->src_files.chunk_count + chunk_idx;
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U64 dst_off_off = rdim_shared->lane_chunk_src_file_checksum_off_offs[slot_idx];
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U64 dst_data_off = rdim_shared->lane_chunk_src_file_checksum_data_offs[slot_idx];
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for EachInRange(n_idx, range)
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{
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if(n->v[n_idx].checksum_kind != RDI_ChecksumKind_Null && n->v[n_idx].checksum.size != 0)
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{
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rdim_shared->baked_checksums.offs[dst_off_off] = (U32)dst_data_off;
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MemoryCopy(&rdim_shared->baked_checksums.data[dst_data_off], n->v[n_idx].checksum.str, n->v[n_idx].checksum.size);
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dst_off_off += 1;
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dst_data_off += n->v[n_idx].checksum.size;
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}
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}
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chunk_idx += 1;
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}
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if(lane_idx() == 0)
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{
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rdim_shared->baked_checksums.offs[rdim_shared->baked_checksums.offs_count-1] = rdim_shared->baked_checksums.data_size;
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}
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}
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}
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lane_sync();
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//////////////////////////////////////////////////////////////
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//- rjf: @rdim_bake_stage compute lane UDT member/enum-val layouts
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//
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@@ -2849,6 +2952,7 @@ rdim_bake(Arena *arena, RDIM_BakeParams *params)
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result.units = rdim_shared->baked_units;
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result.unit_vmap = rdim_shared->baked_unit_vmap;
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result.src_files = rdim_shared->baked_src_files;
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result.checksums = rdim_shared->baked_checksums;
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result.line_tables = rdim_shared->baked_line_tables;
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result.type_nodes = rdim_shared->baked_type_nodes;
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result.udts = rdim_shared->baked_udts;
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@@ -2866,7 +2970,7 @@ rdim_bake(Arena *arena, RDIM_BakeParams *params)
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result.strings = rdim_shared->baked_strings;
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result.idx_runs = rdim_shared->baked_idx_runs;
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result.locations = rdim_shared->baked_locations;
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result.location_blocks2 = rdim_shared->baked_location_blocks;
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result.location_blocks = rdim_shared->baked_location_blocks;
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}
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return result;
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@@ -136,6 +136,15 @@ struct RDIM_Shared
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RDIM_SrcFileBakeResult baked_src_files;
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RDI_U64 *lane_chunk_src_file_checksum_counts; // [lane_count * src_file_chunk_count]
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RDI_U64 *lane_chunk_src_file_checksum_sizes; // [lane_count * src_file_chunk_count]
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RDI_U64 *lane_chunk_src_file_checksum_off_offs; // [lane_count * src_file_chunk_count]
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RDI_U64 *lane_chunk_src_file_checksum_data_offs; // [lane_count * src_file_chunk_count]
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U64 total_checksum_count;
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U64 total_checksum_size;
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RDIM_ChecksumBakeResult baked_checksums;
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RDI_U64 *member_chunk_lane_counts; // [lane_count * udt_chunk_count]
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RDI_U64 *member_chunk_lane_offs; // [lane_count * udt_chunk_count]
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RDI_U64 *enum_val_chunk_lane_counts; // [lane_count * udt_chunk_count]
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