mirror of
https://github.com/Ed94/pikuma_ps1.git
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274 lines
12 KiB
C
274 lines
12 KiB
C
#ifdef INTELLISENSE_DIRECTIVES
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# pragma once
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# include "dsl.h"
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# include "gcc_asm.h"
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# include "mips.h"
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# include "gte.h"
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# include "memory.h"
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# include "atom_dsl.h"
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#endif
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typedef U4 const MipsCode;
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#define MipsAtom_(sym) MipsCode tmpl(code,sym) [] align_(4) =
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#pragma region Tape Drive
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/* ---------------------------------------------------------------------------
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* TAPE DRIVE ABI & REGISTER ALIASES
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* ---------------------------------------------------------------------------
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* We map the MIPS temporary registers to a persistent global workspace.
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* The C compiler is completely unaware of these bindings.
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* ---------------------------------------------------------------------------*/
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enum {
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R_AtomJmp = R_T9,
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R_TapePtr = R_T8, /* The Instruction Stream Pointer */
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R_InCursor = R_T4, /* Input data cursor */
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R_PrimCursor = R_T7, /* VRAM output cursor (primitive buffer) */
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R_FaceCursor = R_T4, /* Input data cursor (indices/faces) */
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R_VertBase = R_T5, /* Base address of the vertex array */
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R_OtBase = R_T6, /* Base address of the Ordering Table */
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/* Stringification codes for the GCC inline assembler clobber lists */
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#define R_TapePtr_Code R_T8_Code
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#define R_InCursor_Code R_T4_Code
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#define R_PrimCursor_Code R_T7_Code
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#define R_FaceCursor_Code R_T4_Code
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#define R_VertBase_Code R_T5_Code
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#define R_OtBase_Code R_T6_Code
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};
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/* The 'Exit' Atom */
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MipsAtom_(tape_exit) { jump_reg(rret_addr), nop };
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/* Generalized Tape Engine Runner */
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FI_ void tape_run(Slice_U4 tape) { register U4* tp rgcc(R_TapePtr) = tape.ptr; asm volatile(
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asm_words(
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add_ui( R_SP, R_SP, -MipsStackAlignment) /* Allocate stack space */
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, store_word(R_RA, R_SP, 0) /* Safely backup $ra to the stack */
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, load_word( R_AtomJmp, R_TapePtr, 0) /* Bootstrap the first jump */
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, add_ui_self( R_TapePtr, S_(MipsCode)) /* Advance tape */
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, call_reg( R_AtomJmp) /* jalr $t9 */
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, nop /* Branch delay slot */
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, load_word(R_RA, R_SP, 0) /* Restore $ra from stack */
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, add_ui_self( R_SP, MipsStackAlignment) /* Deallocate stack space */
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)
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asm_rpins, r_use(tp)
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asm_clobber:
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rlit(R_AT)
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, rlit(R_V0), rlit(R_V1)
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, rlit(R_T0), rlit(R_T1), rlit(R_T2), rlit(R_T3)
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/* Tell GCC the tape engine owns and destroys the workspace registers */
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, rlit(R_PrimCursor), rlit(R_FaceCursor), rlit(R_VertBase), rlit(R_OtBase)
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, rlit(R_T9)
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, clb_mem_drain
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); }
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typedef Relative_(FArena) Struct_(TapeBuilder) { U4 ptr; U4 capacity; U4 used; };
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FI_ void tb_init(TapeBuilder* tb, FArena* arena) { tb->ptr = arena->start; tb->used = 0; }
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FI_ TapeBuilder tb_make_old( FArena* arena) { return (TapeBuilder){ arena->start, 0 }; }
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FI_ TapeBuilder tb_make(Slice mem) { return (TapeBuilder){ mem.ptr, mem.len, 0 }; }
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#define tb_emit_(tb, atom) tb_emit(tb, tmpl(code,atom))
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FI_ void tb_emit(TapeBuilder* tb, MipsCode* atom) { u4_r(tb->ptr)[tb->used] = u4_(atom); ++ tb->used; }
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FI_ void tb_data(TapeBuilder* tb, U4 data) { u4_r(tb->ptr)[tb->used] = u4_(data); ++ tb->used; }
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FI_ Slice_U4 tb_end (TapeBuilder* tb) { tb_emit(tb,code_tape_exit); return (Slice_U4){ C_(U4*,tb->ptr), tb->used }; }
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FI_ Slice_U4 tb_slice(TapeBuilder tb) { return (Slice_U4){ C_(U4*,tb.ptr), tb.used }; }
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#define tb_scope(tb) for(U4 tbs_once=0;tbs_once==0;++tbs_once,tb_emit(tb,code_tape_exit))
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#pragma endregion Tape Drive
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#pragma region Macro Mips Atom Components
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/* ---------------------------------------------------------------------------
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* MACRO ATOM Components (Reusable Assembly Components)
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* These do NOT yield. They are expanded inline inside Tape Atoms.
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* ---------------------------------------------------------------------------*/
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/* The 'Yield' sequence for Tape Atoms.
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* Loads the next pointer from the tape, advances the tape, and jumps.
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* Cost: ~ 4 cycles */
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#define mac_yield() \
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load_word(R_AtomJmp, R_TapePtr, 0) \
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, add_ui_self( R_TapePtr, S_(MipsCode)) \
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, jump_reg( R_AtomJmp) \
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, nop
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/* Words: 3; Loads 3 S2 indices from the face array */
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#define mac_load_tri_indices(rId_0, rId_1, rId_2) \
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load_half_u(rId_0, R_FaceCursor, 0 * S_(S2)) \
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, load_half_u(rId_1, R_FaceCursor, 1 * S_(S2)) \
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, load_half_u(rId_2, R_FaceCursor, 2 * S_(S2))
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/* Words: 18; Translates indices to vertex addresses and pushes them to GTE */
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#define mac_load_tri_verts(rId_0, rId_1, rId_2) \
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shift_lleft(R_AT, rId_0, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0) \
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, shift_lleft(R_AT, rId_1, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mt(R_V0, C2_VXY1), gte_mt(R_V1, C2_VZ1) \
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, shift_lleft(R_AT, rId_2, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mt(R_V0, C2_VXY2), gte_mt(R_V1, C2_VZ2)
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/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list */
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#define mac_insert_ot_tag(r_otz, prim_length) \
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shift_lleft( R_T1, r_otz, 2) /* T1 = r_otz * S_(U4) */ \
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, add_u( R_T1, R_T1, R_OtBase) /* T1 = & OrderingTable[OTZ] */ \
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, load_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)) /* AT = old_ot_head */ \
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, load_upper_i(R_V0, prim_length) /* V0 = prim_length << 16 (high 16 bits of a tag) */ \
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, mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \
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, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
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, store_word( R_AT, R_PrimCursor, O_(PolyTag,bf_addr_len)) /* prim->tag = packed(prim_length, old_addr) */ \
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, shift_lleft( R_AT, R_PrimCursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \
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, shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)) \
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, store_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)) /* OrderingTable[OTZ] = PrimCursor */
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#pragma endregion Macro Atom Components
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#pragma region Mips Atom Builder
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// This allows for runtime procedural authoring of mips atoms.
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typedef Struct_(FMipsAtom512) { U4 data[512]; U4 used; };
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typedef Slice_(MipsCode); typedef Slice_MipsCode MipsAtom;
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// FArena Related
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typedef Relative_(FArena) Struct_(MipsAtomBuilder) { U4 start; U4 capacity; U4 used; };
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// Whatever the builder is writting to should most likely coresspond
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// to something that can fit within instruction cache?
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FI_ void atombuilder_unroll(MipsAtomBuilder_R ab, Slice_MipsCode_R code) {
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assert(ab->capacity - ab->used - code->len);
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mem_copy(ab->start, u4_(code->ptr), code->len);
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mem_bump(ab->start, ab->capacity, & ab->used, code->len);
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}
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#define atombuilder_unroll_mac(ab, mac) atombuilder_unroll(ab, slice_arg_from_array(Slice_MipsCode, mac))
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// When done authoring, utilize this to cap-off the atom
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FI_ void atombuilder_end(MipsAtomBuilder_R ab) {
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LP_ MipsAtom_(yield) { mac_yield() };
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mem_copy(ab->start, u4_(code_yield), S_(code_yield));
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mem_bump(ab->start, ab->capacity, & ab->used, S_(code_yield));
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}
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#define mipsatom_from_builder(ab) (MipsAtom){ab.start, ab.used}
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#pragma endregion Mips Atom Builder
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#pragma region Baked Mips Atoms
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// These atoms are resolved at compile time and are (usually) statically linked readonly data.
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enum {
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bios_flushcache = 0x44,
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bios_table_addr = 0xA0,
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};
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/* Flushes the Instruction Cache (PSX A-function 0x44 via BIOS stub at 0xA0).
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*
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* Sequence (per MIPS ABI; arguments in arg registers, RA pushed to stack):
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* 1. sp -= 8; sw $ra, 4($sp) ; save RA
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* 2. $a0 = bios_flushcache (arg0)
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* 3. $t0 = bios_table_addr ; t0 = &BIOS A-function table
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* 4. jalr $t0, $ra ; call BIOS(flushcache)
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* nop ; branch delay slot
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* 5. lw $ra, 4($sp); jr $ra ; restore & return
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* 6. sp += 8
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*/
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internal MipsAtom_(mips_flush_icache) {
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add_ui(rstack_ptr, rstack_ptr, -MipsStackAlignment) /* sp -= 8 */
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, store_word(rret_addr, rstack_ptr, S_(U4)) /* sw $ra, 4($sp) */
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, add_ui(rret_0, rdiscard, bios_flushcache) /* addiu $a0, $0, 0x44 */
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, add_ui(rtmp_0, rdiscard, bios_table_addr) /* addiu $t0, $0, 0xA0 */
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, jump_link(rtmp_0, rret_addr) /* jalr $t0, $ra */
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, nop /* BD slot */
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, load_word(rret_addr, rstack_ptr, S_(U4)) /* lw $ra, 4($sp) */
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, jump_reg(rret_addr) /* jr $ra */
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, add_ui(rstack_ptr, rstack_ptr, MipsStackAlignment) /* sp += 8 (BD) */
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, mac_yield()
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};
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typedef Struct_(Binds_SetGteWorld) {
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U4 transform;
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};
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// TODO(Ed): Bugged, fix
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internal MipsAtom_(set_gte_world) {
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/* Pop matrix address from tape into R_T3 ($11) */
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load_word(R_T3, R_TapePtr, O_(Binds_SetGteWorld,transform)),
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add_ui_self( R_TapePtr, S_(Binds_SetGteWorld)),
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// TODO(Ed): Annotate magic offsets.
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/* Load 3x3 Rotation + 3x1 Translation from R_T3 into GTE CONTROL Regs (ctc2) */
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load_word(R_T0, R_T3, 0), load_word(R_T1, R_T3, 4),
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gte_ct( R_T0, gte_cr_RT11), gte_ct( R_T1, gte_cr_RT12),
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load_word(R_T0, R_T3, 8), load_word(R_T1, R_T3, 12), load_word(R_T2, R_T3, 16),
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gte_ct( R_T0, gte_cr_RT13), gte_ct( R_T1, gte_cr_RT21), gte_ct( R_T2, gte_cr_RT22),
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load_word(R_T0, R_T3, 20), load_word(R_T1, R_T3, 24), load_word(R_T2, R_T3, 28),
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gte_ct( R_T0, gte_cr_TRX), gte_ct( R_T1, gte_cr_TRY), gte_ct( R_T2, gte_cr_TRZ),
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mac_yield()
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};
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// TODO(Ed): I'm not sure yet if the bindings are redundant with the floortri atom yet.
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/* DIAGNOSTIC 1: Pure tape loop test */
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internal MipsAtom_(diag_yield) { mac_yield() };
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// TODO(Ed): Reduce magic numbers/offsets
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/* DIAGNOSTIC 2: Pure memory test (No GTE). Draws a fixed cyan triangle. */
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internal MipsAtom_(diag_color) {
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store_word( R_0, R_T7, 0),
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load_upper_i(R_AT, gcmd_poly_f3 << 8 | 0xFF), /* High: MipsCode Poly_F3(0x20) + Color B:FF */
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or_i( R_AT, R_AT, 0xFF00), /* Low: Color G:FF, R:00 (Cyan) */
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store_word( R_AT, R_T7, 4),
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/* Fake coordinates - Swapped winding order to prevent GPU culling! */
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load_upper_i(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 8), /* (16, 16) */
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load_upper_i(R_AT, 0x0050), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 12), /* (80, 16) */
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load_upper_i(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0050), store_word(R_AT, R_T7, 16), /* (16, 80) */
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add_ui( R_T1, R_0, 10),
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shift_lleft(R_T1, R_T1, 2),
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add_u( R_T1, R_T1, R_T6),
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load_word( R_AT, R_T1, 0),
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load_upper_i(R_V0, 0x0400), // <--- Fills load delay slot!
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store_word( R_AT, R_T7, 0),
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shift_lleft( R_AT, R_T7, 8), shift_lright(R_AT, R_AT, 8),
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or_u( R_AT, R_AT, R_V0),
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store_word(R_AT, R_T1, 0),
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add_ui(R_T7, R_T7, 20),
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mac_yield()
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};
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// TODO(Ed): Reduce magic numbers/offsets
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/* DIAGNOSTIC 3: Pure GTE test (No Memory Writes) */
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internal MipsAtom_(diag_gte) {
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/* Load 3 indices */
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load_half_u(R_T0, R_T4, 0),
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load_half_u(R_T1, R_T4, 2),
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load_half_u(R_T2, R_T4, 4),
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/* Load Vertices into GTE */
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shift_lleft( R_AT, R_T0, 3), add_u( R_AT, R_AT, R_T5),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt( R_V0, C2_VXY0), gte_mt( R_V1, C2_VZ0),
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shift_lleft( R_AT, R_T1, 3), add_u( R_AT, R_AT, R_T5),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt( R_V0, C2_VXY1), gte_mt( R_V1, C2_VZ1),
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shift_lleft( R_AT, R_T2, 3), add_u( R_AT, R_AT, R_T5),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt( R_V0, C2_VXY2), gte_mt( R_V1, C2_VZ2),
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/* Run Math */
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nop, nop, gte_cmdw_rtpt,
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nop, nop, gte_cmdw_nclip,
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nop, nop,
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/* Advance Face Cursor and Yield */
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add_ui(R_T4, R_T4, 8),
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mac_yield()
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};
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#pragma endregion Baked Mips Atoms
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