mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-06-01 18:41:13 -07:00
123 lines
3.7 KiB
C
123 lines
3.7 KiB
C
#ifdef INTELLISENSE_DIRECTIVES
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# pragma once
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# include "dsl.h"
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# include "math.h"
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#endif
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typedef Enum_(U4, gp_Commands) {
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gcmd_Reset = 0b000,
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gcmd_Polygon = 0b001,
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gcmd_Line = 0b010,
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gcmd_Rect = 0b011,
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gcmd_VM_to_VM = 0b100,
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gcmd_CPU_to_VM = 0b101,
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gcmd_VM_to_CPU = 0b110,
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gcmd_Environment = 0b111,
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gcmd_SetDrawMode = 0xE1,
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gcmd_SetTextureWindow = 0xE2,
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gcmd_SetDrawArea_TopLeft = 0xE3,
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gcmd_SetDrawArea_BotRight = 0xE4,
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gcmd_SetDrawOffset = 0xE5,
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gcmd_SetMaskBit = 0xE6,
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gcmd_ResetCommandBuffer = 0x01,
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gcmd_AcknowledgeGPUInterrupt = 0x02,
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gcmd_DisplayEnable = 0x03,
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gcmd_DMA_Request = 0x04,
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gcmd_DispArea_Start = 0x05,
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gcmd_HorizontalDisplayRange = 0x06,
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gcmd_VerticalDisplayRange = 0x07,
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gcmd_DisplayMode = 0x08,
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gcmd_SetVramSize = 0x09,
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};
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enum {
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gpio_port_0 = 0x1810,
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gpio_port_1 = 0x1814,
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gcmd_offset = 24,
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gp_Reset = (gcmd_Reset << gcmd_offset),
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gp_DisplayEnabled = (gcmd_DisplayEnable << gcmd_offset | 0x0),
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gp_DisplayDisabled = (gcmd_DisplayEnable << gcmd_offset | 0x1),
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gp_DMA_FIFO = 1,
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gp_DMA_CPU_to_GPU = 2,
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gp_DMA_GPU_to_CPU = 3,
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gp_DMA_Request = (gcmd_DMA_Request << gcmd_offset),
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gp_HorizontalDisplayRange_3168_608 = (gcmd_HorizontalDisplayRange << gcmd_offset | 0xC60 << 12 | 0x260),
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gp_VerticalDiplayRange = (gcmd_VerticalDisplayRange << gcmd_offset),
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gp_VerticalDisplayRange_264_24 = (gp_VerticalDiplayRange | 264 << 10 | 24),
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gp_VerticalDisplayRange_504_24 = (gp_VerticalDiplayRange | 504 << 10 | 24),
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gp_DisplayMode = (gcmd_DisplayMode << gcmd_offset),
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gp_Disp_HRes_256 = (0x0),
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gp_Disp_HRes_320 = (0x1),
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gp_Disp_HRes_512 = (0x2),
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gp_Disp_HRes_640 = (0x3),
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gp_Disp_VRes_240 = (0x0 << 2),
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gp_Disp_VRes_480 = (0x1 << 2),
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gp_Disp_Color15 = (0x0 << 4),
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gp_Disp_Color24 = (0x1 << 4),
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gp_Disp_VInterlace = (0x1 << 5),
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gp_DisplayMode_320x240_15bit_NTSC = (gp_DisplayMode | gp_Disp_HRes_320 | gp_Disp_VRes_240 | gp_Disp_Color15),
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gp_DisplayMOde_640x480_24bbp_NTSC = (gp_DisplayMode | gp_Disp_HRes_640 | gp_Disp_VRes_480 | gp_Disp_Color24 | gp_Disp_VInterlace),
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gp_DrawMode_DrawAllowed = 10,
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gp_SetDrawMode_DrawAllowed = (gcmd_SetDrawMode << gcmd_offset | 0x1 << gp_DrawMode_DrawAllowed),
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gp_SetArea_TopLeft = (gcmd_SetDrawArea_TopLeft << gcmd_offset),
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gp_SetArea_BottomRight = (gcmd_SetDrawArea_BotRight << gcmd_offset),
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};
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typedef Struct_(RGB8) { B1 r; B1 g; B1 b; };
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#define rgb8(r, g, b) (RGB8){ r, g, b }
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typedef B1 gp_Pixel16[1];
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typedef B1 gp_Pixel24[3];
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enum {
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gp_b10_X = 0,
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gp_b10_Y = 10,
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gp_b16_X = 0,
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gp_b16_Y = 16,
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};
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typedef Struct_(gp_Vec2) { U2 y; U2 x; };
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#if 1
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void gp_screen_init(void) __asm__("gp_screen_init_asm");
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#else
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#define gp_screen_init() gp_screen_init_c11()
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#endif
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// TODO REVIEW:
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/* --- GPU Command Semantics (GP0) --- */
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#define GPU_CMD_CLEAR_CACHE 0x01
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#define GPU_CMD_VRAM_FILL 0x02
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#define GPU_CMD_VRAM_COPY 0x80
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#define GPU_CMD_VRAM_READ 0xC0
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#define GPU_CMD_POLY_F3 0x20 /* Flat Triangle */
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#define GPU_CMD_POLY_FT3 0x24 /* Flat Textured Triangle */
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#define GPU_CMD_POLY_G3 0x30 /* Gouraud Triangle */
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#define GPU_CMD_POLY_GT3 0x34 /* Gouraud Textured Triangle */
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#define GPU_CMD_POLY_F4 0x28 /* Flat Quad */
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#define GPU_CMD_POLY_FT4 0x2C /* Flat Textured Quad */
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#define GPU_CMD_POLY_G4 0x38 /* Gouraud Quad */
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#define GPU_CMD_POLY_GT4 0x3C /* Gouraud Textured Quad */
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/* --- Hardware MMIO Addresses --- */
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#define HW_GP0_ADDR 0x1F801810 /* GPU Data Port */
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#define HW_GP1_ADDR 0x1F801814 /* GPU Status/Control Port */
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