mirror of
https://github.com/Ed94/pikuma_ps1.git
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458 lines
19 KiB
C
458 lines
19 KiB
C
#ifdef INTELLISENSE_DIRECTIVES
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# pragma once
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# include "dsl.h"
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# include "gcc_asm.h"
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# include "mips.h"
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# include "gte.h"
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# include "memory.h"
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#endif
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typedef U4 const MipsCode;
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#define MipsAtom_(sym) MipsCode tmpl(code,sym) [] align_(4) =
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#pragma region Tape Drive
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/* ---------------------------------------------------------------------------
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* TAPE DRIVE ABI & REGISTER ALIASES
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* ---------------------------------------------------------------------------
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* We map the MIPS temporary registers to a persistent global workspace.
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* The C compiler is completely unaware of these bindings.
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* ---------------------------------------------------------------------------*/
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enum {
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R_AtomJmp = R_T9,
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R_TapePtr = R_T8, /* The Instruction Stream Pointer */
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R_PrimCur = R_T7, /* VRAM output cursor (primitive buffer) */
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R_FaceCur = R_T4, /* Input data cursor (indices/faces) */
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R_InCursor = R_T4, /* Input data cursor (indices/faces) */
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R_VertBase = R_T5, /* Base address of the vertex array */
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R_OtBase = R_T6, /* Base address of the Ordering Table */
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/* Stringification codes for the GCC inline assembler clobber lists */
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#define R_TapePtr_Code R_T8_Code
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#define R_PrimCur_Code R_T7_Code
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#define R_FaceCur_Code R_T4_Code
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#define R_InCursor_Code R_T4_Code
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#define R_VertBase_Code R_T5_Code
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#define R_OtBase_Code R_T6_Code
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};
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/* The 'Exit' Atom */
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MipsAtom_(tape_exit) { jump_reg(rret_addr), nop };
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/* Generalized Tape Engine Runner */
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FI_ void tape_run(Slice_U4 tape) { register U4* tp rgcc(R_TapePtr) = tape.ptr; asm volatile(
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asm_words(
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add_ui( R_SP, R_SP, -8) /* Allocate stack space */
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, store_word(R_RA, R_SP, 0) /* Safely backup $ra to the stack */
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, load_word( R_T9, R_TapePtr, 0) /* Bootstrap the first jump */
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, add_ui_1( R_TapePtr, 4) /* Advance tape */
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, jump_nreg(R_T9) /* jalr $t9 */
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, nop /* Branch delay slot */
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, load_word(R_RA, R_SP, 0) /* Restore $ra from stack */
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, add_ui_1( R_SP, 8) /* Deallocate stack space */
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)
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asm_rpins, r_use(tp)
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asm_clobber:
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rlit(R_AT)
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, rlit(R_V0), rlit(R_V1)
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, rlit(R_T0), rlit(R_T1), rlit(R_T2), rlit(R_T3)
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/* Tell GCC the tape engine owns and destroys the workspace registers */
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, rlit(R_PrimCur), rlit(R_FaceCur), rlit(R_VertBase), rlit(R_OtBase)
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, rlit(R_T9)
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, clb_mem_drain
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); }
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typedef Relative_(FArena) Struct_(TapeBuilder) { U4 ptr; U4 capacity; U4 used; };
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FI_ void tb_init(TapeBuilder* tb, FArena* arena) { tb->ptr = arena->start; tb->used = 0; }
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FI_ TapeBuilder tb_make_old( FArena* arena) { return (TapeBuilder){ arena->start, 0 }; }
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FI_ TapeBuilder tb_make(Slice mem) { return (TapeBuilder){ mem.ptr, mem.len, 0 }; }
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#define tb_emit_(tb, atom) tb_emit(tb, tmpl(code,atom))
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FI_ void tb_emit(TapeBuilder* tb, MipsCode* atom) { u4_r(tb->ptr)[tb->used] = u4_(atom); ++ tb->used; }
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FI_ void tb_data(TapeBuilder* tb, U4 data) { u4_r(tb->ptr)[tb->used] = u4_(data); ++ tb->used; }
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FI_ Slice_U4 tb_end (TapeBuilder* tb) { tb_emit(tb,code_tape_exit); return (Slice_U4){ C_(U4*,tb->ptr), tb->used }; }
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FI_ Slice_U4 tb_slice(TapeBuilder tb) { return (Slice_U4){ C_(U4*,tb.ptr), tb.used }; }
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#define tb_scope(tb) for(U4 tbs_once=0;tbs_once==0;++tbs_once,tb_emit(tb,code_tape_exit))
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#pragma endregion Tape Drive
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#pragma region Macro Mips Atom Components
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/* ---------------------------------------------------------------------------
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* MACRO ATOM Components (Reusable Assembly Components)
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* These do NOT yield. They are expanded inline inside Tape Atoms.
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* ---------------------------------------------------------------------------*/
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/* The 'Yield' sequence for Tape Atoms.
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* Loads the next pointer from the tape, advances the tape, and jumps.
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* Cost: ~ 4 cycles */
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#define mac_yield() \
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load_word(R_AtomJmp, R_TapePtr, 0) \
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, add_ui_1( R_TapePtr, 4) \
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, jump_reg( R_AtomJmp) \
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, nop
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/* Words: 3; Loads 3 S2 indices from the face array */
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#define mac_load_tri_indices(rId_0, rId_1, rId_2) \
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load_half_u(rId_0, R_FaceCur, 0) \
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, load_half_u(rId_1, R_FaceCur, 2) \
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, load_half_u(rId_2, R_FaceCur, 4)
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/* Words: 18; Translates indices to vertex addresses and pushes them to GTE
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R_AT = rId_[#] << 3;
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R_AT += R_VertBase;
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R_V0 = R_AT[0];
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gte_mt(R_V0, V.xy[#]);
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gte_mt(R_V1, V.z [#]);
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*/
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#define mac_load_tri_verts(rId_0, rId_1, rId_2) \
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shift_ll(R_AT, rId_0, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0) \
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, shift_ll(R_AT, rId_1, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY1), gte_mt(R_V1, C2_VZ1) \
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, shift_ll(R_AT, rId_2, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY2), gte_mt(R_V1, C2_VZ2)
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/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list */
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#define mac_insert_ot_tag(r_otz, prim_length) \
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shift_ll( R_T1, r_otz, 2) \
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, add_u( R_T1, R_T1, R_OtBase) /* T1 = &OrderingTable[OTZ] */ \
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, load_word( R_AT, R_T1, 0) /* AT = old_ot_head */ \
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, load_ui( R_V0, prim_length) /* V0 = Length << 24 */ \
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, shift_ll( R_AT, R_AT, 8) /* Strip upper 8 bits from old_ot */ \
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, shift_lr( R_AT, R_AT, 8) \
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, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
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, store_word(R_AT, R_PrimCur, 0) /* prim->tag = old_ot_head */ \
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, shift_ll( R_AT, R_PrimCur, 8) /* AT = PrimCur & 0x00FFFFFF */ \
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, shift_lr( R_AT, R_AT, 8) \
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, store_word(R_AT, R_T1, 0) /* OrderingTable[OTZ] = PrimCur */
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#pragma endregion Macro Atom Components
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#pragma region Mips Atom Builder
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// This allows for runtime procedural authoring of mips atoms.
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typedef Struct_(FMipsAtom512) { U4 data[512]; U4 used; };
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typedef Slice_(MipsCode); typedef Slice_MipsCode MipsAtom;
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// FArena Related
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typedef Relative_(FArena) Struct_(MipsAtomBuilder) { U4 start; U4 capacity; U4 used; };
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// Whatever the builder is writting to should most likely coresspond
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// to something that can fit within instruction cache?
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FI_ void atombuilder_unroll(MipsAtomBuilder_R ab, Slice_MipsCode_R code) {
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assert(ab->capacity - ab->used - code->len);
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mem_copy(ab->start, u4_(code->ptr), code->len);
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mem_bump(ab->start, ab->capacity, & ab->used, code->len);
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}
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#define atombuilder_unroll_mac(ab, mac) atombuilder_unroll(ab, slice_arg_from_array(Slice_MipsCode, mac))
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// When done authoring, utilize this to cap-off the atom
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FI_ void atombuilder_end(MipsAtomBuilder_R ab) {
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LP_ MipsAtom_(yield) { mac_yield() };
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mem_copy(ab->start, u4_(code_yield), S_(code_yield));
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mem_bump(ab->start, ab->capacity, & ab->used, S_(code_yield));
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}
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#define mipsatom_from_builder(ab) (MipsAtom){ab.start, ab.used}
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#pragma endregion Mips Atom Builder
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#pragma region Baked Mips Atoms
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// These atoms are resolved at compile time and are (usually) statically linked readonly data.
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enum {
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bios_flushcache = 0x44,
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bios_table_addr = 0xA0,
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};
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/* Flushes the Instruction Cache (PSX A-function 0x44 via BIOS stub at 0xA0).
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*
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* Sequence (per MIPS ABI; arguments in arg registers, RA pushed to stack):
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* 1. sp -= 8; sw $ra, 4($sp) ; save RA
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* 2. $a0 = bios_flushcache (arg0)
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* 3. $t0 = bios_table_addr ; t0 = &BIOS A-function table
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* 4. jalr $t0, $ra ; call BIOS(flushcache)
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* nop ; branch delay slot
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* 5. lw $ra, 4($sp); jr $ra ; restore & return
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* 6. sp += 8
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*/
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internal MipsAtom_(mips_flush_icache) {
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add_ui(rstack_ptr, rstack_ptr, -8) /* sp -= 8 */
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, store_word(rret_addr, rstack_ptr, 4) /* sw $ra, 4($sp) */
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, add_ui(rret_0, rdiscard, bios_flushcache) /* addiu $a0, $0, 0x44 */
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, add_ui(rtmp_0, rdiscard, bios_table_addr) /* addiu $t0, $0, 0xA0 */
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, jump_link(rtmp_0, rret_addr) /* jalr $t0, $ra */
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, nop /* BD slot */
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, load_word(rret_addr, rstack_ptr, 4) /* lw $ra, 4($sp) */
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, jump_reg(rret_addr) /* jr $ra */
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, add_ui(rstack_ptr, rstack_ptr, 8) /* sp += 8 (BD) */
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, mac_yield()
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};
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typedef Struct_(Binds_SyncPrimCursor) {
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U4 PrimtiveArena_Used;
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U4 PrimtiveBase;
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};
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internal MipsAtom_(sync_prim_cursor) {
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/* Pop the C-struct address and base address from the tape */
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// Note(Ed): Argument shuffle....
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load_word(R_AT, R_TapePtr, O_(Binds_SyncPrimCursor,PrimtiveArena_Used)),
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load_word(R_T0, R_TapePtr, O_(Binds_SyncPrimCursor,PrimtiveBase)),
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add_ui_1( R_TapePtr, S_(Binds_SyncPrimCursor)),
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/* Calculate byte offset and store directly back to RAM */
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sub_u(R_T0, R_PrimCur, R_T0), // R_T0 = PrimitiveArea_Used(R_AT) - R_PrimCur
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store_word(R_T0, R_AT, 0), // PrimitiveBase(R_AT)[0] = R_T0
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mac_yield()
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};
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internal MipsAtom_(set_gte_world) {
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/* Pop matrix address from tape into R_T3 ($11) */
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load_word(R_T3, R_TapePtr, 0),
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add_ui_1( R_TapePtr, 4),
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/* Load 3x3 Rotation + 3x1 Translation from R_T3 into GTE CONTROL Regs (ctc2) */
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load_word(R_T0, R_T3, 0), load_word(R_T1, R_T3, 4),
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gte_ct( R_T0, gte_cr_RT11), gte_ct( R_T1, gte_cr_RT12),
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load_word(R_T0, R_T3, 8), load_word(R_T1, R_T3, 12), load_word(R_T2, R_T3, 16),
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gte_ct( R_T0, gte_cr_RT13), gte_ct( R_T1, gte_cr_RT21), gte_ct( R_T2, gte_cr_RT22),
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load_word(R_T0, R_T3, 20), load_word(R_T1, R_T3, 24), load_word(R_T2, R_T3, 28),
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gte_ct( R_T0, gte_cr_TRX), gte_ct( R_T1, gte_cr_TRY), gte_ct( R_T2, gte_cr_TRZ),
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mac_yield()
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};
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// TODO(Ed): I'm not sure yet if the bindings are redundant with the floortri atom yet.
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typedef Struct_(Binds_CubeTri) {
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U4 PrimCursor;
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U4 FaceCursor;
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U4 VertBase;
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U4 OtBase;
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};
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internal MipsAtom_(rbind_cube_tri) {
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/* Pop 4 arguments from the tape directly into the workspace registers */
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load_word(R_PrimCur, R_TapePtr, O_(Binds_CubeTri,PrimCursor)),
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load_word(R_FaceCur, R_TapePtr, O_(Binds_CubeTri,FaceCursor)),
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load_word(R_VertBase, R_TapePtr, O_(Binds_CubeTri,VertBase)),
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load_word(R_OtBase, R_TapePtr, O_(Binds_CubeTri,OtBase)),
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add_ui_1( R_TapePtr, S_(Binds_CubeTri)),
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// Note(Ed): This entire thing is argument shuffle?
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// TODO(Ed): Eliminate
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mac_yield()
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};
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/* ============================================================================
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* cube_tri — Draw one cube face (Gouraud-shaded quad) via the GTE tape pipeline
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* ============================================================================
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*
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* Reads 4 indices from R_FaceCur (V4_S2 = 8 bytes), loads 4 vertices into
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* the GTE, runs the PsyQ RotAverageNclip4 sequence, and renders a Poly_G4.
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*
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* PsyQ RotAverageNclip4 sequence:
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* 1. Load V0=p0, V1=p1, V2=p2
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* 2. RTPT → SXY0=p0, SXY1=p1, SXY2=p2, SZ1,SZ2,SZ3
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* 3. NCLIP → MAC0 = cross(p0,p1,p2) ← BEFORE RTPS!
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* 4. Store SXY0 (p0) to primitive buffer
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* 5. Load V3 into V0
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* 6. RTPS → SXY0=p3, SZ0
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* 7. Store SXY0 (p3) to primitive buffer
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* 8. AVSZ3 → OTZ from SZ1,SZ2,SZ3
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*
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* PRIMITIVE FORMAT (Poly_G4 = 9 words = 36 bytes)
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* ------------------------------------------------
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* Word 0 (offset 0): OT tag (set by mac_insert_ot_tag)
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* Word 1 (offset 4): c0 + code = 0x38FF00FF (magenta, opcode 0x38)
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* Word 2 (offset 8): p0 = SXY0 (stored BEFORE RTPS)
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* Word 3 (offset 12): c1 + pad = 0x0000FFFF (yellow)
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* Word 4 (offset 16): p1 = SXY1
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* Word 5 (offset 20): c2 + pad = 0x00FFFF00 (cyan)
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* Word 6 (offset 24): p2 = SXY2
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* Word 7 (offset 28): c3 + pad = 0x0000FF00 (green)
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* Word 8 (offset 32): p3 = SXY0 (stored AFTER RTPS)
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*
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* BRANCH OFFSETS
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* ----------------------------------------------
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* Outer branch (backface cull): branch_le_zero(R_T0, 49)
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* → Skip 49 instructions from BD slot, land at add_ui(R_FaceCur,...)
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* Inner branch (OTZ bounds): branch_equal(R_AT, R_0, 13)
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* → Skip 13 instructions from BD slot, land at add_ui(R_FaceCur,...)
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* ============================================================================ */
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internal MipsAtom_(cube_tri) {
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/* ── 1. Load 4 face indices from R_FaceCur ──────────────────────────── */
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load_half_u(R_T0, R_FaceCur, 0), /* T0 = face->x (vertex 0 index) */
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load_half_u(R_T1, R_FaceCur, 2), /* T1 = face->y (vertex 1 index) */
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load_half_u(R_T2, R_FaceCur, 4), /* T2 = face->z (vertex 2 index) */
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load_half_u(R_T3, R_FaceCur, 6), /* T3 = face->w (vertex 3 index) */
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/* ── 2. Load V0, V1, V2 into GTE ────────────────────────────────────── */
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/* V0 = verts[face->x] */
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shift_ll(R_AT, R_T0, 3), add_u(R_AT, R_AT, R_VertBase),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0),
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/* V1 = verts[face->y] */
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shift_ll(R_AT, R_T1, 3), add_u(R_AT, R_AT, R_VertBase),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt(R_V0, C2_VXY1), gte_mt(R_V1, C2_VZ1),
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/* V2 = verts[face->z] */
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shift_ll(R_AT, R_T2, 3), add_u(R_AT, R_AT, R_VertBase),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt(R_V0, C2_VXY2), gte_mt(R_V1, C2_VZ2),
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/* ── 3. RTPT — transforms V0/V1/V2 → SXY0/SXY1/SXY2 + SZ1/SZ2/SZ3 ─── */
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nop, nop, gte_cmdw_rtpt,
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/* ── 4. NCLIP — backface culling on SXY0/SXY1/SXY2 (p0,p1,p2) ──────── */
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/* MUST be done BEFORE RTPS overwrites SXY0 with p3! */
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nop, nop, gte_cmdw_nclip,
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nop, nop,
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/* ── 5. Cull check: skip format/insert if MAC0 ≤ 0 (backface) ───────── */
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gte_mf(R_T0, C2_MAC0),
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nop,
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branch_le_zero(R_T0, 49), /* Skip 49 if MAC0 ≤ 0 (backface) → cull */
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nop, /* BD slot */
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/* ── 6. Store p0,p1,p2 to primitive buffer (BEFORE RTPS overwrites) ─── */
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store_word(R_0, R_PrimCur, 0),
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/* Word 1: c0 (BGR) + code = 0x38FF00FF (magenta, opcode 0x38) */
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load_ui(R_AT, 0x38FF), or_i(R_AT, R_AT, 0x00FF),
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store_word(R_AT, R_PrimCur, 4),
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/* Word 2: p0 = SXY0 (stored BEFORE RTPS overwrites it) */
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gte_sw(C2_SXY0, R_PrimCur, 8),
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/* Word 3: c1 (BGR) + pad = 0x0000FFFF (yellow) */
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load_ui(R_AT, 0x0000), or_i(R_AT, R_AT, 0xFFFF),
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store_word(R_AT, R_PrimCur, 12),
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/* Word 4: p1 = SXY1 */
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gte_sw(C2_SXY1, R_PrimCur, 16),
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/* Word 5: c2 (BGR) + pad = 0x00FFFF00 (cyan) */
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load_ui(R_AT, 0x00FF), or_i(R_AT, R_AT, 0xFF00),
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store_word(R_AT, R_PrimCur, 20),
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/* Word 6: p2 = SXY2 */
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gte_sw(C2_SXY2, R_PrimCur, 24),
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/* Word 7: c3 (BGR) + pad = 0x0000FF00 (green) */
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load_ui(R_AT, 0x0000), or_i(R_AT, R_AT, 0xFF00),
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store_word(R_AT, R_PrimCur, 28),
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/* ── 7. Load V3 = verts[face->w] into V0 ─────────────────────────────── */
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shift_ll(R_AT, R_T3, 3), add_u(R_AT, R_AT, R_VertBase),
|
||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||
gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0),
|
||
|
||
/* ── 8. RTPS — transforms V0 (now V3) → SXY0 (p3) + SZ0 ─────────────── */
|
||
nop, nop, gte_cmdw_rtps,
|
||
|
||
/* Word 8: p3 = SXY0 (written AFTER RTPS with V3's screen coords) */
|
||
gte_sw(C2_SXY0, R_PrimCur, 32),
|
||
|
||
/* ── 9. AVSZ4 — average Z from SZ0/SZ1/SZ2/SZ3 ────────────── */
|
||
nop, nop, gte_cmdw_avsz4,
|
||
nop, nop,
|
||
gte_mf(R_T1, C2_OTZ),
|
||
|
||
/* ── 10. Bounds check OTZ < 2048 ─────────────────────────────────────── */
|
||
add_ui( R_AT, R_0, 2048),
|
||
slt_u( R_AT, R_T1, R_AT),
|
||
branch_equal(R_AT, R_0, 13), /* Skip 13 → land at add_ui(R_FaceCur,...) */
|
||
nop, /* BD slot */
|
||
|
||
/* ── 11. Insert into Ordering Table (length = 8 for Poly_G4) ─────────── */
|
||
mac_insert_ot_tag(R_T1, 0x0800), /* 0x0800 = 8 << 8 = length 8 in tag */
|
||
|
||
/* ── 12. Advance cursors & yield ─────────────────────────────────────── */
|
||
add_ui(R_PrimCur, R_PrimCur, 36), /* 9 words × 4 bytes */
|
||
add_ui(R_FaceCur, R_FaceCur, 8), /* 4 × S2 = 8 bytes */
|
||
mac_yield()
|
||
};
|
||
|
||
|
||
typedef Struct_(Binds_FloorTri) {
|
||
U4 PrimCursor;
|
||
U4 FaceCursor;
|
||
U4 VertBase;
|
||
U4 OtBase;
|
||
};
|
||
|
||
internal MipsAtom_(rbind_floor_tri) {
|
||
/* Pop 4 arguments from the tape directly into the workspace registers */
|
||
load_word(R_PrimCur, R_TapePtr, O_(Binds_FloorTri,PrimCursor)),
|
||
load_word(R_FaceCur, R_TapePtr, O_(Binds_FloorTri,FaceCursor)),
|
||
load_word(R_VertBase, R_TapePtr, O_(Binds_FloorTri,VertBase)),
|
||
load_word(R_OtBase, R_TapePtr, O_(Binds_FloorTri,OtBase)),
|
||
add_ui_1( R_TapePtr, S_(Binds_FloorTri)),
|
||
// Note(Ed): This entire thing is argument shuffle?
|
||
// TODO(Ed): Eliminate
|
||
mac_yield()
|
||
};
|
||
|
||
|
||
/* DIAGNOSTIC 1: Pure tape loop test */
|
||
internal MipsAtom_(diag_yield) { mac_yield() };
|
||
|
||
/* DIAGNOSTIC 2: Pure memory test (No GTE). Draws a fixed cyan triangle. */
|
||
internal MipsAtom_(diag_color) {
|
||
store_word(R_0, R_T7, 0),
|
||
load_ui( R_AT, 0x20FF), /* High: MipsCode 0x20 + Color B:FF */
|
||
or_i( R_AT, R_AT, 0xFF00), /* Low: Color G:FF, R:00 (Cyan) */
|
||
store_word(R_AT, R_T7, 4),
|
||
|
||
/* Fake coordinates - Swapped winding order to prevent GPU culling! */
|
||
load_ui(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 8), /* (16, 16) */
|
||
load_ui(R_AT, 0x0050), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 12), /* (80, 16) */
|
||
load_ui(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0050), store_word(R_AT, R_T7, 16), /* (16, 80) */
|
||
|
||
add_ui( R_T1, R_0, 10),
|
||
shift_ll(R_T1, R_T1, 2),
|
||
add_u( R_T1, R_T1, R_T6),
|
||
|
||
load_word( R_AT, R_T1, 0),
|
||
load_ui( R_V0, 0x0400), // <--- Fills load delay slot!
|
||
store_word(R_AT, R_T7, 0),
|
||
|
||
shift_ll( R_AT, R_T7, 8), shift_lr(R_AT, R_AT, 8),
|
||
or_u( R_AT, R_AT, R_V0),
|
||
store_word(R_AT, R_T1, 0),
|
||
|
||
add_ui(R_T7, R_T7, 20),
|
||
|
||
mac_yield()
|
||
};
|
||
|
||
/* DIAGNOSTIC 3: Pure GTE test (No Memory Writes) */
|
||
internal MipsAtom_(diag_gte) {
|
||
/* Load 3 indices */
|
||
load_half_u(R_T0, R_T4, 0),
|
||
load_half_u(R_T1, R_T4, 2),
|
||
load_half_u(R_T2, R_T4, 4),
|
||
|
||
/* Load Vertices into GTE */
|
||
shift_ll( R_AT, R_T0, 3), add_u( R_AT, R_AT, R_T5),
|
||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||
gte_mt( R_V0, C2_VXY0), gte_mt( R_V1, C2_VZ0),
|
||
|
||
shift_ll( R_AT, R_T1, 3), add_u( R_AT, R_AT, R_T5),
|
||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||
gte_mt( R_V0, C2_VXY1), gte_mt( R_V1, C2_VZ1),
|
||
|
||
shift_ll( R_AT, R_T2, 3), add_u( R_AT, R_AT, R_T5),
|
||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||
gte_mt( R_V0, C2_VXY2), gte_mt( R_V1, C2_VZ2),
|
||
|
||
/* Run Math */
|
||
nop, nop, gte_cmdw_rtpt,
|
||
nop, nop, gte_cmdw_nclip,
|
||
nop, nop,
|
||
|
||
/* Advance Face Cursor and Yield */
|
||
add_ui(R_T4, R_T4, 8),
|
||
|
||
mac_yield()
|
||
};
|
||
|
||
#pragma endregion Baked Mips Atoms
|