mirror of
https://github.com/Ed94/pikuma_ps1.git
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337 lines
10 KiB
C
337 lines
10 KiB
C
#pragma region Vendors
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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// #include "libgpu.h"
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// #include "libetc.h"
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// #include "libgte.h"
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#pragma endregion Vendors
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#pragma region Duffle Headers
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# include "duffle/gen/macs.h"
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# include "duffle/gen/offsets.h"
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#include "duffle/word_count.metadata.h"
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#include "duffle/dsl.h"
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#include "duffle/memory.h"
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#include "duffle/math.h"
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#include "duffle/gcc_asm.h"
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#include "duffle/mips.h"
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#include "duffle/gp.h"
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#include "duffle/gte.h"
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#include "duffle/pad.h"
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#include "duffle/dsl.atom.h"
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#include "duffle/lottes_tape.h"
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#include "duffle/psyq.h"
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#pragma endregion Duffle Headers
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#pragma region Duffle TUs
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#include "duffle/math.atom.c"
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#include "duffle/mips.atom.c"
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#include "duffle/gte.atom.c"
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#include "duffle/gp.atom.c"
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#include "duffle/pad.atom.c"
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#include "duffle/psyq.atom.c"
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#pragma endregion Duffle TUs
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#pragma region Hello Camera Headers
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# include "gen/macs.h"
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# include "gen/offsets.h"
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#include "hello_camera.h"
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#pragma endregion Hello Camera Headers
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#pragma region Hello Joypad TUs
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#include "hello_camera.atom.c"
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#pragma endregion Hello Joypad TUs
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enum {
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Scratchpad_Len = 1024,
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MemTape_Len = 512,
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};
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typedef Struct_(SMemory) {
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PrimitiveArena primitives;
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A2_OrderingTable_Buffer ordering_tbl;
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DoubleBuffer screen_buf;
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S4 active_buf_id;
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U4 MemTape[MemTape_Len];
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M3_S2 tform_world;
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Ent_Cube cube;
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Ent_Floor floor;
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PadBiosRaw pad_raw[2];
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PadState pad[2];
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U4_V scratchpad; // d-cache
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};
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global SMemory smem;
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extern SMemory smem;
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I_ B1* prim__alloc(U4 type_width, Str8 type_name) {
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gknown PrimitiveArena* pa = & smem.primitives;
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gknown B1* buf = (B1*) r_(smem.primitives.buf)[smem.active_buf_id];
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assert(pa->used + type_width < PrimitiveBuff_Len);
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B1* next = buf + pa->used;
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pa->used += type_width;
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return next;
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}
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#define prim_alloc(type) (type*)prim__alloc(S_(type), slit( stringify(type)))
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/* Uses ONE 8-byte frame allocated via the compiler's standard prologue.
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* The 4 wasted-arg words for B(12h) InitPAD2 live at [SP+0..15] but are not explicitly allocated.
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* The compiler handles the MIPS O32 "wasted stack" convention for us by treating the B-call as a 4-arg call.
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*
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* The buffer pointers are passed as arguments so the compiler keeps them in callee-saved registers;
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* The B(12h) asm volatile block does NOT clobber those registers (it clobbers only the volatile GPRs + the B-table arg registers explicitly).
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* The C-level writes after the call re-load the pointers from their callee-saved homes.
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*
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* The clobber list for both B-calls names the full BIOS destroy set documented in kernelbios.md:167-174 (R1..R15, R24..R25, R31, HI/LO).
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* The kernel-ABI "volatile GPRs" subset is clb_system; the rest of the destroy set is enumerated explicitly here. */
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NI_ void pad_bios_init_start(PadBiosRaw* raw0, PadBiosRaw* raw1)
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{
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/* Pin raw0 + raw1 to $a0 + $a1 via rgcc; the B(12h) call uses these directly.
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* The `(void)` casts mark them as unread after the call so the compiler doesn't need to move them back. */
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register PadBiosRaw* p0 rgcc(R_A0) = raw0;
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register PadBiosRaw* p1 rgcc(R_A1) = raw1;
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(void)p0; (void)p1;
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// TODO(Ed): Properly annotate the raw values in the inline asm instructions.
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// Use enums.
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/* B(12h) InitPAD2(raw0, 0x22, raw1, 0x22)
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* $a0 = raw0 (rgcc-bound; survives the sequence below)
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* $a1 = raw1 (preserved into $a2 before $a1 is overwritten)
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* $a2 = raw1 (moved from $a1; survives $a1's overwrite)
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* $a3 = 0x22 (immediate)
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* $t1 = 0x12 (function number)
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* $t2 = 0xB0 (BIOS B-table address) */
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asm volatile(
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asm_words(
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or_u( rarg_2, rarg_1, rdiscard), /* $a2 = $a1 = raw1 */
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add_ui( rarg_1, rdiscard, 0x22), /* $a1 = 0x22 */
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add_ui( rarg_3, rdiscard, 0x22), /* $a3 = 0x22 */
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add_ui( rtmp_1, rdiscard, 0x12), /* $t1 = 0x12 */
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add_ui( rtmp_2, rdiscard, 0xB0), /* $t2 = 0xB0 */
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call_reg(rtmp_2), /* jalr $t2, $ra */
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nop /* BD slot */
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)
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asm_rpins, r_use(p0), r_use(p1)
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asm_clobber:
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rlit(R_AT),
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rlit(R_V0), rlit(R_V1),
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rlit(R_T0), rlit(R_T1), rlit(R_T2), rlit(R_T3), rlit(R_T4),
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rlit(R_T5), rlit(R_T6), rlit(R_T7), rlit(R_T8), rlit(R_T9),
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rlit(R_RA),
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clb_mem_drain
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);
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/* The C-level writes re-load the pointers via the parameter names and write 0xFF to each
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* buffer's status byte to mark the initial-state hazard documented in kernelbios.md:1621-1624. */
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u1_v(raw0)[0] = 0xFF;
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u1_v(raw1)[0] = 0xFF;
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/* B(13h) StartPAD2() — no args. The BIOS preserves $sp. */
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asm volatile(
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asm_words(
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add_ui( rtmp_1, rdiscard, 0x13), /* $t1 = 0x13 */
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add_ui( rtmp_2, rdiscard, 0xB0), /* $t2 = 0xB0 (re-load) */
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call_reg(rtmp_2), /* jalr $t2, $ra */
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nop /* BD slot */
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)
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asm_clobber:
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rlit(R_AT),
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rlit(R_V0), rlit(R_V1),
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rlit(R_T0), rlit(R_T1), rlit(R_T2), rlit(R_T3), rlit(R_T4),
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rlit(R_T5), rlit(R_T6), rlit(R_T7), rlit(R_T8), rlit(R_T9),
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rlit(R_RA),
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clb_mem_drain
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);
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}
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GCC_OPTIMIZATION_DISABLE
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void update(PrimitiveArena* pa, U4* ordering_buf)
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{
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TapeBuilder tb = tb_make(slice_ut_arr(smem.MemTape));
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if (1) // Pad Input
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{
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tb.used = 0; tb_scope_run(& tb) {
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/* BIOS-owned polling: per-frame snapshot of both ports. */
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tb_emit_(pad_bios_snapshot);
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tb_data_(raw, & smem.pad_raw[0]);
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tb_data_(state, & smem.pad[0]);
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tb_emit_(pad_bios_snapshot);
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tb_data_(raw, & smem.pad_raw[1]);
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tb_data_(state, & smem.pad[1]);
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/* Per-frame rotation apply: consume pad[0].buttons + pad[0].left_x */
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tb_emit_(pad_apply_input);
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tb_data_(state, & smem.pad[0]);
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tb_data_(cube_rot, & smem.cube.rot);
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tb_data_(floor_rot, & smem.floor.rot);
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}
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}
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orderingtbl_clear_reverse(ordering_buf, OrderingTbl_Len);
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// Update the position based on acceleration and velocity
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gknown V3_S4_R pos = & smem.cube.pos;
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gknown V3_S4_R vel = & smem.cube.vel;
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gknown V3_S4_R acc = & smem.cube.accel;
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add_v3s4(vel, acc[0]);
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add_v3s4_fp(pos, vel[0]);
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// vel->x += acc->x;
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// vel->y += acc->y;
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// vel->z += acc->z;
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// pos->x += vel->x;
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// pos->y += vel->y;
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// pos->z += vel->z;
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if (pos->y + 150 > smem.floor.pos.y) vel->y *= -1;
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// Prep
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S4 nclip = 0;
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S4 orderingtbl_z = 0;
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A2_S2 p; //???
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S4 flag; //????
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// Draw cube
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if (1)
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{
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m3s2_rotation (& smem.cube.rot, & smem.tform_world);
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m3s2_translation(& smem.tform_world, & smem.cube.pos);
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m3s2_scale (& smem.tform_world, & smem.cube.scale);
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gte_matrix_set_rotation (& smem.tform_world);
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gte_matrix_set_translation(& smem.tform_world);
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U4 prim_base = u4_(pa->buf[smem.active_buf_id]);
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U4 prim_cursor = prim_base + pa->used;
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tb.used = 0; tb_scope(& tb) {
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tb_emit(& tb, rbind_cube_g4_face);
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tb_data(& tb, prim_cursor);
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tb_data(& tb, u4_(smem.cube.faces));
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tb_data(& tb, u4_(smem.cube.verts));
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tb_data(& tb, u4_(ordering_buf));
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for (U4 i = 0; i < Cube_num_faces; i++) {
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// Two triangles per quad face: (x,y,z) and (x,z,w)
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tb_emit(& tb, cube_g4_face);
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}
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tb_emit(& tb, sync_primitive_arena);
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tb_data(& tb, u4_(& pa->used));
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tb_data(& tb, prim_base);
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}
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tape_run(tb_slice(tb));
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// smem.cube.rot.y += 30;
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}
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// Draw floor
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if (1)
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{
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m3s2_rotation (& smem.floor.rot, & smem.tform_world);
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m3s2_translation(& smem.tform_world, & smem.floor.pos);
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m3s2_scale (& smem.tform_world, & smem.floor.scale);
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U4 prim_base = u4_(pa->buf[smem.active_buf_id]);
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U4 prim_cursor = prim_base + pa->used;
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// TODO(Ed): We should do a bounds check beforehand to confirm pa can hold all tris?
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// The tape atoms in-flight should not need to care.
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// Prepare the tape. (Push protocol to tape)
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tb.used = 0; tb_scope(& tb) {
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tb_emit(& tb, set_gte_world);
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tb_data(& tb, u4_(& smem.tform_world));
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tb_emit(& tb, rbind_floor_f3_face);
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// TODO(Ed): Just use a single context struct ref
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tb_data(& tb, prim_cursor);
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tb_data(& tb, u4_(smem.floor.faces));
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tb_data(& tb, u4_(smem.floor.verts));
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tb_data(& tb, u4_(ordering_buf));
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for (U4 i = 0; i < Floor_num_faces; i++) {
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tb_emit(& tb, floor_f3_face);
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}
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// After floor_f3_face iterations complete, the primitive arena's used counter needs updating.
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tb_emit(& tb, sync_primitive_arena);
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tb_data(& tb, u4_(& pa->used));
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tb_data(& tb, prim_base);
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}
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tape_run(tb_slice(tb));// Fire off the tape.
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// C-side state (pa->used) has already been updated by the tape!
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// smem.floor.rot.y += 5;
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}
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}
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GCC_OPTIMIZATION_ENABLE
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void render(void) {
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}
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void gp_display_frame(DoubleBuffer* screen_buf, S4* active_buf_id, U4* ordering_buf, PrimitiveArena* pa) {
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draw_sync(0);
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vsync(0);
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displayenv_put(& r_(screen_buf->display)[active_buf_id[0] ]);
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drawenv_put (& r_(screen_buf->draw) [active_buf_id[0] ]);
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{
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draw_orderingtbl(ordering_buf + OrderingTbl_Len - 1);
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pa->used = 0;
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}
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active_buf_id[0] = ! active_buf_id[0]; // Swap current buffer
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}
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GCC_OPTIMIZATION_DISABLE
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int main(void)
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{
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smem = (SMemory){0};
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smem.scratchpad = C_(U4_V, 0x1F800000);
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// smem.primitives.used = 0;
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// smem.active_buf_id = 0;
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/*Persistent Entity Setup*/{
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ent_cube128_init(& smem.cube.verts, & smem.cube.faces); {
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Ent_Cube* cube = & smem.cube;
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cube->rot = v3s2(0, 0, 0);
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cube->scale = v3s4_fp_one();
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cube->accel = v3s4(0, 1, 0);
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cube->pos = v3s4(0, -400, 1800);
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}
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ent_floor_init(& smem.floor.verts, & smem.floor.faces); {
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Ent_Floor* floor = & smem.floor;
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floor->rot = v3s2(0, 0, 0);
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floor->pos = v3s4(0, 450, 1800);
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floor->scale = v3s4_fp_one();
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}
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}
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TapeBuilder tb = tb_make(slice_ut_arr(smem.MemTape)); {
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reset_graph(0);
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/* Direct BIOS: poll both ports during VBlank. */
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pad_bios_init_start(& smem.pad_raw[0], & smem.pad_raw[1]);
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/* Pinned registers for the GPU init atom. */
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register U4* io_base_addr rgcc(R_IO_BaseAddr) = u4_r(IO_BASE_ADDR);
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register DoubleBuffer* screen_buf rgcc(R_ScreenBuf) = & smem.screen_buf;
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tb.used = 0; tb_scope_run(& tb) {
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tb_emit(& tb, screen_env_init);
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tb_emit(& tb, gp_screen_init);
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}
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}
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while (1) {
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gknown S4* active_buf_id = & smem.active_buf_id;
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gknown U4* ordering_buf = r_(smem.ordering_tbl)[active_buf_id[0]];
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gknown PrimitiveArena* pa = & smem.primitives;
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update(pa, ordering_buf);
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render();
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gp_display_frame(& smem.screen_buf, active_buf_id, ordering_buf, pa);
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};
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return 0;
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}
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GCC_OPTIMIZATION_ENABLE
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