#ifdef INTELLISENSE_DIRECTIVES #pragma once #endif // Auto-generated by ps1_meta.lua — DO NOT EDIT // Source: C:\projects\Pikuma\ps1\code\duffle\lottes_tape.h // Component atoms (MipsAtomComp_(ac_*)) -> macro variants (mac_*) #ifndef WORD_COUNT #define WORD_COUNT(name, count) enum { words_##name = (count) }; #endif #define mac_yield(...) \ load_word(R_AtomJmp, R_TapePtr, 0) \ , add_ui_self( R_TapePtr, S_(MipsCode)) \ , jump_reg( R_AtomJmp) \ , nop WORD_COUNT(mac_yield, 4) /* Words: 3; Loads 3 S2 indices from the face array */ #define mac_load_tri_indices(...) \ load_half_u(R_T0, R_FaceCursor, 0 * S_(S2)) \ , load_half_u(R_T1, R_FaceCursor, 1 * S_(S2)) \ , load_half_u(R_T2, R_FaceCursor, 2 * S_(S2)) WORD_COUNT(mac_load_tri_indices, 3) /* Words: 18; Translates indices to vertex addresses and pushes them to GTE */ #define mac_gte_load_tri_verts(...) \ shift_lleft(R_AT, R_T0, v3s2_byteoff) \ , add_u_self(R_AT, R_VertBase) \ , load_word(R_V0, R_AT, O_(V3_S2,x)) \ , load_word(R_V1, R_AT, O_(V3_S2,z)) \ , gte_mv_to_data_r(R_V0, C2_VXY0) \ , gte_mv_to_data_r(R_V1, C2_VZ0) \ , shift_lleft(R_AT, R_T1, v3s2_byteoff) \ , add_u_self(R_AT, R_VertBase) \ , load_word(R_V0, R_AT, O_(V3_S2,x)) \ , load_word(R_V1, R_AT, O_(V3_S2,z)) \ , gte_mv_to_data_r(R_V0, C2_VXY1) \ , gte_mv_to_data_r(R_V1, C2_VZ1) \ , shift_lleft(R_AT, R_T2, v3s2_byteoff) \ , add_u_self(R_AT, R_VertBase) \ , load_word(R_V0, R_AT, O_(V3_S2,x)) \ , load_word(R_V1, R_AT, O_(V3_S2,z)) \ , gte_mv_to_data_r(R_V0, C2_VXY2) \ , gte_mv_to_data_r(R_V1, C2_VZ2) WORD_COUNT(mac_gte_load_tri_verts, 18) /* Words: 11; Correctly inserts a primitive into the Ordering Table linked list. * Hardcoded for Poly_F3 (5 words). For Poly_G4, use ac_insert_ot_tag_g4. */ #define mac_insert_ot_tag_f3(...) \ shift_lleft( R_T1, R_T1, S_(U4)/2) /* T1 = otz * S_(U4) (otz arg is implicit R_T1) */ \ , add_u_self( R_T1, R_OtBase) /* T1 = & OrderingTable[OTZ] */ \ , load_word( R_AT, R_T1, O_(PolyTag,code)) /* AT = old_ot_head */ \ , load_upper_i(R_V0, (S_(Poly_F3)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits) /* V0 = (5 - 1) << 24 = 4 << 24 */ \ , mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \ , or_u( R_AT, R_AT, R_V0) /* Merge length */ \ , store_word( R_AT, R_PrimCursor, O_(PolyTag,code)) /* prim->tag = packed(prim_length, old_addr) */ \ , shift_lleft( R_AT, R_PrimCursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \ , shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)) \ , store_word( R_AT, R_T1, O_(PolyTag,code)) /* OrderingTable[OTZ] = PrimCursor */ WORD_COUNT(mac_insert_ot_tag_f3, 11) /* Words: 11; Correctly inserts a primitive into the Ordering Table linked list. * Hardcoded for Poly_G4 (9 words). For Poly_F3, use ac_insert_ot_tag_f3. */ #define mac_insert_ot_tag_g4(...) \ shift_lleft( R_T1, R_T1, S_(U4)/2) /* T1 = otz * S_(U4) (otz arg is implicit R_T1) */ \ , add_u_self( R_T1, R_OtBase) /* T1 = & OrderingTable[OTZ] */ \ , load_word( R_AT, R_T1, O_(PolyTag,code)) /* AT = old_ot_head */ \ , load_upper_i(R_V0, (S_(Poly_G4)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits) /* V0 = (9 - 1) << 24 = 8 << 24 */ \ , mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \ , or_u( R_AT, R_AT, R_V0) /* Merge length */ \ , store_word( R_AT, R_PrimCursor, O_(PolyTag,code)) /* prim->tag = packed(prim_length, old_addr) */ \ , shift_lleft( R_AT, R_PrimCursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \ , shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)) \ , store_word( R_AT, R_T1, O_(PolyTag,code)) /* OrderingTable[OTZ] = PrimCursor */ WORD_COUNT(mac_insert_ot_tag_g4, 11) #define mac_pack_color_word(off, cmd, r, g, b) \ load_upper_i(R_AT, (cmd) << 8 | (b)) \ , or_i_self( R_AT, ((g) << 8) | (r)) \ , store_word( R_AT, R_PrimCursor, (off)) WORD_COUNT(mac_pack_color_word, 3) #define mac_format_f3_color(r, g, b) \ mac_pack_color_word(O_(Poly_F3,color), gp0_cmd_poly_f3, r, g, b) WORD_COUNT(mac_format_f3_color, 3) /* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices to the F3. * PIPELINE: post-RTPT (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen). */ #define mac_gte_store_f3_post_rtpt(...) \ gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_F3,p0)) \ , gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_F3,p1)) \ , gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_F3,p2)) WORD_COUNT(mac_gte_store_f3_post_rtpt, 3) #define mac_format_g4_color(r0, g0, b0, r1, g1, b1, r2, g2, b2, r3, g3, b3) \ mac_pack_color_word(O_(Poly_G4,c0), gp0_cmd_poly_g4, r0,g0,b0) \ , mac_pack_color_word(O_(Poly_G4,c1), 0, r1,g1,b1) \ , mac_pack_color_word(O_(Poly_G4,c2), 0, r2,g2,b2) \ , mac_pack_color_word(O_(Poly_G4,c3), 0, r3,g3,b3) WORD_COUNT(mac_format_g4_color, 12) /* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices of the * G4 triangle portion to p0/p1/p2. * PIPELINE: post-RTPT, pre-RTPS (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen). * MUST be called BEFORE V3-RTPS, otherwise SXY0/1/2 * get overwritten with v3 (RTPS writes only to SXY2, but to keep the * three registers aligned with v0/v1/v2 you must store before RTPS). * The macro name declares the pipeline position; check #6 (GTE state- * machine validation) verifies the call site matches the declaration. */ #define mac_gte_store_g4_p012_post_rtpt_pre_rtps(...) \ gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_G4,p0)) \ , gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_G4,p1)) \ , gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p2)) WORD_COUNT(mac_gte_store_g4_p012_post_rtpt_pre_rtps, 3) /* Words: 1; Stores the V3 screen coord to the G4's p3 slot. * PIPELINE: post-RTPS (SXY2 holds v3.screen because RTPS writes its * single-vertex result to SXY2; SXY0 still holds v0.screen from the * earlier RTPT — DO NOT read SXY0 here, that's the bug this name * prevents). */ #define mac_gte_store_g4_p3_post_rtps(...) \ gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p3)) WORD_COUNT(mac_gte_store_g4_p3_post_rtps, 1)