mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-08-25 02:20:33 +00:00
reducing cross product atom procs to a single one in gte for once.
This commit is contained in:
@@ -104,9 +104,9 @@ MipsAtomComp_Proc_(ab, {
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typedef AtomBundle_(resolve_look_at) { MipsAtom*
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input_and_sub,
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normalize_fwd_uz,
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cross_uz_up_into_right,
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cross_to_right,
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normalize_right_ux,
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cross_uz_ux_to_up,
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cross_to_up,
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normalize_up_uy,
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populate,
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set_gte_mt3s2s4,
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@@ -178,141 +178,6 @@ atom_info(atom_bind(Binds_ResolveLookAtSub)) MipsAtom_Proc_(aa, {
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mac_yield()
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})
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typedef Struct_(RegUse_resolve_look_at_cross_uz_up_into_right) {
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Reg scratch;
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Reg a; Reg b; Reg c; /* load a.x/y/z; result out.x/y/z */
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Reg d; /* load b.x */
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Reg f; /* r_f = &right (out ptr), r_g = &uz, r_h = &up_in */
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union { Reg t1, g, target0; };
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union { Reg t2, h, target1; };
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Reg t0;
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};
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/* Atom 2: cross uz × up_in → right. */
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// internal MipsAtom* AtomBundleEntry_(resolve_look_at, cross_uz_up_to_right)(AtomArena_R aa,
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internal MipsAtom* resolve_look_at_cross_uz_up_into_right(AtomArena_R aa,
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RegUse_resolve_look_at_cross_uz_up_into_right r
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) MipsAtom_Proc_(aa, {
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/* FIX: build packed RT22+RT33 with proper sign extension. */
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add_si(r.g, r.scratch, O_(ResolveLookAtScratch,uz)), /* r_g = &uz */
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add_si(r.h, r.scratch, O_(ResolveLookAtScratch,up_in)), /* r_h = &up_in */
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add_si(r.f, r.scratch, O_(ResolveLookAtScratch,right)), /* r_f = &right (out) */
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nop,
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/* Load a (uz).x/y/z into r_a/r_b/r_c. */
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mac_load_word_v3(r.a, r.b, r.c, r.g, 0), LdSlot_
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/* Load b (up_in).x/y/z into r_d + R_AT/R_V0 (R_AT/R_V0 are hardcoded scratch). */
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mac_load_word_v3(r.d, R_AT, r.t0, r.h, 0), LdSlot_ // (taken by gte_mv_from_ctrl_r)
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/* Save the two RT control-register slots OP will clobber. We reuse r_g/r_h (scratch pointers, no longer needed) as the save targets. */
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gte_mv_from_ctrl_r(r.target0, gte_cr_RT11), /* r_g = C2 r0 (RT11|RT12) */
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gte_mv_from_ctrl_r(r.target1, gte_cr_RT22), /* r_h = C2 r4 (RT22|RT33) */
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/* Load uz.x/uz.y/uz.z into COP2 control registers.
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* OP reads D1 = RT11 from $0.low, D2 = RT22 from $2.high, D3 = RT33 from $4.high.
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* RT22 is in BOTH $2.high AND $4.low (shared bit position). OP reads from $2.high.
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* So set RT22 via ctc2 r_b, $2 (sets $2.high = a.y.high = RT22, $2.low = a.y.low = RT13).
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* Then set RT33 via ctc2 r_c, $4 (sets $4.high = a.z.high = RT33, $4.low = a.z.low).
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* The $2 and $4 writes don't clobber each other (separate registers).
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* The 2nd ctc2 DOES clobber $4.low (becomes a.z.low, NOT a.y.high), but since OP
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* reads RT22 from $2.high (which the 2nd ctc2 doesn't touch), D2 is still a.y.high.
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* This is libpsyx's OuterProduct12 convention. */
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gte_mv_to_ctrl_r(r.b, gte_cr_RT13), /* $2 = r_b = a.y. RT13=a.y.low, RT22=a.y.high. */
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gte_mv_to_ctrl_r(r.c, gte_cr_RT22), /* $4 = r_c = a.z. RT22=a.z.low, RT33=a.z.high. */
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/* Load uz into the RT diagonal. */
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gte_mv_to_ctrl_r(r.a, gte_cr_RT11), /* D1 = RT11 = uz.x. */
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GteDelay_ nop2, /* CTC2 retirement */
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/* Load up_in into IR (the second operand for OP). */
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gte_mv_to_data_r(r.d, C2_IR1), /* IR1 = up_in.x */
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gte_mv_to_data_r(R_AT, C2_IR2), /* IR2 = up_in.y */
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gte_mv_to_data_r(r.t0, C2_IR3), /* IR3 = up_in.z */
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GteDelay_ nop2, /* MTC2 retirement */
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gte_cmdw_cross, /* OP: MAC1/2/3 = uz × up_in
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* MAC1 = IR3*D2 - IR2*D3 = up_in.z*uz.y.high - up_in.y*uz.z.high
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* MAC2 = IR1*D3 - IR3*D1 = up_in.x*uz.z.high - up_in.z*uz.x
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* MAC3 = IR2*D1 - IR1*D2 = up_in.y*uz.x - up_in.x*uz.y.high
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* For up_in = (0, -fp_one, 0):
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* MAC1 = 0 - (-fp_one)*uz.z.high = fp_one*uz.z.high
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* MAC2 = 0 - 0 = 0
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* MAC3 = (-fp_one)*uz.x - 0 = -fp_one*uz.x */
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/* Restore the RT slots we clobbered. */
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gte_mv_to_ctrl_r(r.target0, gte_cr_RT11), /* restore C2 r0 (RT11|RT12) */
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gte_mv_to_ctrl_r(r.target1, gte_cr_RT22), /* restore C2 r4 (RT22|RT33) */
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/* mfc2 MAC1/2/3 → r_a/r_b/r_c (out.x/y/z). */
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mac_gte_mv_from_data_r_mac123(r.a, r.b, r.c),
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GteDelay_ nop, /* MFC2 retirement */
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/* Right-shift MAC by 12 to convert from GTE's S12.20 fixed-point scale back to libpsyx OuterProduct12 convention (S12.0, fp_one=4096=1<<12).
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* Without this, MAC values (~16M for unit-vector cross products) overflow the GTE's 16-bit IR registers when atom 3 normalizes via mtc2. */
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mac_shift_aright_v3_self(r.a, r.b, r.c, 12),
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/* Store out.x/y/z to r_f (out ptr = scratch+32). */
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mac_store_word_v3(r.a, r.b, r.c, r.f, 0),
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mac_yield()
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})
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typedef Struct_(RegUse_resolve_look_at__cross_uz_ux_to_up_proc) {
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Reg const scratch; /* pinned T4 */
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Reg_(V3_S4) a; /* uz components, then MAC / out */
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Reg_(V3_S4) b; /* ux components */
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union { Reg t0, up; }; /* &up, dedicated */
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union { Reg t1, uz, rt11; }; /* &uz, then RT11 save */
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union { Reg t2, ux, rt22; }; /* &ux, then RT22 save */
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};
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/* Atom 4: cross uz × ux → up. */
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internal MipsAtom* resolve_look_at__cross_uz_ux_to_up_proc(AtomArena_R aa,
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RegUse_resolve_look_at__cross_uz_ux_to_up_proc r
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) MipsAtom_Proc_(aa, {
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add_si(r.uz, r.scratch, O_(ResolveLookAtScratch,uz)), /* r.uz = &uz */
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add_si(r.ux, r.scratch, O_(ResolveLookAtScratch,ux)), /* r.ux = &ux */
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add_si(r.up, r.scratch, O_(ResolveLookAtScratch,up)), /* r.up = &up (out) */
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mac_load_v3s4(r.a, r.uz, 0), LdSlot_
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mac_load_v3s4(r.b, r.ux, 0), LdSlot_ /* taken by gte_mv_from_ctrl_r */
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/* OP reads D1/D2/D3 from RT11/RT22/RT33 ($0/$2/$4), not V0/V1/V2.
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* Mirror atom 1: cfc2 RT save, ctc2 RT diagonal from uz, mtc2 IR from ux, ctc2 RT restore. */
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/* Save the two RT control-register slots OP will clobber (reusing r.uz/r.ux — they're no longer needed as scratch pointers). */
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gte_mv_from_ctrl_r(r.rt11, gte_cr_RT11), /* r.rt11 = C2 $0 (RT11|RT12) */
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gte_mv_from_ctrl_r(r.rt22, gte_cr_RT22), /* r.rt22 = C2 $4 (RT22|RT33) */
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/* Load uz into the RT diagonal — same packing as atom 1.
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* OP reads D1 = RT11 from $0.low, D2 = RT22 from $2.high, D3 = RT33 from $4.high.
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* RT22 is shared between $2.high and $4.low — the ctc2 sequence to $2 then $4
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* sets RT22 to uz.y.high (via $2), then to uz.z.low (via $4).
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* OP reads RT22 from $2.high which the second ctc2 doesn't touch, so D2 stays uz.y.high. */
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gte_mv_to_ctrl_r(r.a.y, gte_cr_RT13), /* $2 = uz.y. RT13=uz.y.low, RT22=uz.y.high. */
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gte_mv_to_ctrl_r(r.a.z, gte_cr_RT22), /* $4 = uz.z. RT22=uz.z.low, RT33=uz.z.high. */
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gte_mv_to_ctrl_r(r.a.x, gte_cr_RT11), /* $0 = uz.x. RT11=uz.x. */
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GteDelay_ nop2, /* CTC2 retirement (CPU→COP2 2-slot delay) */
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/* Load ux into the IR registers (the second operand for OP). */
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gte_mv_to_data_r(r.b.x, C2_IR1), /* IR1 = ux.x */
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gte_mv_to_data_r(r.b.y, C2_IR2), /* IR2 = ux.y */
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gte_mv_to_data_r(r.b.z, C2_IR3), /* IR3 = ux.z */
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GteDelay_ nop2, /* MTC2 retirement (CPU→COP2 2-slot delay) */
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gte_cmdw_cross,
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/* Restore the RT slots we clobbered. */
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gte_mv_to_ctrl_r(r.rt11, gte_cr_RT11), /* restore C2 $0 (RT11|RT12) */
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gte_mv_to_ctrl_r(r.rt22, gte_cr_RT22), /* restore C2 $4 (RT22|RT33) */
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mac_gte_mv_from_data_r_mac123(r.a.x, r.a.y, r.a.z),
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GteDelay_ nop,
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/* Right-shift MAC by 12 to convert from GTE's S12.20 scale back to libpsyx
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* OuterProduct12 convention (S12.0, fp_one=4096). See atom 1 for rationale. */
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mac_shift_aright_v3_self(r.a.x, r.a.y, r.a.z, 12),
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mac_store_v3s4(r.a, r.up, 0),
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mac_yield()
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})
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typedef Struct_(Binds_ResolveLookAtPopAndTrans) {
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U4 look_at; /* U4 (MT3_S2S4* — destination matrix address) */
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@@ -407,7 +272,7 @@ internal MipsAtom* resolve_look_at__matrix_vector_proc(AtomArena_R aa,
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*
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* Pool cost: r_look_at (1) + r_scratch (carrier) + r_off_ptr + 1 clobber = 4 GPRs.
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*/
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I_ MipsAtom* resolve_look_at__trans_matrix_proc(AtomArena_R aa
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I_ MipsAtom* AtomBundleEntry_(resolve_look_at,trans_matrix)(AtomArena_R aa
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, U4 r_look_at, U4 r_scratch, U4 r_off_ptr
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, U4 r_tmp0, U4 r_tmp1, U4 r_tmp2
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) MipsAtom_Proc_(aa, {
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