mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-06-01 18:41:13 -07:00
got gp_screen_init working on the assembler side!
Will not be doing most of the course in assembly for now. Assemblers are missing a bunch of ergonomics not related to to instruction abstraction. Mostly related to offset and data typw width calulations and how to ergonomically utilize those symbols within the assembly syntax. The GNU gas macros are terrible and struct member resolution must be done manually. There is no utilities for doing stack allocations with alignment in mind either, no way to get info on the system's calling convention for foreign symbols (not even as a diagnostic, etc). C is a terrible for inline assembly, and gas doesn't support grabbing C struct info from header files (even though they are part of the same toolchain collection). There is no utilities for doing stack allocations with alignment in mind either, no way to get info on the system's calling convention for foreign symbols (not even as a diagnostic, etc). Low-level dev really is in a catch 22 of bad tooling.
This commit is contained in:
+55
-11
@@ -11,10 +11,19 @@
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.macro load_uimm p1, p2
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lui \p1, \p2
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.endm
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.macro load_half p1, p2
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lh \p1, \p2
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.endm
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.macro load_word p1, p2
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lw \p1, \p2
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.endm
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# Store
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.macro store_byte p1, p2
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sb \p1, \p2
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.endm
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.macro store_half p1, p2
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sh \p1, \p2
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.endm
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.macro store_word p1, p2
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sw \p1, \p2
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.endm
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@@ -33,14 +42,14 @@
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add \p1, \p2, \p3
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.endm
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.macro add_u p1, p2, p3
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add \p1, \p2, \p3
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addu \p1, \p2, \p3
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.endm
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.macro add_si p1, p2, p3
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addi \p1, \p2, \p3
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.endm
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.macro add_ui p1, p2, p3
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addiu \p1, \p2, \p3
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.endm
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.macro add_ui p1, p2, p3
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addiu \p1, \p2, \p3
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.endm
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# Subtraction
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.macro sub_s p1, p2, p3
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sub \p1, \p2, \p3
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@@ -49,7 +58,18 @@
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subu \p1, \p2, \p3
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.endm
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# Multiplication
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.macro mult_s p1, p2
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mult \p1, \p2
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.endm
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.macro mult_u p1, p2
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multu \p1, \p2
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.endm
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.macro mult_si p1, p2
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multi \p1, \p2
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.endm
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.macro mult_ui p1, p2
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multui \p1, \p2
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.endm
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# Division
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.macro div_s p1, p2
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div \p1, \p2
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@@ -122,14 +142,38 @@
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# Subroutine return address when doing a sub
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.set rret_addr, $ra
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.macro align8 size
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(\size + 7) & ~7
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.endm
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.macro def_cf_sp_size size
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.set cf_ssize, (\size + 7) & ~7
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.endm
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.macro stack_alloc amount
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add_ui $sp, $sp, - \amount
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.endm
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.macro stack_release amount
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add_ui $sp, $sp, \amount
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.endm
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# Data Widths
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.set byte, 1
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.set word, 4
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.macro stack_alloc amount
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add_ui $sp, - \amount
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.endm
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.equ U8, 1
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.equ S8, 1
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.equ U16, 2
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.equ S16, 2
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.equ U32, 4
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.equ S32, 4
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.equ SSIZE, 4
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.equ USIZE, 4
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.equ B8, S8
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.equ B16, S16
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.equ B32, S32
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.macro stack_release amount
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add_ui $sp, \amount
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.endm
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.equ false, 0
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.equ true, 1
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.equ true_overflow, 3
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+4
-4
@@ -177,10 +177,10 @@
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.equiv gp_b16_X, 0
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.equiv gp_b16_Y, 16
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.equiv RGB8_r, 0
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.equiv RGB8_g, 1
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.equiv RGB8_b, 2
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.equiv sizeof_RGB8, 3
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.equiv RGB8_r, 0
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.equiv RGB8_g, 1
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.equiv RGB8_b, 2
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.equiv RGB8, 3
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.equiv gp_pixel16, (2 * byte)
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.equiv gp_pixel24, (3 * byte)
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+38
-36
@@ -1,44 +1,46 @@
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.equ A2_S16, (S16 * 2)
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.equ A2_S32, (S32 * 2)
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# Extent_2S16 { S16 width; S16 height; }
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.equ Extent_2S16_width, 0
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.equ Extent_2S16_height, 2
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.equ sizeof_Extent_2S16, 4
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.equ Extent_2S16_width, (S16 * 0)
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.equ Extent_2S16_height, (S16 * 1)
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.equ Extent_2S16, (S16 * 2)
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# Extent_2S32 { S32 width; S32 height; }
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.equ Extent_2S32_width, 0
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.equ Extent_2S32_height, 4
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.equ sizeof_Extent_2S32, 8
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.equ Extent_2S32_width, (S32 * 0)
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.equ Extent_2S32_height, (S32 * 1)
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.equ Extent_2S32, (S32 * 2)
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# Vec_2S16 { S16 x; S16 y; }
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.equ Vec_2S16_x, 0
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.equ Vec_2S16_y, 2
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.equ sizeof_Vec_2S16, 4
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.equ Vec_2S16_x, (S16 * 0)
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.equ Vec_2S16_y, (S16 * 1)
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.equ Vec_2S16, (S16 * 2)
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# Vec_2S32 { S32 x; S32 y; }
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.equ Vec_2S32_x, 0
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.equ Vec_2S32_y, 4
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.equ sizeof_Vec_2S32, 8
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.equ Vec_2S32_x, (S32 * 0)
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.equ Vec_2S32_y, (S32 * 1)
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.equ Vec_2S32, (S32 * 2)
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# Range_2S16 { Vec_2S16 p0; Vec_2S16 p1; }
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.equ Range_2S16_p0, 0
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.equ Range_2S16_p0_x, 0
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.equ Range_2S16_p0_y, 2
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.equ Range_2S16_p1, 4
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.equ Range_2S16_p1_x, 4
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.equ Range_2S16_p1_y, 6
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.equ sizeof_Range_2S16, 8
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.equ Range_2S16_p0, (Vec_2S16 * 0)
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.equ Range_2S16_p1, (Vec_2S16 * 1)
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.equ Range_2S16_p0_x, (S16 * 0)
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.equ Range_2S16_p0_y, (S16 * 1)
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.equ Range_2S16_p1_x, (S16 * 2)
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.equ Range_2S16_p1_y, (S16 * 3)
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.equ Range_2S16, (S16 * 4)
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# Range_2S32 { Vec_2S32 p0; Vec_2S32 p1; }
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.equ Range_2S32_p0, 0
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.equ Range_2S32_p0_x, 0
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.equ Range_2S32_p0_y, 4
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.equ Range_2S32_p1, 8
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.equ Range_2S32_p1_x, 8
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.equ Range_2S32_p1_y, 12
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.equ sizeof_Range_2S32, 16
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.equ Range_2S32_p0, (Vec_2S32 * 0)
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.equ Range_2S32_p1, (Vec_2S32 * 1)
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.equ Range_2S32_p0_x, (S32 * 0)
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.equ Range_2S32_p0_y, (S32 * 1)
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.equ Range_2S32_p1_x, (S32 * 2)
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.equ Range_2S32_p1_y, (S32 * 3)
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.equ Range_2S32, (S32 * 4)
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# Rect_S16 { S16 x; S16 y; S16 width; S16 height; }
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.equ Rect_S16_x, 0
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.equ Rect_S16_y, 2
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.equ Rect_S16_width, 4
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.equ Rect_S16_height, 6
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.equ sizeof_Rect_S16, 8
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.equ Rect_S16_x, (S16 * 0)
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.equ Rect_S16_y, (S16 * 1)
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.equ Rect_S16_width, (S16 * 2)
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.equ Rect_S16_height, (S16 * 3)
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.equ Rect_S16, (S16 * 4)
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# Rect_S32 { S32 x; S32 y; S32 width; S32 height; }
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.equ Rect_S32_x, 0
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.equ Rect_S32_y, 4
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.equ Rect_S32_width, 8
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.equ Rect_S32_height, 12
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.equ sizeof_Rect_S32, 16
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.equ Rect_S32_x, (S32 * 0)
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.equ Rect_S32_y, (S32 * 1)
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.equ Rect_S32_width, (S32 * 2)
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.equ Rect_S32_height, (S32 * 3)
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.equ Rect_S32, (S32 * 4)
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