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resolve_look_at__cross_uz_ux_to_up_proc reviewed
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@@ -150,8 +150,8 @@ MipsAtomComp_Proc_(ab, {
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gte_mv_to_data_r(to_ir1, C2_IR1), /* IR1 = src.x (preserved in r_tmp — r_mac2_scratch was clobbered to MAC2 in stage 1.5) */
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gte_mv_to_data_r(to_ir2, C2_IR2),
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gte_mv_to_data_r(to_ir3, C2_IR3), /* IR3 = src.z (reloaded) */
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DmaSlot_ nop_slot1,
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DmaSlot_ nop_slot2,
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GteDelay_ nop_slot1,
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GteDelay_ nop_slot2,
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gte_cmdw_gpf,
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gte_mv_from_data_r(fr_mac1, C2_MAC1),
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gte_mv_from_data_r(fr_mac2, C2_MAC2),
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@@ -293,8 +293,8 @@ MipsAtom_Proc_(aa, {
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mac_gte_mv_from_data_r_mac123(r.t3.mac1_scratch, r.t4.mac2_scratch, r.norm), LdSlot_ nop,
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add_u_self( r.norm, r.t3.mac1_scratch),
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add_u_self( r.norm, r.t4.mac2_scratch),
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gte_mv_to_data_r( r.norm, C2_LZCS), DmaSlot_ nop2,
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gte_mv_from_data_r(r.shift, C2_LZCR), DmaSlot_ nop,
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gte_mv_to_data_r( r.norm, C2_LZCS), GteDelay_ nop2,
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gte_mv_from_data_r(r.shift, C2_LZCR), GteDelay_ nop,
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/* Stage 3: round LZCR to even, compute half-shift, align |v|² to bit 24.
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* r_norm holds |v|² sum; r_shift holds the LZCR count from mfc2.
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@@ -328,8 +328,8 @@ MipsAtom_Proc_(aa, {
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r.recip_est,
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r.t5.src_z, /* IR3 = src.z (reloaded) */
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r.t4.mac2_scratch, r.recip_est, r.t5.src_z,
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DmaSlot_ add_si(r.dst_ptr, r.scratch, dst_offset), // pre-laoding destination to register here.
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DmaSlot_ nop
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GteDelay_ add_si(r.dst_ptr, r.scratch, dst_offset), // pre-laoding destination to register here.
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GteDelay_ nop
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),
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/* sra by r_shift = (31-LZCR)/2 (saved before sqrtbl lookup) */
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mac_shift_aright_var_v3_self(r.t4.mac2_scratch, r.recip_est, r.t5.src_z, r.shift),
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