mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-08-14 11:38:14 +00:00
editing/reading.
This commit is contained in:
@@ -70,8 +70,8 @@
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/* ----------------------------------------------------------------------------
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* atom_reg (per-enum opt-in marker for the DWARF register-alias registry)
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*
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* The bare `atom_reg` token adjacent to an enum entry in mips.h / lottes_tape.h flags that alias as debug-visible for scan_source's register_alias_registry.
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* The C preprocessor strips it to a comment so no runtime symbol is created; the Lua scanner reads the bare token.
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* Bare `atom_reg` token adjacent to an enum entry that alias as debug-visible for scan_source's register_alias_registry.
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* Lua scanner reads the bare token.
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* ----------------------------------------------------------------------------*/
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#define atom_reg /* atom_reg: opt the preceding enum entry into the DWARF registry */
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+7
-8
@@ -3,7 +3,7 @@
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# include "assert.h"
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#endif
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#define offset_of(type, member) cast(U8,__builtin_offsetof(type,member))
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#define offset_of(type, member) cast(U8,__builtin_offsetof(type,member)) // Compiler builtin version of O_
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#define static_assert _Static_assert
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#define typeof __typeof__
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#define typeof_ptr(ptr) typeof((ptr)[0])
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@@ -139,16 +139,15 @@ enum { false = 0, true = 1, true_overflow, };
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typedef void Proc_(VoidFn) (void);
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#define kilo(n) (C_(U4, n) << 10)
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#define mega(n) (C_(U4, n) << 20)
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#define giga(n) (C_(U4, n) << 30)
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#define tera(n) (C_(U4, n) << 40)
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#define Kilo_(n) (C_(U4, n) << 10)
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#define Mega_(n) (C_(U4, n) << 20)
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#define Giga_(n) (C_(U4, n) << 30)
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#define Tera_(n) (C_(U4, n) << 40)
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#define null C_(U4, 0)
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#define nullptr C_(void*, 0)
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#define O_(type, field) C_(U4, & C_(type*,0)->field)
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#define OA_(type, member, idx) C_(U4, & C_(type*,0)->member[idx])
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#define OT_(field) O_(typeof_ptr(& field), filed))
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#define OT_(field) O_(typeof_ptr(& field), field))
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#define S_(data) C_(U4, sizeof(data))
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#define sop_1(op,a,b) C_(U1, s1_(a) op s1_(b))
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@@ -185,7 +184,7 @@ def_signed_ops(le, <=)
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#define alignas _Alignas
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#define alignof _Alignof
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#define byte_pad(amount, ...) B1 glue(_PAD_, __VA_ARGS__) [amount]
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#define pcast(type, data) (C_(type*, & (data)) [0])
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#define C_ptr(type, data) (C_(type*, & (data)) [0])
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#define dbg_args(...) __VA_ARGS__
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+13
-48
@@ -99,6 +99,12 @@ WORD_COUNT(mac_sub_v3s4, 3)
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, store_half(rt_height, base, offset + O_(Rect_S2,height))
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WORD_COUNT(mac_store_rects2, 4)
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/* atom_dbg_skip */
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#define mac_load_word_imm(dst, imm) \
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load_upper_i(dst, u4_hi(imm)) \
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, or_i_self( dst, u4_lo(imm))
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WORD_COUNT(mac_load_word_imm, 2)
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/* atom_dbg_skip */
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#define mac_load_tri_indices(r_face_cusor, r_i0, r_i1, r_i2) \
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load_half_u(r_i0, r_face_cusor, 0 * S_(S2)) \
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@@ -175,58 +181,17 @@ WORD_COUNT(mac_gte_sqr_v3, 8)
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, shift_aright_var(r_dz, r_dz, r_shift)
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WORD_COUNT(mac_gte_gpf_scale, 13)
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#define mac_apply_matrix_lv(r_mtx, r_vec, r_out, r_t0, r_t1, r_t2) \
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load_word( r_t0, r_mtx, 0) \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT11) \
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, load_word( r_t0, r_mtx, 4) \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT12) \
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, load_word( r_t0, r_mtx, 8) \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT13) \
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, load_word( r_t0, r_mtx, 12) \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT21) \
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, load_half_u(r_t0, r_mtx, 16) \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT22) \
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, nop2 /* Load PACKED pos into V0 (libgte SVECTOR layout).
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* r_vec points to atom-0-staged packed data ((pos.y << 16) | pos.x at +0, pos.z at +4).
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* LWC2 base register MUST be the pointer r_vec, NOT the loaded value r_t0. */ \
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, load_word(r_t0, r_vec, 0) \
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, nop \
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, gte_lw(C2_VXY0, r_vec, 0) \
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, load_word(r_t0, r_vec, 4) \
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, nop \
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, gte_lw(C2_VZ0, r_vec, 4) /* RTPS: cv=3 (no translation), sf=1 (no shift, integer), v=0 (V0 input),
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* mx=0 (rotation matrix). MAC = RT row · V0 + 0. RTPS also writes
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* SXY0/1/2 + SZ0..SZ3 (perspective division); ignored. */ \
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, gte_cmdw_rtps_sf1 /* Read MAC1/2/3 → out. */ \
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, gte_mv_from_data_r(r_t0, C2_MAC1) \
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, gte_mv_from_data_r(r_t1, C2_MAC2) \
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, gte_mv_from_data_r(r_t2, C2_MAC3) \
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, nop \
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, store_word(r_t0, r_out, 0) \
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, store_word(r_t1, r_out, 4) \
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, store_word(r_t2, r_out, 8)
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WORD_COUNT(mac_apply_matrix_lv, 31)
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#define mac_trans_matrix(r_mtx, r_off, r_t1) \
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load_word(r_t1, r_off, O_(V3_S4,x)) \
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, nop \
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, store_word(r_t1, r_mtx, O_(MT3_S2S4,t[0])) \
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#define mac_trans_mt3s3s4(r_mtx, r_off, r_t0, r_t1, r_t2) \
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load_word(r_t0, r_off, O_(V3_S4,x)) \
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, load_word(r_t1, r_off, O_(V3_S4,y)) \
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, nop \
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, load_word(r_t2, r_off, O_(V3_S4,z)) \
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, store_word(r_t0, r_mtx, O_(MT3_S2S4,t[0])) \
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, store_word(r_t1, r_mtx, O_(MT3_S2S4,t[1])) \
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, load_word(r_t1, r_off, O_(V3_S4,z)) \
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, nop \
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, store_word(r_t1, r_mtx, O_(MT3_S2S4,t[2]))
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WORD_COUNT(mac_trans_matrix, 9)
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, store_word(r_t2, r_mtx, O_(MT3_S2S4,t[2]))
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WORD_COUNT(mac_trans_mt3s3s4, 6)
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#define mac_gcmd_push(cmd, reg_transfer, reg_base, port) \
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load_upper_i(reg_transfer, u4_hi(cmd)) \
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, or_i_self( reg_transfer, u4_lo(cmd)) /* load_upper_i(reg_transfer, cmd >> 16), // or_i_self( reg_transfer, cmd & 0xFFFF), */ \
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mac_load_word_imm(reg_transfer, cmd) \
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, store_word( reg_transfer, reg_base, port)
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WORD_COUNT(mac_gcmd_push, 3)
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@@ -10,10 +10,7 @@ ATOM_FILE_DEBUGGER_LINE_MARKER(gp_atom_c);
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FI_ Slice_MipsCode ac_gcmd_push(AtomBuilder_R ab, U4 cmd, U4 reg_transfer, U4 reg_base, U2 port)
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MipsAtomComp_Proc_(ac_gcmd_push, ab, {
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load_upper_i(reg_transfer, u4_hi(cmd)),
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or_i_self( reg_transfer, u4_lo(cmd)),
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// load_upper_i(reg_transfer, cmd >> 16),
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// or_i_self( reg_transfer, cmd & 0xFFFF),
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mac_load_word_imm(reg_transfer, cmd),
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store_word( reg_transfer, reg_base, port),
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})
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+7
-65
@@ -83,79 +83,21 @@ FI_ Slice_MipsCode ac_gte_gpf_scale(AtomBuilder_R ab, U4 r_sx, U4 r_sy, U4 r_sz,
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shift_aright_var(r_dz, r_dz, r_shift),
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})
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/* ─── APPLY MATRIX LV (libgte ApplyMatrixLV port) ───
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* Atom component — auto-generates mac_apply_matrix_lv Mac composer macro.
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* Uses GTE RTPS (cv=1, sf=1, v=0) with lwc2-loaded V0/VZ0 inputs.
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* Per PSX-SPX `geometrytransformationenginegte.md` lines 416-418:
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* IR1 = MAC1 = (TRX*1000h + RT11*VX0 + RT12*VY0 + RT13*VZ0) SAR (sf*12)
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* IR2 = MAC2 = (TRY*1000h + RT21*VX0 + RT22*VY0 + RT23*VZ0) SAR (sf*12)
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* IR3 = MAC3 = (TRZ*1000h + RT31*VX0 + RT32*VY0 + RT33*VZ0) SAR (sf*12)
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* RTPS uses the FULL row of the rotation matrix (not just diagonal like MVMVA with mx=0).
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* libgte's `gte_ApplyMatrix` calls `gte_rtv0()` = RTPS cv=1 v=0 mx=0.
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* Per `gte.h` line 405 the body sets cv=3 (BK, zero-initialized) so no TR contribution.
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*
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* Operands:
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* r_mtx : MT3_S2S4* (matrix pointer)
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* r_vec : U4 (pointer to PACKED V0 data — (pos.y << 16) | pos.x at +0, pos.z at +4)
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* r_out : V3_S4* (output pointer; MAC1/2/3 stored here)
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* r_t0/1/2 : 3 GPR codes for matrix load + intermediate state
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* Words: ~26. Clobbers: r_t0, r_t1, r_t2 (C2 $0..$4, VXY0/VZ0, MAC1/2/3, SXY0/1/2). */
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FI_ Slice_MipsCode ac_apply_matrix_lv(AtomBuilder_R ab
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, U4 r_mtx, U4 r_vec, U4 r_out
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, U4 r_t0, U4 r_t1, U4 r_t2
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) MipsAtomComp_Proc_(ac_apply_matrix_lv, ab, {
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/* Load MATRIX rows into GTE RT11..RT33 (libgte convention: ctc2 to C2 $0..$4 in order).
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* load_half_u zero-extends the last word so RT33 = m[2][2] and TRX = 0. */
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load_word( r_t0, r_mtx, 0), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT11),
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load_word( r_t0, r_mtx, 4), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT12),
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load_word( r_t0, r_mtx, 8), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT13),
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load_word( r_t0, r_mtx, 12), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT21),
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load_half_u(r_t0, r_mtx, 16), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT22),
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nop2,
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/* Load PACKED pos into V0 (libgte SVECTOR layout).
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* r_vec points to atom-0-staged packed data ((pos.y << 16) | pos.x at +0, pos.z at +4).
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* LWC2 base register MUST be the pointer r_vec, NOT the loaded value r_t0. */
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load_word(r_t0, r_vec, 0), nop,
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gte_lw(C2_VXY0, r_vec, 0),
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load_word(r_t0, r_vec, 4), nop,
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gte_lw(C2_VZ0, r_vec, 4),
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/* RTPS: cv=3 (no translation), sf=1 (no shift, integer), v=0 (V0 input),
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* mx=0 (rotation matrix). MAC = RT row · V0 + 0. RTPS also writes
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* SXY0/1/2 + SZ0..SZ3 (perspective division); ignored. */
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gte_cmdw_rtps_sf1,
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/* Read MAC1/2/3 → out. */
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gte_mv_from_data_r(r_t0, C2_MAC1),
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gte_mv_from_data_r(r_t1, C2_MAC2),
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gte_mv_from_data_r(r_t2, C2_MAC3),
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nop,
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store_word(r_t0, r_out, 0),
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store_word(r_t1, r_out, 4),
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store_word(r_t2, r_out, 8),
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})
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/* ─── TRANS MATRIX (libgte TransMatrix port) ───
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* Atom component — auto-generates mac_trans_matrix Mac composer macro.
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* m->t = v (struct copy; libgte's TransMatrix at 0x8001a540 is just 3 store_words, no GTE, no add).
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* Uses 1 GPR (r_t1 = off value) per axis; per-axis load-delay-slot pattern.
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* Words: 9. Clobbers: r_t1. */
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FI_ Slice_MipsCode ac_trans_matrix(AtomBuilder_R ab
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FI_ Slice_MipsCode ac_trans_mt3s3s4(AtomBuilder_R ab
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, U4 r_mtx, U4 r_off
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, U4 r_t1
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) MipsAtomComp_Proc_(ac_trans_matrix, ab, {
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load_word(r_t1, r_off, O_(V3_S4,x)),
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nop,
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store_word(r_t1, r_mtx, O_(MT3_S2S4,t[0])),
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, U4 r_t0, U4 r_t1, U4 r_t2
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) MipsAtomComp_Proc_(ac_trans_mt3s3s4, ab, {
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load_word(r_t0, r_off, O_(V3_S4,x)),
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load_word(r_t1, r_off, O_(V3_S4,y)),
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nop,
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load_word(r_t2, r_off, O_(V3_S4,z)),
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store_word(r_t0, r_mtx, O_(MT3_S2S4,t[0])),
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store_word(r_t1, r_mtx, O_(MT3_S2S4,t[1])),
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load_word(r_t1, r_off, O_(V3_S4,z)),
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nop,
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store_word(r_t1, r_mtx, O_(MT3_S2S4,t[2])),
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store_word(r_t2, r_mtx, O_(MT3_S2S4,t[2])),
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})
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#pragma endregion MACs (Mips Atom Components)
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+5
-16
@@ -440,22 +440,11 @@ enum { _C2_TX_SUBS_ = 0
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#define gte_cmdw_mvmva_pass1_c11 (gte_cmd_base | enc_gte_v(2) | enc_gte_mx(3) | enc_gte_cmd(gte_cmd_mvmva))
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#define gte_cmdw_mvmva_no_tr gte_cmdw_mvmva_ir
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/* MVMVA pass 2 — EXACT C11 ApplyMatrixLV command.
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* Command word: 0x4A49E012.
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* bits 31-26: 010010 = COP2
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* bit 25: 1 (CO set)
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* bits 24-20: 01001 = 9 (fake_cmd)
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* bit 19: 1 (sf=1)
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* bits 18-17: 00 (mx=0, RT matrix)
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* bits 16-15: 11 (v=3, IR)
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* bits 14-13: 11 (cv=3, no translation)
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* bits 5-0: 010010 = MVMVA
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* sf=1, mx=0, v=3, cv=3. Pass 2 reads RT matrix, IR input, >>12. */
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#define gte_cmdw_mvmva_c11_pass2_exact 0x4A49E012
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/* MVMVA pass 1 — C11's exact command: 0x4A41E012.
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* bit 25: 1, sf=0, mx=0, v=3, cv=3. Pass 1 reads RT matrix, IR input, no shift. */
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#define gte_cmdw_mvmva_c11_pass1_exact 0x4A41E012
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/* MVMVA pass 2 — C11 ApplyMatrixLV command.
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* Decoded: op_cop2 | CO | fake_cmd=4 | sf=1 (>>12) | mx=0 (RT matrix) | v=3 (IR) | cv=3 (no translation) | lm=0 | cmd=MVMVA.
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* Reads (RT row · IR) >> 12 into MAC1/2/3. Per-field composition (no opaque literal)
|
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* keeps the bit layout visible at the call site + matches the libgte C-side byte-exact. */
|
||||
#define gte_cmdw_mvmva_c11_pass2 (gte_cmd_base | enc_gte_fake_cmd(4) | enc_gte_sf(1) | enc_gte_v(3) | enc_gte_mx(0) | enc_gte_cv(3) | enc_gte_cmd(gte_cmd_mvmva))
|
||||
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||||
/* MVMVA: sf=1 (>>12), mx=0 (RT matrix), v=0 (V0), cv=3 (no TR). */
|
||||
#define gte_cmdw_mvmva_sf1_mx0_v0_cv3 (gte_cmd_base | enc_gte_sf(1) | enc_gte_cv(3) | enc_gte_v(0) | enc_gte_mx(0) | enc_gte_cmd(gte_cmd_mvmva))
|
||||
|
||||
+5
-5
@@ -106,10 +106,10 @@ FI_ void mul_a3s4(A3_S4_R out_a, A3_S4 b) {
|
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(out_a[0])[2] *= b[2];
|
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}
|
||||
|
||||
FI_ void add_v3s4 (V3_S4_R out_a, V3_S4 b) { add_a3s4 (pcast(A3_S4_R, out_a), pcast(A3_S4, b)); }
|
||||
FI_ void add_v3s4_fp(V3_S4_R out_a, V3_S4 b) { add_a3s4_fp(pcast(A3_S4_R, out_a), pcast(A3_S4, b)); }
|
||||
FI_ void add_v3s4 (V3_S4_R out_a, V3_S4 b) { add_a3s4 (C_ptr(A3_S4_R, out_a), C_ptr(A3_S4, b)); }
|
||||
FI_ void add_v3s4_fp(V3_S4_R out_a, V3_S4 b) { add_a3s4_fp(C_ptr(A3_S4_R, out_a), C_ptr(A3_S4, b)); }
|
||||
|
||||
FI_ void sub_v3s4 (V3_S4_R out_a, V3_S4 b) { sub_a3s4 (pcast(A3_S4_R, out_a), pcast(A3_S4, b)); }
|
||||
FI_ void sub_v3s4_fp(V3_S4_R out_a, V3_S4 b) { sub_a3s4_fp(pcast(A3_S4_R, out_a), pcast(A3_S4, b)); }
|
||||
FI_ void sub_v3s4 (V3_S4_R out_a, V3_S4 b) { sub_a3s4 (C_ptr(A3_S4_R, out_a), C_ptr(A3_S4, b)); }
|
||||
FI_ void sub_v3s4_fp(V3_S4_R out_a, V3_S4 b) { sub_a3s4_fp(C_ptr(A3_S4_R, out_a), C_ptr(A3_S4, b)); }
|
||||
|
||||
FI_ void mul_v3s4 (V3_S4_R out_a, V3_S4 b) { mul_a3s4 (pcast(A3_S4_R, out_a), pcast(A3_S4, b)); }
|
||||
FI_ void mul_v3s4 (V3_S4_R out_a, V3_S4 b) { mul_a3s4 (C_ptr(A3_S4_R, out_a), C_ptr(A3_S4, b)); }
|
||||
|
||||
@@ -2,11 +2,29 @@
|
||||
# include "gen/macs.h"
|
||||
# include "gen/offsets.h"
|
||||
# include "bios.h"
|
||||
# include "mips.h"
|
||||
# include "lottes_tape.h"
|
||||
#endif
|
||||
|
||||
ATOM_FILE_DEBUGGER_LINE_MARKER(mips_atom_c);
|
||||
|
||||
#pragma region MACs (Mips Atom Components)
|
||||
|
||||
// Tired of this signature:
|
||||
FI_ Slice_MipsCode ac_load_word_imm(AtomBuilder_R ab, Reg dst, U4 imm)
|
||||
atom_dbg_skip MipsAtomComp_Proc_(ac_load_word_imm, ab, {
|
||||
load_upper_i(dst, u4_hi(imm)),
|
||||
or_i_self( dst, u4_lo(imm)),
|
||||
})
|
||||
// Can I get away with this instead?
|
||||
// atom_dbg_skip FI_ Slice_MipsCode
|
||||
// ac_load_word_imm(AtomBuilder_R ab, Reg dst, U4 imm) MipsAtomComp_Proc_(ab, {
|
||||
// load_upper_i(dst, u4_hi(imm)),
|
||||
// or_i_self( dst, u4_lo(imm)),
|
||||
// })
|
||||
|
||||
#pragma endregion MACs (Mips Atom Components)
|
||||
|
||||
#pragma region Baked Atoms
|
||||
|
||||
/* Flushes the Instruction Cache (PSX A-function 0x44 via BIOS stub at 0xA0).
|
||||
|
||||
@@ -549,7 +549,7 @@ internal MipsAtom_(screen_env_init) atom_info(atom_phase(screen_init)
|
||||
) {
|
||||
/* display[0] = (0, 0, 320, 240); rest of struct zeroed. */
|
||||
add_ui(R_ScreenX, R_0, ScreenRes_X), add_ui(R_ScreenY, R_0, ScreenRes_Y),
|
||||
mac_store_v2s2(R_ScreenX, R_ScreenY, R_ScreenBuf, O_(DisplayEnv,display_area.width) + OA_(DoubleBuffer,display,0)),
|
||||
mac_store_v2s2(R_ScreenX, R_ScreenY, R_ScreenBuf, O_(DisplayEnv,display_area.width) + O_(DoubleBuffer,display[0])),
|
||||
store_word(R_0, R_ScreenBuf, O_(DisplayEnv,display_area) + O_(DoubleBuffer,display[0])),
|
||||
store_word(R_0, R_ScreenBuf, O_(DisplayEnv,screen) + O_(DoubleBuffer,display[0])),
|
||||
store_word(R_0, R_ScreenBuf, O_(DisplayEnv,vinterlace) + O_(DoubleBuffer,display[0])),
|
||||
|
||||
Reference in New Issue
Block a user