mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-08-05 07:08:49 +00:00
overkill sio cruft, not keeping.
This commit is contained in:
@@ -63,3 +63,17 @@ WORD_COUNT(mac_put_disp_env, 15)
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, mac_gcmd_push(gp0_word_nop(), reg_transfer, reg_base, port)
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WORD_COUNT(mac_put_draw_env, 48)
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#define mac_pad_sio_write_pad_state(status_val, state_ptr_reg, scratch_reg) \
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add_ui(scratch_reg, R_0, status_val) \
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, store_word(scratch_reg, state_ptr_reg, O_(PadState,status)) /* FIX 2026-08-02: buttons = 0x0000FFFF = "no buttons pressed" in
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* libetc convention. Build it with LUI + ORI so addiu does not
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* sign-extend 0xFFFF to 0xFFFFFFFF. */ \
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, load_upper_i(scratch_reg, 0x0000) \
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, or_i(scratch_reg, scratch_reg, 0xFFFF) \
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, store_word(scratch_reg, state_ptr_reg, O_(PadState,buttons)) \
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, add_ui(scratch_reg, R_0, 0x80808080) \
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, store_word(scratch_reg, state_ptr_reg, O_(PadState,left_x)) \
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, add_ui(scratch_reg, R_0, 0) \
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, store_word(scratch_reg, state_ptr_reg, O_(PadState,attempt))
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WORD_COUNT(mac_pad_sio_write_pad_state, 9)
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@@ -35,5 +35,165 @@ enum {
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atom_offset_bounds_chk_floor_f3_face_exit = _atom_offset_bounds_chk_floor_f3_face_exit,
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};
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// --- atom: pad_sio_step (398 words) ---
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#define _atom_offset_settle_pre_port0_settle_pre_port0 -3
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#define _atom_offset_settle_post_port0_settle_post_port0 -3
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#define _atom_offset_wait_ack0_port0_ack0_received_port0 12
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#define _atom_offset_continue_wait_ack0_port0_wait_ack0_port0 -6
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#define _atom_offset_skip_port0_from_ack0_port1_start 160
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#define _atom_offset_wait_ackrel0_port0_ack_released_port0 12
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#define _atom_offset_continue_wait_ackrel0_port0_wait_ackrel0_port0 -6
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#define _atom_offset_skip_port0_from_ackrel0_port1_start 142
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#define _atom_offset_wait_ack1_port0_ack1_received_port0 12
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#define _atom_offset_continue_wait_ack1_port0_wait_ack1_port0 -6
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#define _atom_offset_skip_port0_from_ack1_port1_start 123
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#define _atom_offset_wait_ackrel1_port0_ack_released1_port0 12
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#define _atom_offset_continue_wait_ackrel1_port0_wait_ackrel1_port0 -6
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#define _atom_offset_skip_port0_from_ackrel1_port1_start 105
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#define _atom_offset_wait_ack2_port0_ack2_received_port0 12
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#define _atom_offset_continue_wait_ack2_port0_wait_ack2_port0 -6
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#define _atom_offset_skip_port0_from_ack2_port1_start 86
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#define _atom_offset_wait_ackrel2_port0_ack_released2_port0 12
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#define _atom_offset_continue_wait_ackrel2_port0_wait_ackrel2_port0 -6
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#define _atom_offset_skip_port0_from_ackrel2_port1_start 68
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#define _atom_offset_wait_ack3_port0_ack3_received_port0 12
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#define _atom_offset_continue_wait_ack3_port0_wait_ack3_port0 -6
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#define _atom_offset_skip_port0_from_ack3_port1_start 49
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#define _atom_offset_wait_ackrel3_port0_ack_released3_port0 12
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#define _atom_offset_continue_wait_ackrel3_port0_wait_ackrel3_port0 -6
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#define _atom_offset_skip_port0_from_ackrel3_port1_start 31
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#define _atom_offset_wait_rx4_port0_rx4_received_port0 12
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#define _atom_offset_continue_wait_rx4_port0_wait_rx4_port0 -6
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#define _atom_offset_skip_port0_from_rx4_port1_start 12
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#define _atom_offset_settle_pre_port1_settle_pre_port1 -3
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#define _atom_offset_settle_post_port1_settle_post_port1 -3
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#define _atom_offset_wait_ack0_port1_ack0_received_port1 12
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#define _atom_offset_continue_wait_ack0_port1_wait_ack0_port1 -6
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#define _atom_offset_skip_port1_from_ack0_end_atom 160
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#define _atom_offset_wait_ackrel0_port1_ack_released_port1 12
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#define _atom_offset_continue_wait_ackrel0_port1_wait_ackrel0_port1 -6
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#define _atom_offset_skip_port1_from_ackrel0_end_atom 142
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#define _atom_offset_wait_ack1_port1_ack1_received_port1 12
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#define _atom_offset_continue_wait_ack1_port1_wait_ack1_port1 -6
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#define _atom_offset_skip_port1_from_ack1_end_atom 123
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#define _atom_offset_wait_ackrel1_port1_ack_released1_port1 12
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#define _atom_offset_continue_wait_ackrel1_port1_wait_ackrel1_port1 -6
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#define _atom_offset_skip_port1_from_ackrel1_end_atom 105
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#define _atom_offset_wait_ack2_port1_ack2_received_port1 12
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#define _atom_offset_continue_wait_ack2_port1_wait_ack2_port1 -6
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#define _atom_offset_skip_port1_from_ack2_end_atom 86
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#define _atom_offset_wait_ackrel2_port1_ack_released2_port1 12
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#define _atom_offset_continue_wait_ackrel2_port1_wait_ackrel2_port1 -6
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#define _atom_offset_skip_port1_from_ackrel2_end_atom 68
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#define _atom_offset_wait_ack3_port1_ack3_received_port1 12
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#define _atom_offset_continue_wait_ack3_port1_wait_ack3_port1 -6
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#define _atom_offset_skip_port1_from_ack3_end_atom 49
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#define _atom_offset_wait_ackrel3_port1_ack_released3_port1 12
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#define _atom_offset_continue_wait_ackrel3_port1_wait_ackrel3_port1 -6
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#define _atom_offset_skip_port1_from_ackrel3_end_atom 31
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#define _atom_offset_wait_rx4_port1_rx4_received_port1 12
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#define _atom_offset_continue_wait_rx4_port1_wait_rx4_port1 -6
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#define _atom_offset_skip_port1_from_rx4_end_atom 12
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enum {
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atom_offset_settle_pre_port0_settle_pre_port0 = _atom_offset_settle_pre_port0_settle_pre_port0,
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atom_offset_settle_post_port0_settle_post_port0 = _atom_offset_settle_post_port0_settle_post_port0,
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atom_offset_wait_ack0_port0_ack0_received_port0 = _atom_offset_wait_ack0_port0_ack0_received_port0,
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atom_offset_continue_wait_ack0_port0_wait_ack0_port0 = _atom_offset_continue_wait_ack0_port0_wait_ack0_port0,
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atom_offset_skip_port0_from_ack0_port1_start = _atom_offset_skip_port0_from_ack0_port1_start,
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atom_offset_wait_ackrel0_port0_ack_released_port0 = _atom_offset_wait_ackrel0_port0_ack_released_port0,
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atom_offset_continue_wait_ackrel0_port0_wait_ackrel0_port0 = _atom_offset_continue_wait_ackrel0_port0_wait_ackrel0_port0,
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atom_offset_skip_port0_from_ackrel0_port1_start = _atom_offset_skip_port0_from_ackrel0_port1_start,
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atom_offset_wait_ack1_port0_ack1_received_port0 = _atom_offset_wait_ack1_port0_ack1_received_port0,
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atom_offset_continue_wait_ack1_port0_wait_ack1_port0 = _atom_offset_continue_wait_ack1_port0_wait_ack1_port0,
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atom_offset_skip_port0_from_ack1_port1_start = _atom_offset_skip_port0_from_ack1_port1_start,
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atom_offset_wait_ackrel1_port0_ack_released1_port0 = _atom_offset_wait_ackrel1_port0_ack_released1_port0,
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atom_offset_continue_wait_ackrel1_port0_wait_ackrel1_port0 = _atom_offset_continue_wait_ackrel1_port0_wait_ackrel1_port0,
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atom_offset_skip_port0_from_ackrel1_port1_start = _atom_offset_skip_port0_from_ackrel1_port1_start,
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atom_offset_wait_ack2_port0_ack2_received_port0 = _atom_offset_wait_ack2_port0_ack2_received_port0,
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atom_offset_continue_wait_ack2_port0_wait_ack2_port0 = _atom_offset_continue_wait_ack2_port0_wait_ack2_port0,
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atom_offset_skip_port0_from_ack2_port1_start = _atom_offset_skip_port0_from_ack2_port1_start,
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atom_offset_wait_ackrel2_port0_ack_released2_port0 = _atom_offset_wait_ackrel2_port0_ack_released2_port0,
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atom_offset_continue_wait_ackrel2_port0_wait_ackrel2_port0 = _atom_offset_continue_wait_ackrel2_port0_wait_ackrel2_port0,
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atom_offset_skip_port0_from_ackrel2_port1_start = _atom_offset_skip_port0_from_ackrel2_port1_start,
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atom_offset_wait_ack3_port0_ack3_received_port0 = _atom_offset_wait_ack3_port0_ack3_received_port0,
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atom_offset_continue_wait_ack3_port0_wait_ack3_port0 = _atom_offset_continue_wait_ack3_port0_wait_ack3_port0,
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atom_offset_skip_port0_from_ack3_port1_start = _atom_offset_skip_port0_from_ack3_port1_start,
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atom_offset_wait_ackrel3_port0_ack_released3_port0 = _atom_offset_wait_ackrel3_port0_ack_released3_port0,
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atom_offset_continue_wait_ackrel3_port0_wait_ackrel3_port0 = _atom_offset_continue_wait_ackrel3_port0_wait_ackrel3_port0,
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atom_offset_skip_port0_from_ackrel3_port1_start = _atom_offset_skip_port0_from_ackrel3_port1_start,
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atom_offset_wait_rx4_port0_rx4_received_port0 = _atom_offset_wait_rx4_port0_rx4_received_port0,
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atom_offset_continue_wait_rx4_port0_wait_rx4_port0 = _atom_offset_continue_wait_rx4_port0_wait_rx4_port0,
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atom_offset_skip_port0_from_rx4_port1_start = _atom_offset_skip_port0_from_rx4_port1_start,
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atom_offset_settle_pre_port1_settle_pre_port1 = _atom_offset_settle_pre_port1_settle_pre_port1,
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atom_offset_settle_post_port1_settle_post_port1 = _atom_offset_settle_post_port1_settle_post_port1,
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atom_offset_wait_ack0_port1_ack0_received_port1 = _atom_offset_wait_ack0_port1_ack0_received_port1,
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atom_offset_continue_wait_ack0_port1_wait_ack0_port1 = _atom_offset_continue_wait_ack0_port1_wait_ack0_port1,
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atom_offset_skip_port1_from_ack0_end_atom = _atom_offset_skip_port1_from_ack0_end_atom,
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atom_offset_wait_ackrel0_port1_ack_released_port1 = _atom_offset_wait_ackrel0_port1_ack_released_port1,
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atom_offset_continue_wait_ackrel0_port1_wait_ackrel0_port1 = _atom_offset_continue_wait_ackrel0_port1_wait_ackrel0_port1,
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atom_offset_skip_port1_from_ackrel0_end_atom = _atom_offset_skip_port1_from_ackrel0_end_atom,
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atom_offset_wait_ack1_port1_ack1_received_port1 = _atom_offset_wait_ack1_port1_ack1_received_port1,
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atom_offset_continue_wait_ack1_port1_wait_ack1_port1 = _atom_offset_continue_wait_ack1_port1_wait_ack1_port1,
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atom_offset_skip_port1_from_ack1_end_atom = _atom_offset_skip_port1_from_ack1_end_atom,
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atom_offset_wait_ackrel1_port1_ack_released1_port1 = _atom_offset_wait_ackrel1_port1_ack_released1_port1,
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atom_offset_continue_wait_ackrel1_port1_wait_ackrel1_port1 = _atom_offset_continue_wait_ackrel1_port1_wait_ackrel1_port1,
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atom_offset_skip_port1_from_ackrel1_end_atom = _atom_offset_skip_port1_from_ackrel1_end_atom,
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atom_offset_wait_ack2_port1_ack2_received_port1 = _atom_offset_wait_ack2_port1_ack2_received_port1,
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atom_offset_continue_wait_ack2_port1_wait_ack2_port1 = _atom_offset_continue_wait_ack2_port1_wait_ack2_port1,
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atom_offset_skip_port1_from_ack2_end_atom = _atom_offset_skip_port1_from_ack2_end_atom,
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atom_offset_wait_ackrel2_port1_ack_released2_port1 = _atom_offset_wait_ackrel2_port1_ack_released2_port1,
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atom_offset_continue_wait_ackrel2_port1_wait_ackrel2_port1 = _atom_offset_continue_wait_ackrel2_port1_wait_ackrel2_port1,
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atom_offset_skip_port1_from_ackrel2_end_atom = _atom_offset_skip_port1_from_ackrel2_end_atom,
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atom_offset_wait_ack3_port1_ack3_received_port1 = _atom_offset_wait_ack3_port1_ack3_received_port1,
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atom_offset_continue_wait_ack3_port1_wait_ack3_port1 = _atom_offset_continue_wait_ack3_port1_wait_ack3_port1,
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atom_offset_skip_port1_from_ack3_end_atom = _atom_offset_skip_port1_from_ack3_end_atom,
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atom_offset_wait_ackrel3_port1_ack_released3_port1 = _atom_offset_wait_ackrel3_port1_ack_released3_port1,
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atom_offset_continue_wait_ackrel3_port1_wait_ackrel3_port1 = _atom_offset_continue_wait_ackrel3_port1_wait_ackrel3_port1,
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atom_offset_skip_port1_from_ackrel3_end_atom = _atom_offset_skip_port1_from_ackrel3_end_atom,
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atom_offset_wait_rx4_port1_rx4_received_port1 = _atom_offset_wait_rx4_port1_rx4_received_port1,
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atom_offset_continue_wait_rx4_port1_wait_rx4_port1 = _atom_offset_continue_wait_rx4_port1_wait_rx4_port1,
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atom_offset_skip_port1_from_rx4_end_atom = _atom_offset_skip_port1_from_rx4_end_atom,
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};
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// --- atom: pad_apply_input (60 words) ---
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#define _atom_offset_dpad_left_exit_dpad_left 6
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#define _atom_offset_dpad_right_exit_dpad_right 6
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#define _atom_offset_dead_zone_low_check_dead_low_active 8
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#define _atom_offset_dead_zone_high_check_dead_high_active 15
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#define _atom_offset_dead_zone_skip_exit_stick 23
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#define _atom_offset_end_low_exit_stick 11
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enum {
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atom_offset_dpad_left_exit_dpad_left = _atom_offset_dpad_left_exit_dpad_left,
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atom_offset_dpad_right_exit_dpad_right = _atom_offset_dpad_right_exit_dpad_right,
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atom_offset_dead_zone_low_check_dead_low_active = _atom_offset_dead_zone_low_check_dead_low_active,
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atom_offset_dead_zone_high_check_dead_high_active = _atom_offset_dead_zone_high_check_dead_high_active,
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atom_offset_dead_zone_skip_exit_stick = _atom_offset_dead_zone_skip_exit_stick,
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atom_offset_end_low_exit_stick = _atom_offset_end_low_exit_stick,
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};
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// --- atom: pad_sio_diag_byte_exchange (53 words) ---
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#define _atom_offset_diag_wait_ack0_diag_ack0_done 5
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#define _atom_offset_diag_wait_ack0_diag_wait_ack0 -6
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#define _atom_offset_diag_timeout_ack0_diag_timeout 24
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#define _atom_offset_diag_wait_ack1_diag_ack1_done 5
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#define _atom_offset_diag_wait_ack1_diag_wait_ack1 -6
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#define _atom_offset_diag_timeout_ack1_diag_timeout 11
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#define _atom_offset_diag_success_diag_done 7
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enum {
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atom_offset_diag_wait_ack0_diag_ack0_done = _atom_offset_diag_wait_ack0_diag_ack0_done,
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atom_offset_diag_wait_ack0_diag_wait_ack0 = _atom_offset_diag_wait_ack0_diag_wait_ack0,
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atom_offset_diag_timeout_ack0_diag_timeout = _atom_offset_diag_timeout_ack0_diag_timeout,
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atom_offset_diag_wait_ack1_diag_ack1_done = _atom_offset_diag_wait_ack1_diag_ack1_done,
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atom_offset_diag_wait_ack1_diag_wait_ack1 = _atom_offset_diag_wait_ack1_diag_wait_ack1,
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atom_offset_diag_timeout_ack1_diag_timeout = _atom_offset_diag_timeout_ack1_diag_timeout,
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atom_offset_diag_success_diag_done = _atom_offset_diag_success_diag_done,
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};
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#pragma endregion hello_joypad.tape
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