Reviewing post-dsl refactors, more pseudo instructions

This commit is contained in:
ed
2026-07-08 17:14:11 -04:00
parent 5e7da32387
commit 74f390c3b1
4 changed files with 41 additions and 45 deletions
+10 -10
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@@ -123,9 +123,9 @@ FI_ Slice_U4 tb_slice(TapeBuilder tb) { return (Sli
* Args: _r, _g, _b are 8-bit RGB byte values (not raw 16-bit fields).
* Migrated from hello_gte_tape.c; takes RGB form per the Phase 3
* convention. */
#define mac_format_f3_color(_r, _g, _b) \
load_upper_i( R_AT, gp0_cmd_poly_f3 << 8 | (_b)) \
, or_i( R_AT, R_AT, ((_g) << 8) | (_r)) \
#define mac_format_f3_color(r,g,b) \
load_upper_i(R_AT, gp0_cmd_poly_f3 << 8 | (b)) \
, or_i_self( R_AT, ((g) << 8) | (r)) \
, store_word( R_AT, R_PrimCursor, O_(Poly_F3,color))
/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices to the F3 */
@@ -228,24 +228,24 @@ internal MipsAtom_(diag_yield) { mac_yield() };
internal MipsAtom_(diag_color) {
store_word( R_0, R_T7, 0),
load_upper_i(R_AT, gp0_cmd_poly_f3 << 8 | 0xFF), /* High: MipsCode Poly_F3(0x20) + Color B:FF */
or_i( R_AT, R_AT, 0xFF00), /* Low: Color G:FF, R:00 (Cyan) */
or_i_self( R_AT, 0xFF00), /* Low: Color G:FF, R:00 (Cyan) */
store_word( R_AT, R_T7, 4),
/* Fake coordinates - Swapped winding order to prevent GPU culling! */
load_upper_i(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 8), /* (16, 16) */
load_upper_i(R_AT, 0x0050), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 12), /* (80, 16) */
load_upper_i(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0050), store_word(R_AT, R_T7, 16), /* (16, 80) */
load_upper_i(R_AT, 0x0010), or_i_self(R_AT, 0x0010), store_word(R_AT, R_T7, 8), /* (16, 16) */
load_upper_i(R_AT, 0x0050), or_i_self(R_AT, 0x0010), store_word(R_AT, R_T7, 12), /* (80, 16) */
load_upper_i(R_AT, 0x0010), or_i_self(R_AT, 0x0050), store_word(R_AT, R_T7, 16), /* (16, 80) */
add_ui( R_T1, R_0, 10),
shift_lleft(R_T1, R_T1, 2),
add_u( R_T1, R_T1, R_T6),
shift_lleft_self(R_T1, 2),
add_u_self( R_T1, R_T6),
load_word( R_AT, R_T1, 0),
load_upper_i(R_V0, 0x0400), // <--- Fills load delay slot!
store_word( R_AT, R_T7, 0),
shift_lleft(R_AT, R_T7, 8), shift_lright(R_AT, R_AT, 8),
or_u( R_AT, R_AT, R_V0),
or_u_self( R_AT, R_V0),
store_word( R_AT, R_T1, 0),
add_ui(R_T7, R_T7, 20),
+5
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@@ -355,6 +355,7 @@ enum { _BitOffsets = 0
#define load_u4 load_word
// Ergonomic add to the same register.
#define or_i_self(rt_rs, imm) enc_i(op_ori, (rt_rs), (rt_rs), (imm))
#define add_ui_self(rt_rs, imm) enc_i(op_addiu, (rt_rs), (rt_rs), (imm))
/* Logic Opcodes */
@@ -364,11 +365,15 @@ enum { _BitOffsets = 0
#define xor_u(rd, rs, rt) enc_r(op_special, (rs), (rt), (rd), 0, fc_xor)
#define nor_u(rd, rs, rt) enc_r(op_special, (rs), (rt), (rd), 0, fc_nor)
#define or_u_self(rd_rs, rt) enc_r(op_special, (rd_rs), (rt), (rd_rs), 0, fc_or)
/* Shift family (R-type). shift_lleft/lright/aright: `sll/srl/sra rd, rt, shamt` */
#define shift_lleft(rd, rt, shamt) enc_r(op_special, R_0, (rt), (rd), (shamt), fc_sll)
#define shift_lright(rd, rt, shamt) enc_r(op_special, R_0, (rt), (rd), (shamt), fc_srl)
#define shift_aright(rd, rt, shamt) enc_r(op_special, R_0, (rt), (rd), (shamt), fc_sra)
#define shift_lleft_self(rd_rt, shamt) enc_r(op_special, R_0, (rd_rt), (rd_rt), (shamt), fc_sll)
#define mask_upper(rd, rt, shamt) shift_lleft(rd, rt, shamt), shift_lright(rd, rt, shamt)
/* jr rs — jump to address in rs. */
-9
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@@ -63,14 +63,6 @@ U4 vsync(U4 mode) __asm__("VSync");
void draw_orderingtbl(U4* buf) __asm__("DrawOTag");
/* Primitive Handling Macros
* All primitive types (PolyTag, Poly_F3, Poly_F4, Poly_G3, Poly_G4,
* Poly_FT3, Poly_FT4, Poly_GT3, Poly_GT4) and the set_poly_* setters,
* set_len / set_addr / get_len / get_addr macros, and the
* orderingtbl_add_primitive(s) helpers all live in `duffle/gp.h`
* now (per the Phase 3 gp.h overhaul). This file no longer duplicates
* those definitions. */
typedef Struct_(Tile) {
U4 tag;
RGB8 color;
@@ -78,7 +70,6 @@ typedef Struct_(Tile) {
Rect_S2 rect;
};
/*
Linear Algebra
*/