mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-08-06 07:38:47 +00:00
Codebase overhaul. Metaprogram proofread (part 2). Starting to get serious.
Need to rewrite the ps1 lua metaprogram sometime soonish. Getting too bloated... need to consolidate code paths. In this push codebase structure is starting to get a bit more realized. Decided todo now to match Pikuma's linking module files vods beginning to reorganize its codebase as well. Atoms & atom components are not in their on *.atom.c files. (Not calling it tape.c as I don't really bake tapes like that outside of the unity c file so far...) The lua metaprogram has had additional features added to it yet again to avoid hardcoding module handling and supporting multiple atom files per-module. Either after the camera or cd-rom section I'll be most likely pausing to fully refactor the metaprogram. Possibly as a full re-write to get the loc minimal.
This commit is contained in:
@@ -1,5 +1,5 @@
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/*
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* atom_dsl.h
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* dsl.atom.h
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* ============================================================================
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*
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* ATOM DSL: Annotation layer for tape atoms (lottes_tape.h).
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@@ -57,7 +57,6 @@
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#ifdef INTELLISENSE_DIRECTIVES
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#pragma once
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// #include <stdint.h>
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#endif
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/* ============================================================================
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@@ -148,12 +147,12 @@
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* ... body ...
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* atom_label(bounds_chk) ← another anchor
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*
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* atom_offset(culling, bounds_chk) ← resolved by gen/.offsets.h
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* atom_offset(culling, bounds_chk) ← resolved by gen/offsets.h
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*
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* The metaprogram generates gen/atom_offsets.h with one #define with the offset value per atom_offset(F, T) call.
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* The metaprogram generates gen/offsets.h with one #define with the offset value per atom_offset(F, T) call.
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* The preprocessor then expands the call to the right immediate value.
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*
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* If gen/atom_offsets.h is stale (or atom_label(name) is undefined), `atom_offset_F_T` becomes an undefined macro and the C build fails.
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* If gen/offsets.h is stale (or atom_label(name) is undefined), `atom_offset_F_T` becomes an undefined macro and the C build fails.
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* ============================================================================*/
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#define atom_offset(F, T) atom_offset_ ## F ## _ ## T
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// atom_label is a pure annotation for the metaprogram's offset calculations.
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+5
-2
@@ -43,7 +43,9 @@
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#define R_ restrict
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#define V_ volatile
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// Fictional, used for intiution.
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#pragma region Fictional //, used for intiution
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#define EUB_ restrict // Execute Unit Bound: Data is siloed in the ALU Register File. The Load/Store Unit is bypassed. (Route to Execution Unit. Keep in registers)
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#define ISO_ restrict // Isolated Provenance: Alternative to Exu_. Guarantees electrical memory isolation,
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// unlocking the compiler’s ability to safely pack data across multiple parallel SIMD lanes (vectorization).
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@@ -67,7 +69,8 @@
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#define latch_load_anchor(ptr) //__atomic_load_n(ptr, ooo_anchor_)
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#define latch_store_drain(ptr, val) //__atomic_store_n(ptr, val, ooo_drain_)
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#define pulse_xchg_weld(ptr, val) //__atomic_exchange_n(ptr, val, ooo_weld_)
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//end of: Fictional.
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#pragma endreigon Fictional
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// R_ (restrict) establishes an "Eigen" or "Proprius" mapping.
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@@ -1,150 +0,0 @@
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#ifdef INTELLISENSE_DIRECTIVES
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#pragma once
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#endif
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// Auto-generated by ps1_meta.lua — DO NOT EDIT
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// Source: C:\projects\Pikuma\ps1\code\duffle\lottes_tape.h
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// Component atoms (MipsAtomComp_(ac_*)) -> macro variants (mac_*)
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#ifndef WORD_COUNT
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#define WORD_COUNT(name, count) enum { words_##name = (count) };
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#endif
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/* atom_dbg_skip */
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/* ---------------------------------------------------------------------------
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* MACRO ATOM Components (Reusable Assembly Components)
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* These do NOT yield. They are expanded inline inside Tape Atoms.
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* ---------------------------------------------------------------------------*/
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// The 'Yield' sequence for Tape Atoms (mac_yield).
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// - mac_yield() is the safe default for atom-endings: 4 words, BD-slot of jr is mandatory nop.
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// - mac_yield_load() + mac_yield_tail():
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// - unconditional branch: mac_yield_load fills the branch's BD-slot (replaces a nop);
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// - mac_yield_tail runs at the branch target (does NOT re-load R_AtomJmp).
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#define mac_yield(...) \
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load_word(R_AtomJmp, R_TapePtr, 0) \
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, add_ui_self( R_TapePtr, S_(MipsCode)) \
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, jump_reg( R_AtomJmp) \
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, nop
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WORD_COUNT(mac_yield, 4)
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/* atom_dbg_skip */
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#define mac_yield_load(...) \
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load_word(R_AtomJmp, R_TapePtr, 0)
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WORD_COUNT(mac_yield_load, 1)
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/* atom_dbg_skip */
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#define mac_yield_tail(...) \
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add_ui_self(R_TapePtr, S_(MipsCode)) \
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, jump_reg( R_AtomJmp) \
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, nop
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WORD_COUNT(mac_yield_tail, 3)
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/* atom_dbg_skip */
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/* Words: 3; Loads 3 S2 indices from the face array */
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#define mac_load_tri_indices(...) \
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load_half_u(R_T0, R_FaceCursor, 0 * S_(S2)) \
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, load_half_u(R_T1, R_FaceCursor, 1 * S_(S2)) \
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, load_half_u(R_T2, R_FaceCursor, 2 * S_(S2))
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WORD_COUNT(mac_load_tri_indices, 3)
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||||
/* atom_dbg_skip */
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||||
/* Words: 18; Translates indices to vertex addresses and pushes them to GTE */
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#define mac_gte_load_tri_verts(...) \
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shift_lleft(R_AT, R_T0, v3s2_byteoff) \
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, add_u_self(R_AT, R_VertBase) \
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, load_word(R_V0, R_AT, O_(V3_S2,x)) \
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, load_word(R_V1, R_AT, O_(V3_S2,z)) \
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, gte_mv_to_data_r(R_V0, C2_VXY0) \
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, gte_mv_to_data_r(R_V1, C2_VZ0) \
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, shift_lleft(R_AT, R_T1, v3s2_byteoff) \
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, add_u_self(R_AT, R_VertBase) \
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, load_word(R_V0, R_AT, O_(V3_S2,x)) \
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, load_word(R_V1, R_AT, O_(V3_S2,z)) \
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, gte_mv_to_data_r(R_V0, C2_VXY1) \
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, gte_mv_to_data_r(R_V1, C2_VZ1) \
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, shift_lleft(R_AT, R_T2, v3s2_byteoff) \
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, add_u_self(R_AT, R_VertBase) \
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, load_word(R_V0, R_AT, O_(V3_S2,x)) \
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, load_word(R_V1, R_AT, O_(V3_S2,z)) \
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, gte_mv_to_data_r(R_V0, C2_VXY2) \
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, gte_mv_to_data_r(R_V1, C2_VZ2)
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WORD_COUNT(mac_gte_load_tri_verts, 18)
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/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
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* Hardcoded for Poly_F3 (5 words). For Poly_G4, use ac_insert_ot_tag_g4. */
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#define mac_insert_ot_tag_f3(...) \
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shift_lleft( R_T1, R_T1, S_(U4)/2) /* T1 = otz * S_(U4) (otz arg is implicit R_T1) */ \
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, add_u_self( R_T1, R_OtBase) /* T1 = & OrderingTable[OTZ] */ \
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, load_word( R_AT, R_T1, O_(PolyTag,code)) /* AT = old_ot_head */ \
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, load_upper_i(R_V0, (S_(Poly_F3)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits) /* V0 = (5 - 1) << 24 = 4 << 24 */ \
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, mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \
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, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
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, store_word( R_AT, R_PrimCursor, O_(PolyTag,code)) /* prim->tag = packed(prim_length, old_addr) */ \
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, shift_lleft( R_AT, R_PrimCursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \
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, shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)) \
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, store_word( R_AT, R_T1, O_(PolyTag,code)) /* OrderingTable[OTZ] = PrimCursor */
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WORD_COUNT(mac_insert_ot_tag_f3, 11)
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/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
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* Hardcoded for Poly_G4 (9 words). For Poly_F3, use ac_insert_ot_tag_f3. */
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#define mac_insert_ot_tag_g4(...) \
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shift_lleft( R_T1, R_T1, S_(U4)/2) /* T1 = otz * S_(U4) (otz arg is implicit R_T1) */ \
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, add_u_self( R_T1, R_OtBase) /* T1 = & OrderingTable[OTZ] */ \
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, load_word( R_AT, R_T1, O_(PolyTag,code)) /* AT = old_ot_head */ \
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, load_upper_i(R_V0, (S_(Poly_G4)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits) /* V0 = (9 - 1) << 24 = 8 << 24 */ \
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, mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \
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, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
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, store_word( R_AT, R_PrimCursor, O_(PolyTag,code)) /* prim->tag = packed(prim_length, old_addr) */ \
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, shift_lleft( R_AT, R_PrimCursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \
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, shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)) \
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, store_word( R_AT, R_T1, O_(PolyTag,code)) /* OrderingTable[OTZ] = PrimCursor */
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WORD_COUNT(mac_insert_ot_tag_g4, 11)
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||||
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||||
/* atom_dbg_skip */
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||||
#define mac_pack_color_word(off, cmd, r, g, b) \
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load_upper_i(R_AT, (cmd) << 8 | (b)) \
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||||
, or_i_self( R_AT, ((g) << 8) | (r)) \
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||||
, store_word( R_AT, R_PrimCursor, (off))
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||||
WORD_COUNT(mac_pack_color_word, 3)
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||||
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||||
/* atom_dbg_skip */
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||||
#define mac_format_f3_color(r, g, b) \
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mac_pack_color_word(O_(Poly_F3,color), gp0_cmd_poly_f3, r, g, b)
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WORD_COUNT(mac_format_f3_color, 3)
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||||
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||||
/* atom_dbg_skip */
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||||
/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices to the F3.
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||||
* PIPELINE: post-RTPT (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen). */
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#define mac_gte_store_f3(...) \
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gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_F3,p0)) \
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, gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_F3,p1)) \
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, gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_F3,p2))
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WORD_COUNT(mac_gte_store_f3, 3)
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#define mac_format_g4_color(r0, g0, b0, r1, g1, b1, r2, g2, b2, r3, g3, b3) \
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mac_pack_color_word(O_(Poly_G4,c0), gp0_cmd_poly_g4, r0,g0,b0) \
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, mac_pack_color_word(O_(Poly_G4,c1), 0, r1,g1,b1) \
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, mac_pack_color_word(O_(Poly_G4,c2), 0, r2,g2,b2) \
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, mac_pack_color_word(O_(Poly_G4,c3), 0, r3,g3,b3)
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WORD_COUNT(mac_format_g4_color, 12)
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/* atom_dbg_skip */
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||||
/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices of the
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* G4 triangle portion to p0/p1/p2.
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||||
* PIPELINE: post-RTPT, pre-RTPS (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen).
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* MUST be called BEFORE V3-RTPS, otherwise SXY0/1/2 get overwritten with v3
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* (RTPS writes only to SXY2, but to keep the three registers aligned with v0/v1/v2 you must store before RTPS). */
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#define mac_gte_store_g4_p012(...) \
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gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_G4,p0)) \
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, gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_G4,p1)) \
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, gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p2))
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WORD_COUNT(mac_gte_store_g4_p012, 3)
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/* atom_dbg_skip */
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/* Words: 1; Stores the V3 screen coord to the G4's p3 slot.
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* PIPELINE: post-RTPS (SXY2 holds v3.screen because RTPS writes its single-vertex result to SXY2;
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* SXY0 still holds v0.screen from the earlier RTPT.
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*/
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#define mac_gte_store_g4_p3(...) \
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gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p3))
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WORD_COUNT(mac_gte_store_g4_p3, 1)
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@@ -1,9 +0,0 @@
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// Auto-generated by ps1_meta.lua (passes/offsets.lua) — DO NOT EDIT
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// Source: C:\projects\Pikuma\ps1\code\duffle\lottes_tape.h
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#pragma once
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#pragma region lottes_tape
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#pragma endregion lottes_tape
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@@ -0,0 +1,183 @@
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#ifdef INTELLISENSE_DIRECTIVES
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#pragma once
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#endif
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// Auto-generated by ps1_meta.lua — DO NOT EDIT
|
||||
// Directory: C:\projects\Pikuma\ps1\code\duffle/
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// source: C:\projects\Pikuma\ps1\code\duffle\word_count.metadata.h
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// source: C:\projects\Pikuma\ps1\code\duffle\dsl.h
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// source: C:\projects\Pikuma\ps1\code\duffle\memory.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\math.h
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// source: C:\projects\Pikuma\ps1\code\duffle\gcc_asm.h
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||||
// source: C:\projects\Pikuma\ps1\code\duffle\mips.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gp.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gte.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\pad.h
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||||
// source: C:\projects\Pikuma\ps1\code\duffle\dsl.atom.h
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||||
// source: C:\projects\Pikuma\ps1\code\duffle\lottes_tape.h
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||||
// source: C:\projects\Pikuma\ps1\code\duffle\psyq.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\math.atom.c
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\mips.atom.c
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gte.atom.c
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gp.atom.c
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||||
// source: C:\projects\Pikuma\ps1\code\duffle\psyq.atom.c
|
||||
// Component atoms (MipsAtomComp_(ac_*)) -> macro variants (mac_*)
|
||||
|
||||
#ifndef WORD_COUNT
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#define WORD_COUNT(name, count) enum { words_##name = (count) };
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#endif
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/* atom_dbg_skip */
|
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/* ---------------------------------------------------------------------------
|
||||
* MACRO ATOM Components (Reusable Assembly Components)
|
||||
* These do NOT yield. They are expanded inline inside Tape Atoms.
|
||||
* ---------------------------------------------------------------------------*/
|
||||
// The 'Yield' sequence for Tape Atoms (mac_yield).
|
||||
// - mac_yield() is the safe default for atom-endings: 4 words, BD-slot of jr is mandatory nop.
|
||||
// - mac_yield_load() + mac_yield_tail():
|
||||
// - unconditional branch: mac_yield_load fills the branch's BD-slot (replaces a nop);
|
||||
// - mac_yield_tail runs at the branch target (does NOT re-load R_AtomJmp).
|
||||
#define mac_yield(...) \
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||||
load_word(R_AtomJmp, R_TapePtr, 0) \
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||||
, add_ui_self( R_TapePtr, S_(MipsCode)) \
|
||||
, jump_reg( R_AtomJmp) \
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||||
, nop
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||||
WORD_COUNT(mac_yield, 4)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_yield_load(...) \
|
||||
load_word(R_AtomJmp, R_TapePtr, 0)
|
||||
WORD_COUNT(mac_yield_load, 1)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_yield_tail(...) \
|
||||
add_ui_self(R_TapePtr, S_(MipsCode)) \
|
||||
, jump_reg( R_AtomJmp) \
|
||||
, nop
|
||||
WORD_COUNT(mac_yield_tail, 3)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_load_v2s2(rs_x, rs_y, r_base, offset) \
|
||||
load_half( rs_x, r_base, O_(V3_S2,x)) \
|
||||
, load_half( rs_y, r_base, O_(V3_S2,y))
|
||||
WORD_COUNT(mac_load_v2s2, 2)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_store_v2s2(rt_x, rt_y, base, offset) \
|
||||
store_half(rt_x, base, offset + O_(V2_S2,x)) \
|
||||
, store_half(rt_y, base, offset + O_(V2_S2,y))
|
||||
WORD_COUNT(mac_store_v2s2, 2)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_store_rects2(rt_x, rt_y, rt_width, rt_height, base, offset) \
|
||||
store_half(rt_x, base, offset + O_(Rect_S2,x)) \
|
||||
, store_half(rt_y, base, offset + O_(Rect_S2,y)) \
|
||||
, store_half(rt_width, base, offset + O_(Rect_S2,width)) \
|
||||
, store_half(rt_height, base, offset + O_(Rect_S2,height))
|
||||
WORD_COUNT(mac_store_rects2, 4)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_load_tri_indices(r_face_cusor, r_i0, r_i1, r_i2) \
|
||||
load_half_u(r_i0, r_face_cusor, 0 * S_(S2)) \
|
||||
, load_half_u(r_i1, r_face_cusor, 1 * S_(S2)) \
|
||||
, load_half_u(r_i2, r_face_cusor, 2 * S_(S2))
|
||||
WORD_COUNT(mac_load_tri_indices, 3)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_gte_store_f3(r_primitive_cursor) \
|
||||
gte_sw(C2_SXY0, r_primitive_cursor, O_(Poly_F3,p0)) \
|
||||
, gte_sw(C2_SXY1, r_primitive_cursor, O_(Poly_F3,p1)) \
|
||||
, gte_sw(C2_SXY2, r_primitive_cursor, O_(Poly_F3,p2))
|
||||
WORD_COUNT(mac_gte_store_f3, 3)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_gte_load_tri_verts(r_vert_base, r_v0, r_v1, r_v2) \
|
||||
shift_lleft(R_AT, r_v0, v3s2_byteoff) \
|
||||
, add_u_self(R_AT, r_vert_base) \
|
||||
, load_word(R_V0, R_AT, O_(V3_S2,x)) \
|
||||
, load_word(R_V1, R_AT, O_(V3_S2,z)) \
|
||||
, gte_mv_to_data_r(R_V0, C2_VXY0) \
|
||||
, gte_mv_to_data_r(R_V1, C2_VZ0) \
|
||||
, shift_lleft(R_AT, r_v1, v3s2_byteoff) \
|
||||
, add_u_self(R_AT, r_vert_base) \
|
||||
, load_word(R_V0, R_AT, O_(V3_S2,x)) \
|
||||
, load_word(R_V1, R_AT, O_(V3_S2,z)) \
|
||||
, gte_mv_to_data_r(R_V0, C2_VXY1) \
|
||||
, gte_mv_to_data_r(R_V1, C2_VZ1) \
|
||||
, shift_lleft(R_AT, r_v2, v3s2_byteoff) \
|
||||
, add_u_self(R_AT, r_vert_base) \
|
||||
, load_word(R_V0, R_AT, O_(V3_S2,x)) \
|
||||
, load_word(R_V1, R_AT, O_(V3_S2,z)) \
|
||||
, gte_mv_to_data_r(R_V0, C2_VXY2) \
|
||||
, gte_mv_to_data_r(R_V1, C2_VZ2)
|
||||
WORD_COUNT(mac_gte_load_tri_verts, 18)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_gte_store_g4_p012(r_primitive_cursor) \
|
||||
gte_sw(C2_SXY0, r_primitive_cursor, O_(Poly_G4,p0)) \
|
||||
, gte_sw(C2_SXY1, r_primitive_cursor, O_(Poly_G4,p1)) \
|
||||
, gte_sw(C2_SXY2, r_primitive_cursor, O_(Poly_G4,p2))
|
||||
WORD_COUNT(mac_gte_store_g4_p012, 3)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_gte_store_g4_p3(r_primitive_cursor) \
|
||||
gte_sw(C2_SXY2, r_primitive_cursor, O_(Poly_G4,p3))
|
||||
WORD_COUNT(mac_gte_store_g4_p3, 1)
|
||||
|
||||
#define mac_gcmd_push(cmd, reg_transfer, reg_base, port) \
|
||||
load_upper_i(reg_transfer, cmd >> 16) \
|
||||
, or_i_self( reg_transfer, cmd & 0xFFFF) \
|
||||
, store_word( reg_transfer, reg_base, port)
|
||||
WORD_COUNT(mac_gcmd_push, 3)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_store_rgb8(rr, rg, rb, base, offset) \
|
||||
store_byte(rr, base, offset + O_(RGB8,r)) \
|
||||
, store_byte(rg, base, offset + O_(RGB8,g)) \
|
||||
, store_byte(rb, base, offset + O_(RGB8,b))
|
||||
WORD_COUNT(mac_store_rgb8, 3)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_pack_color_word(r_base, off, cmd, r, g, b) \
|
||||
load_upper_i(R_AT, (cmd) << 8 | (b)) \
|
||||
, or_i_self( R_AT, ((g) << 8) | (r)) \
|
||||
, store_word( R_AT, r_base, (off))
|
||||
WORD_COUNT(mac_pack_color_word, 3)
|
||||
|
||||
/* atom_dbg_skip */
|
||||
#define mac_format_f3_color(r_base, r, g, b) \
|
||||
mac_pack_color_word(r_base, O_(Poly_F3,color), gp0_cmd_poly_f3, r, g, b)
|
||||
WORD_COUNT(mac_format_f3_color, 3)
|
||||
|
||||
#define mac_format_g4_color(r_prim_cursor, r0, g0, b0, r1, g1, b1, r2, g2, b2, r3, g3, b3) \
|
||||
mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c0), gp0_cmd_poly_g4, r0,g0,b0) \
|
||||
, mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c1), 0, r1,g1,b1) \
|
||||
, mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c2), 0, r2,g2,b2) \
|
||||
, mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c3), 0, r3,g3,b3)
|
||||
WORD_COUNT(mac_format_g4_color, 12)
|
||||
|
||||
#define mac_insert_ot_tag_f3(r_ot_base, r_prim_cursor) \
|
||||
shift_lleft( R_T1, R_T1, S_(U4)/2) /* T1 = otz * S_(U4) (otz arg is implicit R_T1) */ \
|
||||
, add_u_self( R_T1, r_ot_base) /* T1 = & OrderingTable[OTZ] */ \
|
||||
, load_word( R_AT, R_T1, O_(PolyTag,code)) /* AT = old_ot_head */ \
|
||||
, load_upper_i(R_V0, (S_(Poly_F3)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits) /* V0 = (5 - 1) << 24 = 4 << 24 */ \
|
||||
, mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \
|
||||
, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
|
||||
, store_word( R_AT, r_prim_cursor, O_(PolyTag,code)) /* prim->tag = packed(prim_length, old_addr) */ \
|
||||
, shift_lleft( R_AT, r_prim_cursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \
|
||||
, shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)) \
|
||||
, store_word( R_AT, R_T1, O_(PolyTag,code)) /* OrderingTable[OTZ] = PrimCursor */
|
||||
WORD_COUNT(mac_insert_ot_tag_f3, 11)
|
||||
|
||||
#define mac_insert_ot_tag_g4(r_ot_base, r_prim_cursor) \
|
||||
shift_lleft( R_T1, R_T1, S_(U4)/2) /* T1 = otz * S_(U4) (otz arg is implicit R_T1) */ \
|
||||
, add_u_self( R_T1, r_ot_base) /* T1 = & OrderingTable[OTZ] */ \
|
||||
, load_word( R_AT, R_T1, O_(PolyTag,code)) /* AT = old_ot_head */ \
|
||||
, load_upper_i(R_V0, (S_(Poly_G4)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits) /* V0 = (9 - 1) << 24 = 8 << 24 */ \
|
||||
, mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */ \
|
||||
, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
|
||||
, store_word( R_AT, r_prim_cursor, O_(PolyTag,code)) /* prim->tag = packed(prim_length, old_addr) */ \
|
||||
, shift_lleft( R_AT, r_prim_cursor, S_(PolyTag_len_bits)) /* AT = (prim_length << 24) | old_addr */ \
|
||||
, shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)) \
|
||||
, store_word( R_AT, R_T1, O_(PolyTag,code)) /* OrderingTable[OTZ] = PrimCursor */
|
||||
WORD_COUNT(mac_insert_ot_tag_g4, 11)
|
||||
|
||||
@@ -0,0 +1,26 @@
|
||||
// Auto-generated by ps1_meta.lua (passes/offsets.lua) — DO NOT EDIT
|
||||
// Directory: C:\projects\Pikuma\ps1\code\duffle\
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\word_count.metadata.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\dsl.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\memory.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\math.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gcc_asm.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\mips.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gp.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gte.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\pad.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\dsl.atom.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\lottes_tape.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\psyq.h
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\math.atom.c
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\mips.atom.c
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gte.atom.c
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\gp.atom.c
|
||||
// source: C:\projects\Pikuma\ps1\code\duffle\psyq.atom.c
|
||||
#pragma once
|
||||
|
||||
#pragma region duffle
|
||||
|
||||
|
||||
#pragma endregion duffle
|
||||
|
||||
@@ -0,0 +1,82 @@
|
||||
#ifdef INTELLISENSE_DIRECTIVES
|
||||
# include "dsl.h"
|
||||
# include "gp.h"
|
||||
# include "lottes_tape.h"
|
||||
#endif
|
||||
|
||||
ATOM_FILE_DEBUGGER_LINE_MARKER(gp_atom_c);
|
||||
|
||||
#pragma region MACs (Mips Atom Components)
|
||||
|
||||
FI_ Slice_MipsCode ac_gcmd_push(U4 cmd, U4 reg_transfer, U4 reg_base, U2 port)
|
||||
MipsAtomComp_Proc_(ac_gcmd_push, {
|
||||
load_upper_i(reg_transfer, cmd >> 16),
|
||||
or_i_self( reg_transfer, cmd & 0xFFFF),
|
||||
store_word( reg_transfer, reg_base, port),
|
||||
})
|
||||
|
||||
FI_ Slice_MipsCode ac_store_rgb8(U1 rr, U1 rg, U1 rb, U4 base, U4 offset) atom_dbg_skip MipsAtomComp_Proc_(ac_store_rgb8, {
|
||||
store_byte(rr, base, offset + O_(RGB8,r)),
|
||||
store_byte(rg, base, offset + O_(RGB8,g)),
|
||||
store_byte(rb, base, offset + O_(RGB8,b)),
|
||||
})
|
||||
|
||||
/* Words: 3; Emits one (cmd|color) word to R_PrimCursor at the given
|
||||
* byte offset. Internal helper used by the *_format_*_color macros. */
|
||||
FI_ Slice_MipsCode ac_pack_color_word(U4 r_base, U4 off, U4 cmd, U1 r, U1 g, U1 b)
|
||||
atom_dbg_skip MipsAtomComp_Proc_(ac_pack_color_word, {
|
||||
load_upper_i(R_AT, (cmd) << 8 | (b)),
|
||||
or_i_self( R_AT, ((g) << 8) | (r)),
|
||||
store_word( R_AT, r_base, (off)),
|
||||
})
|
||||
|
||||
/* Words: 3; Emits the F3 command+color word (cmd byte | BLUE | GREEN | RED)
|
||||
* Args: _r, _g, _b are 8-bit RGB byte values (not raw 16-bit fields). */
|
||||
FI_ Slice_MipsCode ac_format_f3_color(U4 r_base, U1 r, U1 g, U1 b)
|
||||
atom_dbg_skip MipsAtomComp_Proc_(ac_format_f3_color, { mac_pack_color_word(r_base, O_(Poly_F3,color), gp0_cmd_poly_f3, r, g, b) })
|
||||
|
||||
/* Words: 12; Emits the four (code|color) words of a Poly_G4.
|
||||
* Args: rN,gN,bN are 8-bit RGB byte values for each of the 4 vertices. */
|
||||
FI_ Slice_MipsCode ac_format_g4_color(U4 r_prim_cursor,
|
||||
U1 r0, U1 g0, U1 b0,
|
||||
U1 r1, U1 g1, U1 b1,
|
||||
U1 r2, U1 g2, U1 b2,
|
||||
U1 r3, U1 g3, U1 b3)
|
||||
MipsAtomComp_Proc_(ac_format_g4_color, {
|
||||
mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c0), gp0_cmd_poly_g4, r0,g0,b0),
|
||||
mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c1), 0, r1,g1,b1),
|
||||
mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c2), 0, r2,g2,b2),
|
||||
mac_pack_color_word(r_prim_cursor, O_(Poly_G4,c3), 0, r3,g3,b3),
|
||||
})
|
||||
|
||||
/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
|
||||
* Hardcoded for Poly_F3 (5 words). For Poly_G4, use ac_insert_ot_tag_g4. */
|
||||
I_ Slice_MipsCode ac_insert_ot_tag_f3(U4 r_ot_base, U4 r_prim_cursor) MipsAtomComp_Proc_(ac_insert_ot_tag_f3, {
|
||||
shift_lleft( R_T1, R_T1, S_(U4)/2), // T1 = otz * S_(U4) (otz arg is implicit R_T1)
|
||||
add_u_self( R_T1, r_ot_base), // T1 = & OrderingTable[OTZ]
|
||||
load_word( R_AT, R_T1, O_(PolyTag,code)), // AT = old_ot_head
|
||||
load_upper_i(R_V0, (S_(Poly_F3)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits), // V0 = (5 - 1) << 24 = 4 << 24
|
||||
mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)), // Strip upper 8 bits (length from prev cell) → keep only low 24
|
||||
or_u( R_AT, R_AT, R_V0), // Merge length
|
||||
store_word( R_AT, r_prim_cursor, O_(PolyTag,code)), // prim->tag = packed(prim_length, old_addr)
|
||||
shift_lleft( R_AT, r_prim_cursor, S_(PolyTag_len_bits)), // AT = (prim_length << 24) | old_addr
|
||||
shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)),
|
||||
store_word( R_AT, R_T1, O_(PolyTag,code)), // OrderingTable[OTZ] = PrimCursor
|
||||
})
|
||||
|
||||
/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
|
||||
* Hardcoded for Poly_G4 (9 words). For Poly_F3, use ac_insert_ot_tag_f3. */
|
||||
I_ Slice_MipsCode ac_insert_ot_tag_g4(U4 r_ot_base, U4 r_prim_cursor) MipsAtomComp_Proc_(ac_insert_ot_tag_g4, {
|
||||
shift_lleft( R_T1, R_T1, S_(U4)/2), // T1 = otz * S_(U4) (otz arg is implicit R_T1)
|
||||
add_u_self( R_T1, r_ot_base), // T1 = & OrderingTable[OTZ]
|
||||
load_word( R_AT, R_T1, O_(PolyTag,code)), // AT = old_ot_head
|
||||
load_upper_i(R_V0, (S_(Poly_G4)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits), // V0 = (9 - 1) << 24 = 8 << 24
|
||||
mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)), // Strip upper 8 bits (length from prev cell) → keep only low 24
|
||||
or_u( R_AT, R_AT, R_V0), // Merge length
|
||||
store_word( R_AT, r_prim_cursor, O_(PolyTag,code)), // prim->tag = packed(prim_length, old_addr)
|
||||
shift_lleft( R_AT, r_prim_cursor, S_(PolyTag_len_bits)), // AT = (prim_length << 24) | old_addr
|
||||
shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)),
|
||||
store_word( R_AT, R_T1, O_(PolyTag,code)), // OrderingTable[OTZ] = PrimCursor
|
||||
})
|
||||
|
||||
#pragma endregion MACs (Mips Atom Components)
|
||||
@@ -0,0 +1,76 @@
|
||||
#ifdef INTELLISENSE_DIRECTIVES
|
||||
# include "gen/macs.h"
|
||||
# include "gen/offsets.h"
|
||||
# include "gte.h"
|
||||
# include "gp.h"
|
||||
# include "lottes_tape.h"
|
||||
#endif
|
||||
|
||||
ATOM_FILE_DEBUGGER_LINE_MARKER(gte_atom_c);
|
||||
|
||||
#pragma region MACs (Mips Atom Components)
|
||||
|
||||
/* Words: 3; Loads 3 S2 indices from the face array */
|
||||
FI_ Slice_MipsCode ac_load_tri_indices(U4 r_face_cusor, U4 r_i0, U4 r_i1, U4 r_i2) atom_dbg_skip MipsAtomComp_Proc_(ac_load_tri_indices, {
|
||||
load_half_u(r_i0, r_face_cusor, 0 * S_(S2)),
|
||||
load_half_u(r_i1, r_face_cusor, 1 * S_(S2)),
|
||||
load_half_u(r_i2, r_face_cusor, 2 * S_(S2)),
|
||||
})
|
||||
|
||||
/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices to the F3.
|
||||
* PIPELINE: post-RTPT (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen). */
|
||||
FI_ Slice_MipsCode ac_gte_store_f3(U4 r_primitive_cursor) atom_dbg_skip MipsAtomComp_Proc_(ac_gte_store_f3, {
|
||||
gte_sw(C2_SXY0, r_primitive_cursor, O_(Poly_F3,p0)),
|
||||
gte_sw(C2_SXY1, r_primitive_cursor, O_(Poly_F3,p1)),
|
||||
gte_sw(C2_SXY2, r_primitive_cursor, O_(Poly_F3,p2)),
|
||||
})
|
||||
|
||||
/* Words: 18; Translates indices to vertex addresses and pushes them to GTE */
|
||||
I_ Slice_MipsCode ac_gte_load_tri_verts(U4 r_vert_base, U4 r_v0, U4 r_v1, U4 r_v2) atom_dbg_skip MipsAtomComp_Proc_(ac_gte_load_tri_verts, {
|
||||
shift_lleft(R_AT, r_v0, v3s2_byteoff), add_u_self(R_AT, r_vert_base), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY0), gte_mv_to_data_r(R_V1, C2_VZ0),
|
||||
shift_lleft(R_AT, r_v1, v3s2_byteoff), add_u_self(R_AT, r_vert_base), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY1), gte_mv_to_data_r(R_V1, C2_VZ1),
|
||||
shift_lleft(R_AT, r_v2, v3s2_byteoff), add_u_self(R_AT, r_vert_base), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY2), gte_mv_to_data_r(R_V1, C2_VZ2),
|
||||
})
|
||||
|
||||
/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices of the
|
||||
* G4 triangle portion to p0/p1/p2.
|
||||
* PIPELINE: post-RTPT, pre-RTPS (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen).
|
||||
* MUST be called BEFORE V3-RTPS, otherwise SXY0/1/2 get overwritten with v3
|
||||
* (RTPS writes only to SXY2, but to keep the three registers aligned with v0/v1/v2 you must store before RTPS). */
|
||||
FI_ Slice_MipsCode ac_gte_store_g4_p012(U4 r_primitive_cursor) atom_dbg_skip MipsAtomComp_Proc_(ac_gte_store_g4_p012, {
|
||||
gte_sw(C2_SXY0, r_primitive_cursor, O_(Poly_G4,p0)),
|
||||
gte_sw(C2_SXY1, r_primitive_cursor, O_(Poly_G4,p1)),
|
||||
gte_sw(C2_SXY2, r_primitive_cursor, O_(Poly_G4,p2)),
|
||||
})
|
||||
|
||||
/* Words: 1; Stores the V3 screen coord to the G4's p3 slot.
|
||||
* PIPELINE: post-RTPS (SXY2 holds v3.screen because RTPS writes its single-vertex result to SXY2;
|
||||
* SXY0 still holds v0.screen from the earlier RTPT.
|
||||
*/
|
||||
FI_ Slice_MipsCode ac_gte_store_g4_p3(U4 r_primitive_cursor) atom_dbg_skip MipsAtomComp_Proc_(ac_gte_store_g4_p3, { gte_sw(C2_SXY2, r_primitive_cursor, O_(Poly_G4,p3)) })
|
||||
|
||||
#pragma endregion MACs (Mips Atom Components)
|
||||
|
||||
#pragma region Bsked Atoms
|
||||
|
||||
typedef Struct_(Binds_SetGteWorld) {
|
||||
M3_S2* transform;
|
||||
};
|
||||
internal MipsAtom_(set_gte_world) atom_info(
|
||||
atom_bind(Binds_SetGteWorld)
|
||||
, atom_reads(R_TapePtr)
|
||||
){
|
||||
/* Pop matrix address from tape into R_T3 ($11) */
|
||||
load_word(R_T3, R_TapePtr, O_(Binds_SetGteWorld,transform)),
|
||||
add_ui_self( R_TapePtr, S_(Binds_SetGteWorld)),
|
||||
/* Load 3x3 Rotation + 3x1 Translation from R_T3 into GTE CONTROL Regs (ctc2) */
|
||||
load_word(R_T0, R_T3, 0), load_word(R_T1, R_T3, 4),
|
||||
gte_mv_to_ctrl_r(R_T0, gte_cr_RT11), gte_mv_to_ctrl_r(R_T1, gte_cr_RT12),
|
||||
load_word(R_T0, R_T3, 8), load_word(R_T1, R_T3, 12), load_word(R_T2, R_T3, 16),
|
||||
gte_mv_to_ctrl_r(R_T0, gte_cr_RT13), gte_mv_to_ctrl_r(R_T1, gte_cr_RT21), gte_mv_to_ctrl_r(R_T2, gte_cr_RT22),
|
||||
load_word(R_T0, R_T3, 20), load_word(R_T1, R_T3, 24), load_word(R_T2, R_T3, 28),
|
||||
gte_mv_to_ctrl_r(R_T0, gte_cr_TRX), gte_mv_to_ctrl_r(R_T1, gte_cr_TRY), gte_mv_to_ctrl_r(R_T2, gte_cr_TRZ),
|
||||
mac_yield()
|
||||
};
|
||||
|
||||
#pragma endregion Baked Atoms
|
||||
+42
-171
@@ -1,13 +1,14 @@
|
||||
#ifdef INTELLISENSE_DIRECTIVES
|
||||
# pragma once
|
||||
# include "gen/macs.h"
|
||||
# include "gen/offsets.h"
|
||||
|
||||
# include "dsl.h"
|
||||
# include "gcc_asm.h"
|
||||
# include "mips.h"
|
||||
# include "gte.h"
|
||||
# include "memory.h"
|
||||
# include "atom_dsl.h"
|
||||
# include "gen/duffle.macs.h"
|
||||
# include "gen/duffle.offsets.h"
|
||||
# include "dsl.atom.h"
|
||||
#endif
|
||||
|
||||
typedef U4 const MipsCode; // Underlying type to mips asm words.
|
||||
@@ -28,7 +29,19 @@ typedef U4 const MipsAtom; // Underlying type to an array of mips asm words that
|
||||
// FI_ Slice_MipsCode ac_X(args) { MipsCode ac_X[] align_(4) = { body }; return slice_from_array(MipsCode, ac_X); }
|
||||
#define MipsAtomComp_Proc_(sym, ...) { MipsCode sym [] align_(4) = __VA_ARGS__; return slice_from_array(MipsCode, sym); }
|
||||
|
||||
// Auto-generated component macros (<module>/gen/<dir>/<dir>.macs.h) are included manually by the unity build.
|
||||
/* Line-table anchor: gcc only adds a file to the .debug_line file table when the
|
||||
file contains line-numbered content. Files containing only:
|
||||
- `MipsAtomComp_` static-array declarations, or
|
||||
- `MipsAtomComp_Proc_` (force-inline) function bodies whose line info gets
|
||||
attributed to the call site at the include point are otherwise omitted from the file table,
|
||||
which breaks the DWARF injection when it tries to resolve atom-component provenance paths.
|
||||
|
||||
Place `ATOM_FILE_LINE_MARKER();` once at file scope in any `.atom.c` that defines atoms.
|
||||
The macro expands to a file-scope `internal U4 const` declaration keeps the file in the line table.
|
||||
The constant is in `.rodata` and unreferenced; the linker may eliminate it.
|
||||
The two-level concat + `__LINE__` suffix makes the identifier unique per call site
|
||||
(the identifier embeds the source line, so duplicates across `#include`d files don't collide). */
|
||||
#define ATOM_FILE_DEBUGGER_LINE_MARKER(file_name) internal U4 const tmpl(atom_file_debugger_line_marker,file_name) = 0
|
||||
|
||||
/* Register aliases */
|
||||
enum {
|
||||
@@ -59,15 +72,11 @@ enum {
|
||||
R_TScratch6 = R_T6,
|
||||
R_TScratch7 = R_T7,
|
||||
R_TScratch8 = R_T8,
|
||||
R_TScratch10 = R_V0,
|
||||
R_TScratch11 = R_V1,
|
||||
R_TScratch10 = R_V0, // Tend to be used with gte DMAs
|
||||
R_TScratch11 = R_V1, // Tend to be used with gte DMAs
|
||||
// Note(Ed): We can technically clobber these, but don't unless we hit a bottleneck.
|
||||
// R_TScratch12 = R_A0,
|
||||
// R_TScratch13 = R_A1,
|
||||
// R_TScratch14 = R_A3,
|
||||
// TODO(Ed): Review S0-S7, they are technically avaialble, we just have to snapshot them at the ABI boundary.
|
||||
// TODO(Ed): This is technically a waste of cycles for most work? so maybe only do this for expensive atoms on-demand or atom phases.
|
||||
// TODO(Ed): Sort out the other available registers... (Not sure how much is left avail)
|
||||
// A 0-2
|
||||
// S 0-7
|
||||
};
|
||||
|
||||
#pragma region Tape Drive
|
||||
@@ -79,7 +88,6 @@ typedef Slice_(MipsAtom); typedef Slice_MipsAtom Tape;
|
||||
/* The 'Exit' Atom */
|
||||
atom_dbg_skip MipsAtom_(tape_exit) { jump_reg(rret_addr), nop };
|
||||
|
||||
//TODO(Ed): Do we backup R_S0-7 here? Have it in a heavier tape run as a opt-in? Same with V0-1 and A0-3?
|
||||
/* Generalized Tape Engine Runner */
|
||||
FI_ void tape_run(Tape tape) { register U4* tape_ptr rgcc(R_TapePtr) = u4_r(tape.ptr); asm volatile(
|
||||
asm_words(
|
||||
@@ -97,6 +105,26 @@ FI_ void tape_run(Tape tape) { register U4* tape_ptr rgcc(R_TapePtr) = u4_r(tape
|
||||
clb_mem_drain
|
||||
); }
|
||||
|
||||
/* Fully Clobbered Tape */
|
||||
FI_ void tape_run_a02_s07(Tape tape) { register U4* tape_ptr rgcc(R_TapePtr) = u4_r(tape.ptr); asm volatile(
|
||||
asm_words(
|
||||
load_word( R_AtomJmp, R_TapePtr, 0) /* Bootstrap the first jump */
|
||||
, add_ui_self(R_TapePtr, S_(MipsAtom)) /* Advance tape */
|
||||
, call_reg( R_AtomJmp) /* jalr $t9 */
|
||||
, nop /* Branch delay slot */
|
||||
)
|
||||
asm_rpins, r_use(tape_ptr)
|
||||
asm_clobber:
|
||||
rlit(R_AT),
|
||||
rlit(R_V0), rlit(R_V1), rlit(R_A0), rlit(R_A1), rlit(R_A2),
|
||||
rlit(R_T0), rlit(R_T1), rlit(R_T2), rlit(R_T3), rlit(R_T4),
|
||||
rlit(R_T5), rlit(R_T6), rlit(R_T7), rlit(R_T8),
|
||||
rlit(R_S0), rlit(R_S1), rlit(R_S2), rlit(R_S3), rlit(R_S4),
|
||||
rlit(R_S5), rlit(R_S6), rlit(R_S7),
|
||||
clb_mem_drain
|
||||
); }
|
||||
|
||||
// Procedural authoring of tapes:
|
||||
typedef Relative_(FArena) Struct_(TapeBuilder) { U4 ptr; U4 capacity; U4 used; };
|
||||
FI_ void tb_init(TapeBuilder* tb, FArena* arena) { tb->ptr = arena->start; tb->used = 0; }
|
||||
FI_ TapeBuilder tb_make_old( FArena* arena) { return (TapeBuilder){ arena->start, 0 }; }
|
||||
@@ -113,7 +141,6 @@ FI_ Tape tb_slice(TapeBuilder tb) { return (Tape){ C_(U4
|
||||
|
||||
FI_ void tb_scope_run_end(TapeBuilder* tb) { tb_emit(tb,tape_exit); tape_run(tb_slice(tb[0])); }
|
||||
#define tb_scope_run(tb) for(U4 tbs_once=0;tbs_once==0;++tbs_once,tb_scope_run_end(tb))
|
||||
|
||||
#pragma endregion Tape Drive
|
||||
|
||||
#pragma region Macro Mips Atom Components
|
||||
@@ -143,118 +170,10 @@ atom_dbg_skip MipsAtomComp_(ac_yield_tail) {
|
||||
jump_reg( R_AtomJmp), nop,
|
||||
};
|
||||
|
||||
enum {
|
||||
R_PrimCursor = R_T7 atom_reg atom_type(U4*), /* VRAM output cursor (primitive buffer) */
|
||||
R_FaceCursor = R_T4 atom_reg atom_type(V4_S2*), /* Cube face-index cursor (V4_S2*); floor context switches to V3_S2* via atom_phase */
|
||||
R_VertBase = R_T5 atom_reg atom_type(V3_S2*), /* Base address of the vertex array */
|
||||
R_OtBase = R_T6 atom_reg atom_type(U4*), /* Base address of the Ordering Table */
|
||||
#define R_PrimCursor_Code R_T7_Code
|
||||
#define R_FaceCursor_Code R_T4_Code
|
||||
#define R_VertBase_Code R_T5_Code
|
||||
#define R_OtBase_Code R_T6_Code
|
||||
};
|
||||
|
||||
/* Words: 3; Loads 3 S2 indices from the face array */
|
||||
atom_dbg_skip MipsAtomComp_(ac_load_tri_indices) {
|
||||
load_half_u(R_T0, R_FaceCursor, 0 * S_(S2)),
|
||||
load_half_u(R_T1, R_FaceCursor, 1 * S_(S2)),
|
||||
load_half_u(R_T2, R_FaceCursor, 2 * S_(S2)),
|
||||
};
|
||||
|
||||
/* Words: 18; Translates indices to vertex addresses and pushes them to GTE */
|
||||
atom_dbg_skip MipsAtomComp_(ac_gte_load_tri_verts) {
|
||||
shift_lleft(R_AT, R_T0, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY0), gte_mv_to_data_r(R_V1, C2_VZ0),
|
||||
shift_lleft(R_AT, R_T1, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY1), gte_mv_to_data_r(R_V1, C2_VZ1),
|
||||
shift_lleft(R_AT, R_T2, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY2), gte_mv_to_data_r(R_V1, C2_VZ2),
|
||||
};
|
||||
|
||||
/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
|
||||
* Hardcoded for Poly_F3 (5 words). For Poly_G4, use ac_insert_ot_tag_g4. */
|
||||
MipsAtomComp_(ac_insert_ot_tag_f3) {
|
||||
shift_lleft( R_T1, R_T1, S_(U4)/2), // T1 = otz * S_(U4) (otz arg is implicit R_T1)
|
||||
add_u_self( R_T1, R_OtBase), // T1 = & OrderingTable[OTZ]
|
||||
load_word( R_AT, R_T1, O_(PolyTag,code)), // AT = old_ot_head
|
||||
load_upper_i(R_V0, (S_(Poly_F3)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits), // V0 = (5 - 1) << 24 = 4 << 24
|
||||
mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)), // Strip upper 8 bits (length from prev cell) → keep only low 24
|
||||
or_u( R_AT, R_AT, R_V0), // Merge length
|
||||
store_word( R_AT, R_PrimCursor, O_(PolyTag,code)), // prim->tag = packed(prim_length, old_addr)
|
||||
shift_lleft( R_AT, R_PrimCursor, S_(PolyTag_len_bits)), // AT = (prim_length << 24) | old_addr
|
||||
shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)),
|
||||
store_word( R_AT, R_T1, O_(PolyTag,code)), // OrderingTable[OTZ] = PrimCursor
|
||||
};
|
||||
|
||||
/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
|
||||
* Hardcoded for Poly_G4 (9 words). For Poly_F3, use ac_insert_ot_tag_f3. */
|
||||
MipsAtomComp_(ac_insert_ot_tag_g4) {
|
||||
shift_lleft( R_T1, R_T1, S_(U4)/2), // T1 = otz * S_(U4) (otz arg is implicit R_T1)
|
||||
add_u_self( R_T1, R_OtBase), // T1 = & OrderingTable[OTZ]
|
||||
load_word( R_AT, R_T1, O_(PolyTag,code)), // AT = old_ot_head
|
||||
load_upper_i(R_V0, (S_(Poly_G4)/S_(U4) - S_(PolyTag)/S_(U4)) << PolyTag_len_bits), // V0 = (9 - 1) << 24 = 8 << 24
|
||||
mask_upper( R_AT, R_AT, S_(PolyTag_len_bits)), // Strip upper 8 bits (length from prev cell) → keep only low 24
|
||||
or_u( R_AT, R_AT, R_V0), // Merge length
|
||||
store_word( R_AT, R_PrimCursor, O_(PolyTag,code)), // prim->tag = packed(prim_length, old_addr)
|
||||
shift_lleft( R_AT, R_PrimCursor, S_(PolyTag_len_bits)), // AT = (prim_length << 24) | old_addr
|
||||
shift_lright(R_AT, R_AT, S_(PolyTag_len_bits)),
|
||||
store_word( R_AT, R_T1, O_(PolyTag,code)), // OrderingTable[OTZ] = PrimCursor
|
||||
};
|
||||
|
||||
/* Words: 3; Emits one (cmd|color) word to R_PrimCursor at the given
|
||||
* byte offset. Internal helper used by the *_format_*_color macros. */
|
||||
FI_ Slice_MipsCode ac_pack_color_word(U4 off, U4 cmd, U1 r, U1 g, U1 b)
|
||||
atom_dbg_skip MipsAtomComp_Proc_(ac_pack_color_word, {
|
||||
load_upper_i(R_AT, (cmd) << 8 | (b)),
|
||||
or_i_self( R_AT, ((g) << 8) | (r)),
|
||||
store_word( R_AT, R_PrimCursor, (off)),
|
||||
})
|
||||
|
||||
/* Words: 3; Emits the F3 command+color word (cmd byte | BLUE | GREEN | RED)
|
||||
* Args: _r, _g, _b are 8-bit RGB byte values (not raw 16-bit fields). */
|
||||
FI_ Slice_MipsCode ac_format_f3_color(U1 r, U1 g, U1 b)
|
||||
atom_dbg_skip MipsAtomComp_Proc_(ac_format_f3_color, { mac_pack_color_word(O_(Poly_F3,color), gp0_cmd_poly_f3, r, g, b) })
|
||||
|
||||
/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices to the F3.
|
||||
* PIPELINE: post-RTPT (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen). */
|
||||
atom_dbg_skip MipsAtomComp_(ac_gte_store_f3) {
|
||||
gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_F3,p0)),
|
||||
gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_F3,p1)),
|
||||
gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_F3,p2)),
|
||||
};
|
||||
|
||||
/* Words: 12; Emits the four (code|color) words of a Poly_G4.
|
||||
* Args: rN,gN,bN are 8-bit RGB byte values for each of the 4 vertices. */
|
||||
FI_ Slice_MipsCode ac_format_g4_color(
|
||||
U1 r0, U1 g0, U1 b0,
|
||||
U1 r1, U1 g1, U1 b1,
|
||||
U1 r2, U1 g2, U1 b2,
|
||||
U1 r3, U1 g3, U1 b3)
|
||||
MipsAtomComp_Proc_(ac_format_g4_color, {
|
||||
mac_pack_color_word(O_(Poly_G4,c0), gp0_cmd_poly_g4, r0,g0,b0),
|
||||
mac_pack_color_word(O_(Poly_G4,c1), 0, r1,g1,b1),
|
||||
mac_pack_color_word(O_(Poly_G4,c2), 0, r2,g2,b2),
|
||||
mac_pack_color_word(O_(Poly_G4,c3), 0, r3,g3,b3),
|
||||
})
|
||||
|
||||
/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices of the
|
||||
* G4 triangle portion to p0/p1/p2.
|
||||
* PIPELINE: post-RTPT, pre-RTPS (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen).
|
||||
* MUST be called BEFORE V3-RTPS, otherwise SXY0/1/2 get overwritten with v3
|
||||
* (RTPS writes only to SXY2, but to keep the three registers aligned with v0/v1/v2 you must store before RTPS). */
|
||||
atom_dbg_skip MipsAtomComp_(ac_gte_store_g4_p012) {
|
||||
gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_G4,p0)),
|
||||
gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_G4,p1)),
|
||||
gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p2)),
|
||||
};
|
||||
|
||||
/* Words: 1; Stores the V3 screen coord to the G4's p3 slot.
|
||||
* PIPELINE: post-RTPS (SXY2 holds v3.screen because RTPS writes its single-vertex result to SXY2;
|
||||
* SXY0 still holds v0.screen from the earlier RTPT.
|
||||
*/
|
||||
atom_dbg_skip MipsAtomComp_(ac_gte_store_g4_p3) { gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p3)) };
|
||||
|
||||
#pragma endregion Macro Atom Components
|
||||
|
||||
#pragma region Mips Atom Builder
|
||||
// This allows for runtime procedural authoring of mips atoms.
|
||||
// This helps with runtime procedural authoring of mips atoms.
|
||||
|
||||
typedef Struct_(FMipsAtom512) { U4 data[512]; U4 used; };
|
||||
|
||||
@@ -277,57 +196,9 @@ FI_ void atombuilder_end(MipsAtomBuilder_R ab) {
|
||||
}
|
||||
|
||||
#define mipsatom_from_builder(ab) (Slice_MipsCode){ab.start, ab.used}
|
||||
|
||||
#pragma endregion Mips Atom Builder
|
||||
|
||||
#pragma region Baked Mips Atoms
|
||||
// These atoms are resolved at compile time and are (usually) statically linked readonly data.
|
||||
|
||||
enum {
|
||||
bios_flushcache = 0x44,
|
||||
bios_table_addr = 0xA0,
|
||||
};
|
||||
|
||||
/* Flushes the Instruction Cache (PSX A-function 0x44 via BIOS stub at 0xA0).
|
||||
* Sequence (per MIPS ABI; arguments in arg registers, RA pushed to stack):
|
||||
* 1. sp -= 8; sw $ra, 4($sp) ; save RA
|
||||
* 2. $a0 = bios_flushcache (arg0)
|
||||
* 3. $t0 = bios_table_addr ; t0 = &BIOS A-function table
|
||||
* 4. jalr $t0, $ra ; call BIOS(flushcache)
|
||||
* nop ; branch delay slot
|
||||
* 5. lw $ra, 4($sp); jr $ra ; restore & return
|
||||
* 6. sp += 8
|
||||
*/
|
||||
internal MipsAtom_(mips_flush_icache) {
|
||||
add_ui(rstack_ptr, rstack_ptr, -MipsStackAlignment), // sp -= 8
|
||||
store_word(rret_addr, rstack_ptr, S_(U4)), // sw $ra, 4($sp)
|
||||
add_ui(rret_0, rdiscard, bios_flushcache), // addiu $a0, $0, 0x44
|
||||
add_ui(rtmp_0, rdiscard, bios_table_addr), // addiu $t0, $0, 0xA0
|
||||
jump_link(rtmp_0, rret_addr), nop, // jalr $t0, $ra, BD slot
|
||||
load_word(rret_addr, rstack_ptr, S_(U4)), // lw $ra, 4($sp)
|
||||
jump_reg(rret_addr), // jr $ra
|
||||
add_ui(rstack_ptr, rstack_ptr, MipsStackAlignment), // sp += 8 (BD)
|
||||
mac_yield(),
|
||||
};
|
||||
|
||||
typedef Struct_(Binds_SetGteWorld) {
|
||||
M3_S2* transform;
|
||||
};
|
||||
internal MipsAtom_(set_gte_world) atom_info(
|
||||
atom_bind(Binds_SetGteWorld)
|
||||
, atom_reads(R_TapePtr)
|
||||
){
|
||||
/* Pop matrix address from tape into R_T3 ($11) */
|
||||
load_word(R_T3, R_TapePtr, O_(Binds_SetGteWorld,transform)),
|
||||
add_ui_self( R_TapePtr, S_(Binds_SetGteWorld)),
|
||||
/* Load 3x3 Rotation + 3x1 Translation from R_T3 into GTE CONTROL Regs (ctc2) */
|
||||
load_word(R_T0, R_T3, 0), load_word(R_T1, R_T3, 4),
|
||||
gte_mv_to_ctrl_r(R_T0, gte_cr_RT11), gte_mv_to_ctrl_r(R_T1, gte_cr_RT12),
|
||||
load_word(R_T0, R_T3, 8), load_word(R_T1, R_T3, 12), load_word(R_T2, R_T3, 16),
|
||||
gte_mv_to_ctrl_r(R_T0, gte_cr_RT13), gte_mv_to_ctrl_r(R_T1, gte_cr_RT21), gte_mv_to_ctrl_r(R_T2, gte_cr_RT22),
|
||||
load_word(R_T0, R_T3, 20), load_word(R_T1, R_T3, 24), load_word(R_T2, R_T3, 28),
|
||||
gte_mv_to_ctrl_r(R_T0, gte_cr_TRX), gte_mv_to_ctrl_r(R_T1, gte_cr_TRY), gte_mv_to_ctrl_r(R_T2, gte_cr_TRZ),
|
||||
mac_yield()
|
||||
};
|
||||
|
||||
#pragma endregion Baked Mips Atoms
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
#ifdef INTELLISENSE_DIRECTIVES
|
||||
# include "gen/macs.h"
|
||||
# include "gen/offsets.h"
|
||||
# include "math.h"
|
||||
# include "lottes_tape.h"
|
||||
#endif
|
||||
|
||||
ATOM_FILE_DEBUGGER_LINE_MARKER(math_atom_c);
|
||||
|
||||
#pragma region MACs (Mips Atom Component)
|
||||
|
||||
FI_ Slice_MipsCode ac_load_v2s2(U4 rs_x, U4 rs_y, U4 r_base, U4 offset) atom_dbg_skip MipsAtomComp_Proc_(ac_load_v2s2, {
|
||||
load_half( rs_x, r_base, O_(V3_S2,x)),
|
||||
load_half( rs_y, r_base, O_(V3_S2,y)),
|
||||
})
|
||||
|
||||
FI_ Slice_MipsCode ac_store_v2s2(U4 rt_x, U4 rt_y, U4 base, U4 offset) atom_dbg_skip MipsAtomComp_Proc_(ac_store_v2s2, {
|
||||
store_half(rt_x, base, offset + O_(V2_S2,x)),
|
||||
store_half(rt_y, base, offset + O_(V2_S2,y)),
|
||||
})
|
||||
|
||||
FI_ Slice_MipsCode ac_store_rects2(U4 rt_x, U4 rt_y, U4 rt_width, U4 rt_height, U4 base, U4 offset) atom_dbg_skip MipsAtomComp_Proc_(ac_store_rects2, {
|
||||
store_half(rt_x, base, offset + O_(Rect_S2,x)),
|
||||
store_half(rt_y, base, offset + O_(Rect_S2,y)),
|
||||
store_half(rt_width, base, offset + O_(Rect_S2,width)),
|
||||
store_half(rt_height, base, offset + O_(Rect_S2,height)),
|
||||
})
|
||||
|
||||
#pragma endregion MACs (Mips Atom Component)
|
||||
+5
-10
@@ -34,10 +34,10 @@ typedef Struct_(V4_S4) { S4 x; S4 y; S4 z; S4 w; };
|
||||
typedef Struct_(R2_S2) { V2_S2 p0; V2_S2 p1; };
|
||||
typedef Struct_(R2_S4) { V2_S4 p0; V2_S4 p1; };
|
||||
|
||||
typedef Struct_(Rect_S2) { S2 x; S2 y; S2 width; S2 height; };
|
||||
typedef Struct_(Rect_S4) { S4 x; S4 y; S4 width; S4 height; };
|
||||
typedef Struct_(Rect_S2) { S2 x; S2 y; S2 width; S2 height; };
|
||||
typedef Struct_(Rect_S4) { S4 x; S4 y; S4 width; S4 height; };
|
||||
|
||||
typedef Struct_(M3_S2) { A3x3_S2 m; A3_S4 t; };
|
||||
typedef Struct_(M3_S2) { A3x3_S2 m; A3_S4 t; };
|
||||
|
||||
typedef Array_(V2_S2, 2);
|
||||
typedef Array_(V2_S2, 3);
|
||||
@@ -61,10 +61,5 @@ FI_ void add_a3s4_fp(A3_S4_R out_a, A3_S4 b) {
|
||||
(out_a[0])[2] += b[2] >> 1;
|
||||
}
|
||||
|
||||
FI_ void add_v3s4(V3_S4_R out_a, V3_S4 b) {
|
||||
add_a3s4(pcast(A3_S4_R, out_a), pcast(A3_S4, b));
|
||||
}
|
||||
|
||||
FI_ void add_v3s4_fp(V3_S4_R out_a, V3_S4 b) {
|
||||
add_a3s4_fp(pcast(A3_S4_R, out_a), pcast(A3_S4, b));
|
||||
}
|
||||
FI_ void add_v3s4 (V3_S4_R out_a, V3_S4 b) { add_a3s4 (pcast(A3_S4_R, out_a), pcast(A3_S4, b)); }
|
||||
FI_ void add_v3s4_fp(V3_S4_R out_a, V3_S4 b) { add_a3s4_fp(pcast(A3_S4_R, out_a), pcast(A3_S4, b)); }
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
#ifdef INTELLISENSE_DIRECTIVES
|
||||
# include "gen/macs.h"
|
||||
# include "gen/offsets.h"
|
||||
# include "lottes_tape.h"
|
||||
#endif
|
||||
|
||||
ATOM_FILE_DEBUGGER_LINE_MARKER(mips_atom_c);
|
||||
|
||||
#pragma region Baked Atoms
|
||||
|
||||
enum {
|
||||
bios_flushcache = 0x44,
|
||||
bios_table_addr = 0xA0,
|
||||
};
|
||||
|
||||
/* Flushes the Instruction Cache (PSX A-function 0x44 via BIOS stub at 0xA0).
|
||||
* Sequence (per MIPS ABI; arguments in arg registers, RA pushed to stack):
|
||||
* 1. sp -= 8; sw $ra, 4($sp) ; save RA
|
||||
* 2. $a0 = bios_flushcache (arg0)
|
||||
* 3. $t0 = bios_table_addr ; t0 = &BIOS A-function table
|
||||
* 4. jalr $t0, $ra ; call BIOS(flushcache)
|
||||
* nop ; branch delay slot
|
||||
* 5. lw $ra, 4($sp); jr $ra ; restore & return
|
||||
* 6. sp += 8
|
||||
*/
|
||||
internal MipsAtom_(mips_flush_icache) {
|
||||
add_ui(rstack_ptr, rstack_ptr, -MipsStackAlignment), // sp -= 8
|
||||
store_word(rret_addr, rstack_ptr, S_(U4)), // sw $ra, 4($sp)
|
||||
add_ui(rret_0, rdiscard, bios_flushcache), // addiu $a0, $0, 0x44
|
||||
add_ui(rtmp_0, rdiscard, bios_table_addr), // addiu $t0, $0, 0xA0
|
||||
jump_link(rtmp_0, rret_addr), nop, // jalr $t0, $ra, BD slot
|
||||
load_word(rret_addr, rstack_ptr, S_(U4)), // lw $ra, 4($sp)
|
||||
jump_reg(rret_addr), // jr $ra
|
||||
add_ui(rstack_ptr, rstack_ptr, MipsStackAlignment), // sp += 8 (BD)
|
||||
mac_yield(),
|
||||
};
|
||||
|
||||
#pragma endregion Baked Atoms
|
||||
@@ -0,0 +1,8 @@
|
||||
#ifdef INTELLISSENSE_DIRECTIVES
|
||||
# include "gen/macs.h"
|
||||
# include "gen/offsets.h"
|
||||
#endif
|
||||
|
||||
ATOM_FILE_DEBUGGER_LINE_MARKER(pad_atom_c);
|
||||
|
||||
|
||||
@@ -0,0 +1,7 @@
|
||||
#ifdef INTELLISENSE_DIRECTIVES
|
||||
# include "gen/macs.h"
|
||||
# include "gen/offsets.h"
|
||||
# include "psyq.h"
|
||||
#endif
|
||||
|
||||
ATOM_FILE_DEBUGGER_LINE_MARKER(pysq_atom_c);
|
||||
@@ -0,0 +1,103 @@
|
||||
#ifdef INTELLISENSE_DIRECTIVES
|
||||
# pragma once
|
||||
# include "dsl.h"
|
||||
# include "math.h"
|
||||
# include "gp.h"
|
||||
#endif
|
||||
|
||||
typedef Struct_(DrawEnv_Packed) { U4 tag; U4 code[15]; };
|
||||
typedef Struct_(DrawEnv) {
|
||||
Rect_S2 clip_area;
|
||||
V2_S2 drawing_offset[2];
|
||||
Rect_S2 texture_window;
|
||||
S2 texture_page;
|
||||
B1 flag_dither;
|
||||
B1 flag_draw_on_display;
|
||||
B1 enable_auto_clear;
|
||||
RGB8 initial_bg_color;
|
||||
DrawEnv_Packed dr_env; // reserved
|
||||
};
|
||||
typedef Struct_(DisplayEnv) {
|
||||
Rect_S2 display_area;
|
||||
Rect_S2 screen;
|
||||
B1 vinterlace;
|
||||
B1 color24;
|
||||
B1 pad0;
|
||||
B1 pad1;
|
||||
};
|
||||
typedef Array_(DrawEnv, 2);
|
||||
typedef Array_(DisplayEnv, 2);
|
||||
|
||||
typedef Struct_(DoubleBuffer) {
|
||||
A2_DrawEnv draw;
|
||||
A2_DisplayEnv display;
|
||||
};
|
||||
|
||||
DisplayEnv* displayenv_init(DisplayEnv* env, S4 x, S4 y, S4 w, S4 h) asm("SetDefDispEnv");
|
||||
DrawEnv* drawenv_init (DrawEnv* env, S4 x, S4 y, S4 w, S4 h) asm("SetDefDrawEnv");
|
||||
|
||||
DisplayEnv* displayenv_put(DisplayEnv* env) asm("PutDispEnv");
|
||||
DrawEnv* drawenv_put (DrawEnv* env) asm("PutDrawEnv");
|
||||
|
||||
U4 geom_init(void) asm("InitGeom");
|
||||
void geom_set_offset(U4 x, U4 y) asm("SetGeomOffset");
|
||||
void geom_set_screen(U4 h) asm("SetGeomScreen");
|
||||
|
||||
U4* orderingtbl_clear_reverse(U4* ot, U4 len) asm("ClearOTagR");
|
||||
|
||||
U4 reset_graph(U4 mode) asm("ResetGraph");
|
||||
void set_display_enabled(U4 mask) asm("SetDispMask");
|
||||
|
||||
U4 draw_sync(U4 mode) asm("DrawSync");
|
||||
U4 vsync(U4 mode) asm("VSync");
|
||||
|
||||
void draw_orderingtbl(U4* buf) asm("DrawOTag");
|
||||
|
||||
typedef Struct_(Tile) {
|
||||
U4 tag;
|
||||
RGB8 color;
|
||||
B1 code;
|
||||
Rect_S2 rect;
|
||||
};
|
||||
|
||||
/*
|
||||
Linear Algebra
|
||||
*/
|
||||
|
||||
M3_S2* m3s2_rotation (V3_S2* vec, M3_S2* mat) asm("RotMatrix");
|
||||
M3_S2* m3s2_translation(M3_S2* mat, V3_S4* vec) asm("TransMatrix");
|
||||
M3_S2* m3s2_scale (M3_S2* mat, V3_S4* vec) asm("ScaleMatrix");
|
||||
|
||||
// Rotation, Translation, Perspective
|
||||
|
||||
S4 rtp_v3s2_raw(V3_S2* vec, S4* xy, S4* pp, S4* flag) asm("RotTransPers");
|
||||
FI_ S4 rtp_v3s2(V3_S2* vec, V2_S2* xy, A2_S2* pp, S4* flag) { return rtp_v3s2_raw(vec, C_(S4*R_, & xy->x), C_(S4*R_, pp), r_(flag)); }
|
||||
|
||||
S4 rtp_avg_nclip_a3_v3s2_raw(V3_S2* v0, V3_S2* v1, V3_S2* v2, S4* xy1, S4* xy2, S4* xy3, S4* pp, S4* otz, S4* flag) asm("RotAverageNclip3");
|
||||
FI_ S4 rtp_avg_nclip_a3_v3s2(
|
||||
V3_S2* v0, V3_S2* v1, V3_S2* v2,
|
||||
V2_S2* xy0, V2_S2* xy1, V2_S2* xy2,
|
||||
A2_S2* pp, S4* otz, S4* flag
|
||||
){
|
||||
return rtp_avg_nclip_a3_v3s2_raw(
|
||||
v0, v1, v2,
|
||||
C_(S4*R_, xy0), C_(S4*R_, xy1), C_(S4*R_, xy2),
|
||||
C_(S4*R_, pp), C_(S4*R_, otz), C_(S4*R_, flag)
|
||||
);
|
||||
}
|
||||
|
||||
S4 rtp_avg_nclip_a4_v3s2_raw(V3_S2* v0, V3_S2* v1, V3_S2* v2, V3_S2* v3, S4* xy1, S4* xy2, S4* xy3, S4* xy4, S4* pp, S4* otz, S4* flag) asm("RotAverageNclip4");
|
||||
FI_ S4 rtp_avg_nclip_a4_v3s2(
|
||||
V3_S2* v0, V3_S2* v1, V3_S2* v2, V3_S2* v3,
|
||||
V2_S2* xy0, V2_S2* xy1, V2_S2* xy2, V2_S2* xy3,
|
||||
A2_S2* pp, S4* otz, S4* flag
|
||||
){
|
||||
return rtp_avg_nclip_a4_v3s2_raw(
|
||||
v0, v1, v2, v3,
|
||||
C_(S4*R_, xy0), C_(S4*R_, xy1), C_(S4*R_, xy2), C_(S4*R_, xy3),
|
||||
C_(S4*R_, pp), C_(S4*R_, otz), C_(S4*R_, flag)
|
||||
);
|
||||
}
|
||||
|
||||
void gte_matrix_set_rotation (M3_S2* mat) asm("SetRotMatrix");
|
||||
void gte_matrix_set_translation(M3_S2* mat) asm("SetTransMatrix");
|
||||
@@ -6,7 +6,7 @@
|
||||
// One line per macro that appears in your atom sources.
|
||||
//
|
||||
// This file is encoding-macros-only.
|
||||
// The auto-generated component macros (mac_X) live in duffle/gen/<dir>.macs.h (included separately by the unity build).
|
||||
// The auto-generated component macros (mac_X) live in the source directory's own gen/macs.h (per-directory aggregation; included separately by the unity build).
|
||||
// The unity build should include THIS file and the .macs.h file in the same TU, with both wrapped
|
||||
// (or the include guard order handled) to avoid WORD_COUNT redeclaration.
|
||||
//
|
||||
|
||||
Reference in New Issue
Block a user