mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-08-06 07:38:47 +00:00
now we're cookin
This commit is contained in:
+209
-176
@@ -7,215 +7,248 @@
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# include "memory.h"
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#endif
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/* R_T8 is our dedicated Tape Pointer (TP) */
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#define R_TP R_T8
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#define R_TP_Code R_T8_Code
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/* ---------------------------------------------------------------------------
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* TAPE DRIVE ABI & REGISTER ALIASES
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* ---------------------------------------------------------------------------
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* We map the MIPS temporary registers to a persistent global workspace.
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* The C compiler is completely unaware of these bindings.
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* ---------------------------------------------------------------------------*/
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enum {
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R_TapePtr = R_T8, /* The Instruction Stream Pointer */
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R_PrimCur = R_T7, /* VRAM output cursor (primitive buffer) */
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R_FaceCur = R_T4, /* Input data cursor (indices/faces) */
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R_VertBase = R_T5, /* Base address of the vertex array */
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R_OtBase = R_T6, /* Base address of the Ordering Table */
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/* Stringification codes for the GCC inline assembler clobber lists */
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#define R_TapePtr_Code R_T8_Code
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#define R_PrimCur_Code R_T7_Code
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#define R_FaceCur_Code R_T4_Code
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#define R_VertBase_Code R_T5_Code
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#define R_OtBase_Code R_T6_Code
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};
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/* The 'Yield' sequence for CodeBlobs */
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#define mips_yield \
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load_word(R_T9, R_TP, 0) \
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, add_ui(R_TP, R_TP, 4) \
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, jump_reg(R_T9) \
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, nop
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/* The 'Yield' sequence for Tape Atoms.
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* Loads the next pointer from the tape, advances the tape, and jumps.
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* Cost: ~ 4 cycles */
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#define mips_yield() \
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load_word(R_T9, R_TapePtr, 0) \
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, add_ui_1( R_TapePtr, 4) \
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, jump_reg( R_T9) \
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, nop
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/* The 'Exit' Atom */
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internal Code CodeBlob_(tape_exit) { jump_reg(rret_addr), nop };
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MipsAtom_(tape_exit) { jump_reg(rret_addr), nop };
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typedef Slice_(U4);
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FI_ void tape_run(Slice_U4 tape, B1** r_prim_cursor, void* face_cursor, void* vert_base, void* ot_base) {
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register U4* tp rgcc(R_TP) = tape.ptr;
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register B1* pcur rgcc(R_T7) = r_prim_cursor[0];
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register void* r_t4 rgcc(R_T4) = face_cursor;
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register void* r_t5 rgcc(R_T5) = vert_base;
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register void* r_t6 rgcc(R_T6) = ot_base;
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/* Generalized Tape Engine Runner */
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FI_ void tape_run(Slice_U4 tape) { register U4* tp rgcc(R_TapePtr) = tape.ptr; asm volatile(
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asm_words(
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add_ui( R_SP, R_SP, -8) /* Allocate stack space */
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, store_word(R_RA, R_SP, 0) /* Safely backup $ra to the stack */
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, load_word( R_T9, R_TapePtr, 0) /* Bootstrap the first jump */
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, add_ui_1( R_TapePtr, 4) /* Advance tape */
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, jump_nreg(R_T9) /* jalr $t9 */
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, nop /* Branch delay slot */
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, load_word(R_RA, R_SP, 0) /* Restore $ra from stack */
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, add_ui_1( R_SP, 8) /* Deallocate stack space */
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)
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asm_rpins, r_use(tp)
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asm_clobber:
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rlit(R_AT_Code)
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, rlit(R_V0_Code), rlit(R_V1_Code)
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, rlit(R_T0_Code), rlit(R_T1_Code), rlit(R_T2_Code), rlit(R_T3_Code)
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/* Tell GCC the tape engine owns and destroys the workspace registers */
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, rlit(R_PrimCur_Code), rlit(R_FaceCur_Code), rlit(R_VertBase_Code), rlit(R_OtBase_Code)
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, rlit(R_T9_Code)
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, clb_mem_drain
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); }
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asm volatile(
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"addiu $sp, $sp, -8;" /* Allocate stack space */
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"sw $31, 0($sp);" /* Safely backup $ra to the stack */
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"lw $25, 0(%0);"
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"addiu %0, %0, 4;"
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"jalr $25;"
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"nop;"
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"lw $31, 0($sp);" /* Restore $ra from stack */
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"addiu $sp, $sp, 8;" /* Deallocate stack space */
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: "+r"(tp), "+r"(pcur), "+r"(r_t4), "+r"(r_t5), "+r"(r_t6)
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:
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: "at", "v0", "v1", "t0", "t1", "t2", "t3", "t9", "memory"
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);
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r_prim_cursor[0] = pcur;
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}
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typedef Struct_(TapeBuilder) { U4 ptr; U4 count; };
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FI_ void tb_init(TapeBuilder* tb, FArena* arena) { tb->ptr = arena->start; tb->count = 0; }
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FI_ TapeBuilder tb_make( FArena* arena) { return (TapeBuilder){ arena->start, 0 }; }
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typedef Struct_(TapeBuilder) { U4* ptr; U4 count; };
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FI_ TapeBuilder tb_begin(FArena* arena) { return (TapeBuilder){ (U4*)arena->start, 0 }; }
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FI_ void tb_emit(TapeBuilder* tb, MipsAtom* atom) { u4_r(tb->ptr)[tb->count] = u4_(atom); ++ tb->count; }
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FI_ void tb_data(TapeBuilder* tb, U4 data) { u4_r(tb->ptr)[tb->count] = u4_(data); ++ tb->count; }
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I_ void tb_emit(TapeBuilder* tb, Code* atom) { r_(tb->ptr)[tb->count] = u4_(atom); ++ tb->count; }
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I_ Slice_U4 tb_end(TapeBuilder* tb) {
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tb_emit(tb, code_tape_exit);
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return (Slice_U4){ tb->ptr, tb->count };
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}
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FI_ Slice_U4 tb_end (TapeBuilder* tb) { tb_emit(tb,code_tape_exit); return (Slice_U4){ C_(U4*,tb->ptr), tb->count }; }
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FI_ Slice_U4 tb_slice(TapeBuilder tb) { return (Slice_U4){ C_(U4*,tb.ptr), tb.count }; }
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#define tb_scope(tb) for(U4 tbs_once=0;tbs_once==0;++tbs_once,tb_emit(tb,code_tape_exit))
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internal Code CodeBlob_(atom_set_gte_world) {
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/* Pop matrix address from tape into R_T3 ($11) */
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load_word(R_T3, R_TP, 0),
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add_ui(R_TP, R_TP, 4),
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/* ---------------------------------------------------------------------------
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* MACRO ATOMS (Reusable Assembly Components)
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* These do NOT yield. They are expanded inline inside Tape Atoms.
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* ---------------------------------------------------------------------------*/
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/* Load 3x3 Rotation + 3x1 Translation from R_T3 into GTE CONTROL Regs (ctc2) */
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load_word(R_T0, R_T3, 0), load_word(R_T1, R_T3, 4),
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gte_ct(R_T0, gte_cr_RT11), gte_ct(R_T1, gte_cr_RT12),
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load_word(R_T0, R_T3, 8), load_word(R_T1, R_T3, 12), load_word(R_T2, R_T3, 16),
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gte_ct(R_T0, gte_cr_RT13), gte_ct(R_T1, gte_cr_RT21), gte_ct(R_T2, gte_cr_RT22),
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load_word(R_T0, R_T3, 20), load_word(R_T1, R_T3, 24), load_word(R_T2, R_T3, 28),
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gte_ct(R_T0, gte_cr_TRX), gte_ct(R_T1, gte_cr_TRY), gte_ct(R_T2, gte_cr_TRZ),
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mips_yield
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/* Loads 3 16-bit indices from the face array */
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#define mac_load_tri_indices(r_idx0, r_idx1, r_idx2) \
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load_half_u(r_idx0, R_FaceCur, 0) \
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, load_half_u(r_idx1, R_FaceCur, 2) \
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, load_half_u(r_idx2, R_FaceCur, 4)
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/* Translates indices to vertex addresses and pushes them to GTE */
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#define mac_load_tri_verts(r_idx0, r_idx1, r_idx2) \
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shift_ll(R_AT, r_idx0, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0) \
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, shift_ll(R_AT, r_idx1, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY1), gte_mt(R_V1, C2_VZ1) \
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, shift_ll(R_AT, r_idx2, 3), add_u(R_AT, R_AT, R_VertBase), load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4), gte_mt(R_V0, C2_VXY2), gte_mt(R_V1, C2_VZ2)
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/* Formats the primitive memory layout (Tag + Color + Coordinates) */
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#define mac_format_prim_f3(color_hi, color_lo) \
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store_word(R_0, R_PrimCur, 0) \
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, load_ui(R_AT, color_hi), or_i(R_AT, R_AT, color_lo) \
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, store_word(R_AT, R_PrimCur, 4) \
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, gte_sw(C2_SXY0, R_PrimCur, 8) \
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, gte_sw(C2_SXY1, R_PrimCur, 12) \
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, gte_sw(C2_SXY2, R_PrimCur, 16)
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/* Correctly inserts a primitive into the Ordering Table linked list */
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#define mac_insert_ot_tag(r_otz, prim_length) \
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shift_ll( R_T1, r_otz, 2) \
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, add_u( R_T1, R_T1, R_OtBase) /* T1 = &OrderingTable[OTZ] */ \
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, load_word( R_AT, R_T1, 0) /* AT = old_ot_head */ \
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, load_ui( R_V0, prim_length) /* V0 = Length << 24 */ \
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, shift_ll( R_AT, R_AT, 8) /* Strip upper 8 bits from old_ot */ \
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, shift_lr( R_AT, R_AT, 8) \
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, or_u( R_AT, R_AT, R_V0) /* Merge length */ \
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, store_word(R_AT, R_PrimCur, 0) /* prim->tag = old_ot_head */ \
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, shift_ll( R_AT, R_PrimCur, 8) /* AT = PrimCur & 0x00FFFFFF */ \
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, shift_lr( R_AT, R_AT, 8) \
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, store_word(R_AT, R_T1, 0) /* OrderingTable[OTZ] = PrimCur */
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internal MipsAtom_(bind_workspace) {
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/* Pop 4 arguments from the tape directly into the workspace registers */
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load_word(R_PrimCur, R_TapePtr, 0),
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load_word(R_FaceCur, R_TapePtr, 4),
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load_word(R_VertBase, R_TapePtr, 8),
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load_word(R_OtBase, R_TapePtr, 12),
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add_ui_1( R_TapePtr, 16),
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mips_yield()
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};
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internal Code CodeBlob_(atom_floor_tri) {
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/* 1. Load 3 indices from $t4 */
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load_half_u(R_T0, R_T4, 0),
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load_half_u(R_T1, R_T4, 2),
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load_half_u(R_T2, R_T4, 4),
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internal MipsAtom_(sync_prim_cursor) {
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/* Pop the C-struct address and base address from the tape */
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load_word(R_AT, R_TapePtr, 0), /* AT = &pa->used */
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load_word(R_T0, R_TapePtr, 4), /* T0 = prim_base */
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add_ui_1( R_TapePtr, 8),
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/* Calculate byte offset and store directly back to RAM */
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sub_u(R_T0, R_PrimCur, R_T0),
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store_word(R_T0, R_AT, 0),
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mips_yield()
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};
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/* 2. Load Vertices: Addr = Base + (idx * 8). Write to GTE DATA Regs (mtc2) */
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shift_ll( R_AT, R_T0, 3), add_u( R_AT, R_AT, R_T5),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt( R_V0, C2_VXY0), gte_mt( R_V1, C2_VZ0),
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internal MipsAtom_(set_gte_world) {
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/* Pop matrix address from tape into R_T3 ($11) */
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load_word(R_T3, R_TapePtr, 0),
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add_ui_1( R_TapePtr, 4),
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shift_ll( R_AT, R_T1, 3), add_u( R_AT, R_AT, R_T5),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt( R_V0, C2_VXY1), gte_mt( R_V1, C2_VZ1),
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/* Load 3x3 Rotation + 3x1 Translation from R_T3 into GTE CONTROL Regs (ctc2) */
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load_word(R_T0, R_T3, 0), load_word(R_T1, R_T3, 4),
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gte_ct( R_T0, gte_cr_RT11), gte_ct( R_T1, gte_cr_RT12),
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load_word(R_T0, R_T3, 8), load_word(R_T1, R_T3, 12), load_word(R_T2, R_T3, 16),
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gte_ct( R_T0, gte_cr_RT13), gte_ct( R_T1, gte_cr_RT21), gte_ct( R_T2, gte_cr_RT22),
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load_word(R_T0, R_T3, 20), load_word(R_T1, R_T3, 24), load_word(R_T2, R_T3, 28),
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gte_ct( R_T0, gte_cr_TRX), gte_ct( R_T1, gte_cr_TRY), gte_ct( R_T2, gte_cr_TRZ),
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shift_ll( R_AT, R_T2, 3), add_u( R_AT, R_AT, R_T5),
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load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
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gte_mt( R_V0, C2_VXY2), gte_mt( R_V1, C2_VZ2),
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mips_yield()
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};
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/* 3. RTPT + NCLIP */
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nop, nop, gte_cmdw_rtpt,
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nop, nop, gte_cmdw_nclip,
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nop, nop, /* Wait for NCLIP to finish */
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internal MipsAtom_(floor_tri) {
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mac_load_tri_indices(R_T0, R_T1, R_T2),
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mac_load_tri_verts( R_T0, R_T1, R_T2),
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/* 4. Check NCLIP.
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If MAC0 <= 0 (Backface), branch to end.
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Target is 29 instructions past the delay slot. */
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gte_mf(R_T0, C2_MAC0),
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nop, /* <--- FILL LOAD DELAY SLOT */
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branch_le_zero(R_T0, 29), /* <--- CULLING RE-ENABLED */
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nop, /* <--- DELAY SLOT (Index 0) */
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/* 3. Execute Math */
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nop, nop, gte_cmdw_rtpt,
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nop, nop, gte_cmdw_nclip,
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nop, nop,
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/* 5. Store Primitive Data */
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/* 1 */ store_word(R_0, R_T7, 0),
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/* 2 */ load_ui( R_AT, 0x20FF), /* High: Code 0x20 + Color B:FF */
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/* 3 */ or_i( R_AT, R_AT, 0xFFFF), /* Low: Color G:FF, R:FF (White) */
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/* 4 */ store_word(R_AT, R_T7, 4),
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/* 5 */ enc_gte_sw(C2_SXY0, R_T7, 8),
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/* 6 */ enc_gte_sw(C2_SXY1, R_T7, 12),
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/* 7 */ enc_gte_sw(C2_SXY2, R_T7, 16),
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/* 4. Culling (Branch forward 29 instructions if Backface) */
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gte_mf(R_T0, C2_MAC0),
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nop,
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branch_le_zero(R_T0, 29),
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nop,
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/* 5. Format Primitive */
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mac_format_prim_f3(0x20FF, 0xFFFF), /* High: 0x20/B, Low: G/R */
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/* 6. Calculate Depth */
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nop, nop, gte_cmdw_avsz3,
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nop, nop,
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gte_mf(R_T1, C2_OTZ),
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/* 7. Bounds Check OTZ < 2048 (Branch forward 13 instructions to skip insertion) */
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add_ui( R_AT, R_0, 2048),
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slt_u( R_AT, R_T1, R_AT),
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branch_equal(R_AT, R_0, 13),
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nop,
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/* 8. Insert into Ordering Table Linked List */
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mac_insert_ot_tag(R_T1, 0x0400), /* Length = 4 words */
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/* 6. OT Insertion with Bounds Checking */
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/* 8 */ nop,
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/* 9 */ nop,
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/* 10 */ gte_cmdw_avsz3,
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/* 11 */ nop, /* Wait for AVSZ3 */
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/* 12 */ nop, /* Wait for AVSZ3 */
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/* 13 */ gte_mf(R_T1, C2_OTZ), /* T1 = Depth index */
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/* Bounds Check: OTZ < 2048 */
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/* 14 */ add_ui( R_AT, R_0, 2048),
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/* 15 */ slt_u( R_AT, R_T1, R_AT), /* AT = (OTZ < 2048) ? 1 : 0 */
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/* 16 */ branch_equal(R_AT, R_0, 13), /* If AT == 0, skip to end (13 instrs past delay) */
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/* 17 */ nop, /* <--- DELAY SLOT (Index 0 for Bounds branch) */
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/* CORRECTED DMA TAG LOGIC */
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/* 18 (1) */ shift_ll( R_T1, R_T1, 2),
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/* 19 (2) */ add_u( R_T1, R_T1, R_T6), /* T1 = & OrderingTable[OTZ] */
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/* 20 (3) */ load_word( R_AT, R_T1, 0), /* AT = current head (old_ot) */
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/* 21 (4) */ load_ui( R_V0, 0x0400), /* V0 = 0x04000000 (Length = 4) */
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/* Strip upper 8 bits from old_ot */
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/* 22 (5) */ shift_ll(R_AT, R_AT, 8),
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/* 23 (6) */ shift_lr(R_AT, R_AT, 8), /* AT &= 0x00FFFFFF */
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/* Merge length into prim->tag */
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/* 24 (7) */ or_u(R_AT, R_AT, R_V0), /* AT |= 0x04000000 */
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/* 25 (8) */ store_word(R_AT, R_T7, 0), /* prim->tag = AT */
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/* Create OT Tag: Len 0 (0x00) in top 8 bits, T7 in bottom 24 */
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/* 26 (9) */ shift_ll(R_AT, R_T7, 8),
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/* 27 (10) */ shift_lr(R_AT, R_AT, 8), /* AT = T7 & 0x00FFFFFF */
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/* 28 (11) */ store_word(R_AT, R_T1, 0), /* OrderingTable[OTZ] = AT */
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/* 29 (12) */ add_ui( R_T7, R_T7, 20), /* Advance Prim Cursor (5 words) */
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/* 7. Yield */
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/* 30 (13) */ add_ui(R_T4, R_T4, 8), /* Advance Face Cursor (4 * S2 = 8 bytes) */
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mips_yield
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add_ui(R_PrimCur, R_PrimCur, 20), /* Advance Prim Cursor (5 words) */
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/* 9. Advance Input Cursor & Yield (Both branch targets land here) */
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add_ui(R_FaceCur, R_FaceCur, 8), /* Advance Face Cursor (4 * S2 = 8 bytes) */
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mips_yield()
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};
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|
||||
/* DIAGNOSTIC 1: Pure tape loop test */
|
||||
internal Code CodeBlob_(atom_diag_yield) {
|
||||
mips_yield
|
||||
};
|
||||
internal MipsAtom_(diag_yield) { mips_yield() };
|
||||
|
||||
/* DIAGNOSTIC 2: Pure memory test (No GTE). Draws a fixed cyan triangle. */
|
||||
internal Code CodeBlob_(atom_diag_color) {
|
||||
store_word(R_0, R_T7, 0),
|
||||
load_ui(R_AT, 0x20FF), /* High: Code 0x20 + Color B:FF */
|
||||
or_i(R_AT, R_AT, 0xFF00), /* Low: Color G:FF, R:00 (Cyan) */
|
||||
store_word(R_AT, R_T7, 4),
|
||||
|
||||
/* Fake coordinates - Swapped winding order to prevent GPU culling! */
|
||||
load_ui(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 8), /* (16, 16) */
|
||||
load_ui(R_AT, 0x0050), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 12), /* (80, 16) */
|
||||
load_ui(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0050), store_word(R_AT, R_T7, 16), /* (16, 80) */
|
||||
internal MipsAtom_(diag_color) {
|
||||
store_word(R_0, R_T7, 0),
|
||||
load_ui( R_AT, 0x20FF), /* High: MipsAtom 0x20 + Color B:FF */
|
||||
or_i( R_AT, R_AT, 0xFF00), /* Low: Color G:FF, R:00 (Cyan) */
|
||||
store_word(R_AT, R_T7, 4),
|
||||
|
||||
/* Fake coordinates - Swapped winding order to prevent GPU culling! */
|
||||
load_ui(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 8), /* (16, 16) */
|
||||
load_ui(R_AT, 0x0050), or_i(R_AT, R_AT, 0x0010), store_word(R_AT, R_T7, 12), /* (80, 16) */
|
||||
load_ui(R_AT, 0x0010), or_i(R_AT, R_AT, 0x0050), store_word(R_AT, R_T7, 16), /* (16, 80) */
|
||||
|
||||
add_ui(R_T1, R_0, 10),
|
||||
shift_ll(R_T1, R_T1, 2),
|
||||
add_u(R_T1, R_T1, R_T6),
|
||||
|
||||
load_word(R_AT, R_T1, 0),
|
||||
load_ui(R_V0, 0x0400), /* <--- Fills load delay slot! */
|
||||
store_word(R_AT, R_T7, 0),
|
||||
|
||||
shift_ll(R_AT, R_T7, 8), shift_lr(R_AT, R_AT, 8),
|
||||
or_u(R_AT, R_AT, R_V0),
|
||||
store_word(R_AT, R_T1, 0),
|
||||
add_ui( R_T1, R_0, 10),
|
||||
shift_ll(R_T1, R_T1, 2),
|
||||
add_u( R_T1, R_T1, R_T6),
|
||||
|
||||
load_word( R_AT, R_T1, 0),
|
||||
load_ui( R_V0, 0x0400), // <--- Fills load delay slot!
|
||||
store_word(R_AT, R_T7, 0),
|
||||
|
||||
shift_ll( R_AT, R_T7, 8), shift_lr(R_AT, R_AT, 8),
|
||||
or_u( R_AT, R_AT, R_V0),
|
||||
store_word(R_AT, R_T1, 0),
|
||||
|
||||
add_ui(R_T7, R_T7, 20),
|
||||
mips_yield
|
||||
add_ui(R_T7, R_T7, 20),
|
||||
|
||||
mips_yield()
|
||||
};
|
||||
|
||||
/* DIAGNOSTIC 3: Pure GTE test (No Memory Writes) */
|
||||
internal Code CodeBlob_(atom_diag_gte) {
|
||||
/* Load 3 indices */
|
||||
load_half_u(R_T0, R_T4, 0),
|
||||
load_half_u(R_T1, R_T4, 2),
|
||||
load_half_u(R_T2, R_T4, 4),
|
||||
internal MipsAtom_(diag_gte) {
|
||||
/* Load 3 indices */
|
||||
load_half_u(R_T0, R_T4, 0),
|
||||
load_half_u(R_T1, R_T4, 2),
|
||||
load_half_u(R_T2, R_T4, 4),
|
||||
|
||||
/* Load Vertices into GTE */
|
||||
shift_ll(R_AT, R_T0, 3), add_u(R_AT, R_AT, R_T5),
|
||||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||||
gte_mt(R_V0, C2_VXY0), gte_mt(R_V1, C2_VZ0),
|
||||
/* Load Vertices into GTE */
|
||||
shift_ll( R_AT, R_T0, 3), add_u( R_AT, R_AT, R_T5),
|
||||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||||
gte_mt( R_V0, C2_VXY0), gte_mt( R_V1, C2_VZ0),
|
||||
|
||||
shift_ll(R_AT, R_T1, 3), add_u(R_AT, R_AT, R_T5),
|
||||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||||
gte_mt(R_V0, C2_VXY1), gte_mt(R_V1, C2_VZ1),
|
||||
shift_ll( R_AT, R_T1, 3), add_u( R_AT, R_AT, R_T5),
|
||||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||||
gte_mt( R_V0, C2_VXY1), gte_mt( R_V1, C2_VZ1),
|
||||
|
||||
shift_ll(R_AT, R_T2, 3), add_u(R_AT, R_AT, R_T5),
|
||||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||||
gte_mt(R_V0, C2_VXY2), gte_mt(R_V1, C2_VZ2),
|
||||
shift_ll( R_AT, R_T2, 3), add_u( R_AT, R_AT, R_T5),
|
||||
load_word(R_V0, R_AT, 0), load_word(R_V1, R_AT, 4),
|
||||
gte_mt( R_V0, C2_VXY2), gte_mt( R_V1, C2_VZ2),
|
||||
|
||||
/* Run Math */
|
||||
nop, nop, gte_cmdw_rtpt,
|
||||
nop, nop, gte_cmdw_nclip,
|
||||
nop, nop,
|
||||
/* Run Math */
|
||||
nop, nop, gte_cmdw_rtpt,
|
||||
nop, nop, gte_cmdw_nclip,
|
||||
nop, nop,
|
||||
|
||||
/* Advance Face Cursor and Yield */
|
||||
add_ui(R_T4, R_T4, 8),
|
||||
mips_yield
|
||||
/* Advance Face Cursor and Yield */
|
||||
add_ui(R_T4, R_T4, 8),
|
||||
|
||||
mips_yield()
|
||||
};
|
||||
|
||||
|
||||
Reference in New Issue
Block a user