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posts-article minor changes
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@@ -31,7 +31,6 @@
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#define A_(data) (& (data))
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#define align_(value) __attribute__((aligned (value))) // for easy alignment
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#define align_(value) __attribute__((aligned (value))) // for easy alignment
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#define C_(type,data) ((type)(data)) // for enforced precedence
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#define expect_(x, y) __builtin_expect(x, y) // so compiler knows the common path
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#define cexpr_ __builtin_constant_p
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@@ -5,7 +5,7 @@
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#define MEM_ALIGNMENT_DEFAULT 4
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#define assert_bounds(point, start, end) for(;0;){ \
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#define assert_bounds(point, start, end) do{ \
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assert((start) <= (point)); \
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assert((point) <= (end)); \
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} while(0)
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@@ -39,38 +39,6 @@
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* There is no implicit call-stack, return stack, or per-atom stack-frame.
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* The user must also explictly handle register allocation per atom (by default).
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* However they could procedurally automate it using metaprogramming functionality.
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*
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* One of the remarkable things about utilizing this ABI's composition model is that its essentially interopable
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* with all modern general purpose machines, or, basically anything from the 5th generation consoles and onward.
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* This model does not try resolve some optimal runtime for one particular modern machine,
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* but adheres the the most bare constraints shared our most common kinds of hardware may all execute.
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* On the PS1 we don't have access to a few features like multi-threading, speculative execution, or L3 cache;
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* but, we can set the foundation for legoing whats required for eventually expanding this ABI's paradigm
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* and core atoms to take those newer hardware features into account. For example, you can easily expand
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* this to support multi-threaded execution model on a PS2 or PS3 (or modern machines).
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* Not having an implicit-call-frame boundary means register lifetime and data movement remain visible.
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* Any poor composition becomes obvious and will convey to the initiated user register shuffling,
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* spills, reloads, or any unnecessary traffic they may not have intended (no need to dig through disassembly).
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*
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* Learning data-oriented code becomes a natural progression. Your not fighting a stack-based procedural
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* paradigm that wants to argument shuffle. There is no ambiguity due to the lack of constraints, for example,
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* on how the user may "call" a procedure in traditional random dispatch runtimes. The user does have to
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* hammer down "rules" or Ifpatterns for massaging the compiler to dissolve those call frames; just to get
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* the asesmbly into its desired form. The form is obvious, and once the user gets to author these compoonents
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* it becomes a game of tetris.
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*
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* Another feature is this ABI is very compatible with bootstrapping and developing simple toolchains built off
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* of bit-packed annotated command streams the user can directly author, maintatain, and immediately execute.
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* That being like a color forth, or maybe something more familar like an immediate mode library
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* (for various systems such as GUIs). This can make the tetris less of a chore with some helpful policy
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* generation for allocation of registers, helping to choose resuable components, designing DSL on the fly, etc.
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* -----------------------------------------------------------------------------------------------------------
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* For now this ideation has just started functioning. I'm abusing C11 & a lua metaprogram to help establish
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* a hybrid toolchain to ideate on a traditional text-based authoring UX for this paradigm.
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* If pcsx-redux provides viable hot-reload and persistent data storage beyond save-states
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* (just copying ram to filesystem), I can author a color forth to mess around with.
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* With either an editor in-emulator or on the actual machine itself. Assembly is tedius,
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* but I think this codebase most likely has a pretty ergonomic flavor worst case...
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* */
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/* Register Allocation Info */
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enum {
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@@ -247,13 +215,9 @@ typedef void Proc_(TapeEntryFn)(MipsAtom* tape_ptr);
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FI_ void tape_run(Tape tape) { C_(TapeEntryFn*, tape_enter)(tape.ptr); }
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// Procedural authoring of tapes:
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typedef Relative_(FArena) Struct_(TapeBuilder) { U4 ptr; U4 capacity; U4 used; };
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FI_ void tb_init(TapeBuilder* tb, FArena* arena) { tb->ptr = arena->start; tb->used = 0; }
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FI_ TapeBuilder tb_make_old( FArena* arena) { return (TapeBuilder){ arena->start, 0 }; }
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FI_ TapeBuilder tb_make(Slice mem) { return (TapeBuilder){ u4_(mem.ptr), mem.len, 0 }; } /* capacity in elements (matches used units) */
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FI_ void tb_emit(TapeBuilder* tb, MipsAtom* atom) { u4_r(tb->ptr)[tb->used] = u4_(atom); ++ tb->used; }
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@@ -371,7 +335,6 @@ internal Reg const regfile_alloc_order[] = {
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typedef Struct_(RegFile) { A2_U2 GPR; };
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#define regfile(pin_mask) {.GPR={u4_lo(pin_mask), u4_hi(pin_mask)} }
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FI_ void regfile_init(RegFile_R rf) {
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/* pack the 32-bit ABI mask into the two U2s */
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rf->GPR[0] = u4_lo(regfile_abi_mask); rf->GPR[1] = u4_hi(regfile_abi_mask);
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}
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FI_ RegFile regfile_make(void) { RegFile rf; regfile_init(& rf); return rf; }
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