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https://github.com/Ed94/pikuma_ps1.git
synced 2026-08-14 11:38:14 +00:00
gutting nosiy comments. Looking into some atom components..
This commit is contained in:
@@ -178,19 +178,19 @@ WORD_COUNT(mac_gte_gpf_scale, 13)
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#define mac_apply_matrix_lv(r_mtx, r_vec, r_out, r_t0, r_t1, r_t2) \
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#define mac_apply_matrix_lv(r_mtx, r_vec, r_out, r_t0, r_t1, r_t2) \
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load_word( r_t0, r_mtx, 0) \
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load_word( r_t0, r_mtx, 0) \
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, nop \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT11_Code) \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT11) \
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, load_word( r_t0, r_mtx, 4) \
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, load_word( r_t0, r_mtx, 4) \
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, nop \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT12_Code) \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT12) \
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, load_word( r_t0, r_mtx, 8) \
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, load_word( r_t0, r_mtx, 8) \
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, nop \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT13_Code) \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT13) \
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, load_word( r_t0, r_mtx, 12) \
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, load_word( r_t0, r_mtx, 12) \
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, nop \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT21_Code) \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT21) \
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, load_half_u(r_t0, r_mtx, 16) \
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, load_half_u(r_t0, r_mtx, 16) \
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, nop \
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, nop \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT22_Code) \
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, gte_mv_to_ctrl_r(r_t0, gte_cr_RT22) \
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, nop2 /* Load PACKED pos into V0 (libgte SVECTOR layout).
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, nop2 /* Load PACKED pos into V0 (libgte SVECTOR layout).
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* r_vec points to atom-0-staged packed data ((pos.y << 16) | pos.x at +0, pos.z at +4).
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* r_vec points to atom-0-staged packed data ((pos.y << 16) | pos.x at +0, pos.z at +4).
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* LWC2 base register MUST be the pointer r_vec, NOT the loaded value r_t0. */ \
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* LWC2 base register MUST be the pointer r_vec, NOT the loaded value r_t0. */ \
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+5
-10
@@ -106,16 +106,11 @@ FI_ Slice_MipsCode ac_apply_matrix_lv(AtomBuilder_R ab
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) MipsAtomComp_Proc_(ac_apply_matrix_lv, ab, {
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) MipsAtomComp_Proc_(ac_apply_matrix_lv, ab, {
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/* Load MATRIX rows into GTE RT11..RT33 (libgte convention: ctc2 to C2 $0..$4 in order).
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/* Load MATRIX rows into GTE RT11..RT33 (libgte convention: ctc2 to C2 $0..$4 in order).
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* load_half_u zero-extends the last word so RT33 = m[2][2] and TRX = 0. */
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* load_half_u zero-extends the last word so RT33 = m[2][2] and TRX = 0. */
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load_word(r_t0, r_mtx, 0), nop,
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load_word( r_t0, r_mtx, 0), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT11),
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gte_mv_to_ctrl_r(r_t0, gte_cr_RT11_Code),
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load_word( r_t0, r_mtx, 4), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT12),
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load_word(r_t0, r_mtx, 4), nop,
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load_word( r_t0, r_mtx, 8), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT13),
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gte_mv_to_ctrl_r(r_t0, gte_cr_RT12_Code),
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load_word( r_t0, r_mtx, 12), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT21),
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load_word(r_t0, r_mtx, 8), nop,
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load_half_u(r_t0, r_mtx, 16), nop, gte_mv_to_ctrl_r(r_t0, gte_cr_RT22),
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gte_mv_to_ctrl_r(r_t0, gte_cr_RT13_Code),
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load_word(r_t0, r_mtx, 12), nop,
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gte_mv_to_ctrl_r(r_t0, gte_cr_RT21_Code),
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load_half_u(r_t0, r_mtx, 16), nop,
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gte_mv_to_ctrl_r(r_t0, gte_cr_RT22_Code),
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nop2,
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nop2,
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/* Load PACKED pos into V0 (libgte SVECTOR layout).
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/* Load PACKED pos into V0 (libgte SVECTOR layout).
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@@ -9,6 +9,8 @@ ATOM_FILE_DEBUGGER_LINE_MARKER(math_atom_c);
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#pragma region MACs (Mips Atom Component)
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#pragma region MACs (Mips Atom Component)
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// FI_ Slice_MipsCode ac_load_imm
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FI_ Slice_MipsCode ac_load_v2s2(AtomBuilder_R ab, U4 rs_x, U4 rs_y, U4 r_base, U4 offset) atom_dbg_skip MipsAtomComp_Proc_(ac_load_v2s2, ab, {
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FI_ Slice_MipsCode ac_load_v2s2(AtomBuilder_R ab, U4 rs_x, U4 rs_y, U4 r_base, U4 offset) atom_dbg_skip MipsAtomComp_Proc_(ac_load_v2s2, ab, {
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load_half( rs_x, r_base, offset + O_(V3_S2,x)),
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load_half( rs_x, r_base, offset + O_(V3_S2,x)),
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load_half( rs_y, r_base, offset + O_(V3_S2,y)),
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load_half( rs_y, r_base, offset + O_(V3_S2,y)),
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@@ -94,34 +94,8 @@ MipsAtomComp_Proc_(ac_put_draw_env, ab, {
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#pragma region Atom Procs
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#pragma region Atom Procs
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// Modular Atoms
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// Modular Atoms
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/* Scratchpad layout for the resolve_look_at bundle.
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* The chain atoms communicate entirely via the wave-context GPR carrier R_ResolveScratch (R_T4) + hardcoded offsets into smem.scratchpad
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* (PS1 hardware scratchpad at 0x1F800000).
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*
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* Atom 0 (input_and_sub) STAGES the C-side inputs (eye, up_in) into the scratchpad;
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* AT THE SAME TIME it computes fwd = target - eye and stores it at scratch+0.
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* Atoms 1-6 then read/write specific scratchpad offsets internally using
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* `r_scratch + hardcoded_offset` — no tape-data pointers are passed between atoms.
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* +0 fwd (atom 0 writes; atom 1 reads)
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* +16 uz (atom 1 writes; atoms 2 + 4 read)
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* +32 right (atom 2 writes; atom 3 reads)
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* +48 ux (atom 3 writes; atoms 4 + 6 read)
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* +64 up (atom 4 writes; atom 5 reads)
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* +80 uy (atom 5 writes; atom 6 reads)
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* +96 eye (atom 0 stages from C-side pointer; atom 6 reads)
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* +128 up_in (atom 0 stages from C-side pointer; atom 2 reads)
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*/
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// enum {
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// R_LookAt = R_T0 atom_reg atom_type(MT3_S2S4*),
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// R_CamEye = R_T1 atom_reg atom_type(P3_S4*),
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// R_CamTarget = R_T2 atom_reg atom_type(P3_S4*),
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// R_WorldUp = R_T3 atom_reg atom_type(V3_S4*),
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// };
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enum {
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enum {
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/* Wave-context GPR carrier for the resolve_look_at bundle: the scratch base.
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// TODO(Ed): We can resolve scratch at anytime its fixed to a specific address.
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* Set by atom 0 (popped from tape), read by atoms 1-6 (used as pointer base). */
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R_ResolveScratch = R_T4 atom_reg atom_type(U4*),
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R_ResolveScratch = R_T4 atom_reg atom_type(U4*),
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#define R_ResolveScratch_Code R_T4_Code
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#define R_ResolveScratch_Code R_T4_Code
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};
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};
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@@ -132,30 +106,7 @@ typedef Struct_(Binds_ResolveLookAt) {
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V3_S4* up_in;
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V3_S4* up_in;
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};
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};
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/* ─── ResolveLookAtScratch — offset schema for the resolve_look_at bundle's
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/* ─── ResolveLookAtScratch — offset schema for the resolve_look_at bundle's */
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* scratchpad slots (PS1 hardware scratchpad at 0x1F800000).
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*
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* Each slot is 16 bytes: V3_S4 is already 16 bytes (4 × S4 = x/y/z/pad).
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* The struct fields are contiguous — slot i starts at offset i*16.
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* Used by the assembly via O_(ResolveLookAtScratch, fld.x/y/z) which resolves to a compile-time byte offset.
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* NOT a runtime struct — the struct is purely a schema for offsets; the assembly uses `r_scratch + O_(...)` to compute slot addresses at runtime.
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*
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* Slot producers/consumers (referenced by the resolve_look_at chain atoms):
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* +0 fwd 0 writes (target - eye); atom 1 (normalize) reads
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* +16 uz 1 writes (normalize fwd); atoms 2 + 4 read (cross operands)
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* +32 right 2 writes (cross uz x up_in); atom 3 (normalize) reads
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* +48 ux 3 writes (normalize right); atoms 4 + 6 read
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* +64 up 4 writes (cross uz x ux); atom 5 (normalize) reads
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* +80 uy 5 writes (normalize up); atom 6 reads
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* +96 eye 0 stages (C-side input); atom 6 reads (translation column)
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* +112 target reserved (currently written nowhere — kept for symmetry w/ eye)
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* +128 up_in 0 stages (C-side input); atom 2 reads (cross operand)
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*
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* Fields use P3_S4 (point) for eye/target (RGA: affine point, implicit weight 1);
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* V3_S4 (vector) for fwd/uz/right/ux/up/uy/up_in (RGA: Euclidean vector).
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* P3_S4 is a storage alias of V3_S4 (see math.h comment: "Storage alias of V3_S4.
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* Use P3_S4 when the value is a point.") — both are 16 bytes.
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*/
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typedef Struct_(ResolveLookAtScratch) {
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typedef Struct_(ResolveLookAtScratch) {
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V3_S4 fwd; /* offset +0 (16 bytes — 4 S4 fields incl. internal pad) */
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V3_S4 fwd; /* offset +0 (16 bytes — 4 S4 fields incl. internal pad) */
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V3_S4 uz; /* offset +16 (16 bytes) */
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V3_S4 uz; /* offset +16 (16 bytes) */
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@@ -168,24 +119,7 @@ typedef Struct_(ResolveLookAtScratch) {
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V3_S4 up_in; /* offset +128 (16 bytes) */
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V3_S4 up_in; /* offset +128 (16 bytes) */
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};
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};
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/* ─── resolve_look_at bundle chain atoms ────────────────────────────
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/* ─── resolve_look_at bundle chain atoms ──────────────────────────── */
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* 4 unique atom procs in the resolve_look_at bundle (4 chain atoms + 3 calls to generic normalize_v3s4_proc).
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* All 4 chain atoms are runtime-built MipsAtom_Proc_ atoms: each function declares a static MipsCode[] body,
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* then calls atombuilder_unroll() to append it to the caller's MipsAtomBuilder arena. resolve_look_at_init()
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* uses this pattern to pre-build the bundle into the static arena (smem.resolve_look_at_arena).
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*
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* Atom roster:
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* 0: resolve_look_at__input_and_sub (chain atom)
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* 1: normalize_v3s4_proc (gte.atom.c) (generic normalize; called for fwd→uz)
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* 2: resolve_look_at__cross_uz_up_in_to_right (chain atom)
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* 3: normalize_v3s4_proc (gte.atom.c) (generic normalize; called for right→ux)
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* 4: resolve_look_at__cross_uz_ux_to_up (chain atom)
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* 5: normalize_v3s4_proc (gte.atom.c) (generic normalize; called for up→uy)
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* 6: resolve_look_at__populate_and_translate (chain atom)
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*
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* The generic normalize_v3s4_proc is a parameterized 4-stage GTE normalize (SQR → mfc2 → LZCS → GPF → srav);
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* it accepts scratch base + offset args so any caller (with a scratch base + struct schema) can use it.
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*/
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typedef Struct_(Binds_ResolveLookAtSub) {
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typedef Struct_(Binds_ResolveLookAtSub) {
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P3_S4* target; /* U4 (C-side P3_S4* — read by atom 0 directly; NOT a scratchpad address) */
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P3_S4* target; /* U4 (C-side P3_S4* — read by atom 0 directly; NOT a scratchpad address) */
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@@ -243,21 +177,6 @@ internal MipsAtom* resolve_look_at__input_and_sub_proc(AtomArena_R aa,
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mac_yield()
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mac_yield()
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})
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})
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/* Atoms 2 + 4 in the bundle: out = a × b (GTE outer product on IR/D vectors).
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* No bind pop — the three operand pointers (a, b, out) are derived in-body from r_scratch + hardcoded_offset.
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* Each atom has its own variant because the offsets are baked into the body and each atom uses unique GPRs.
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*
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* GTE register layout (per PSX-SPX + duffle gte.h):
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* IR1/2/3 = a.x/y/z (mtc2)
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* VXY0 = b.x (mtc2)
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* VZ0 = b.y (mtc2)
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* VXY1 = b.z (mtc2)
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* OP = outer product
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* MAC1/2/3 = out.x/y/z (mfc2)
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*
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* Pool cost: r_scratch (R_T4 carrier) + 7 body GPRs + R_AT + R_V0 (hardcoded) = 10 GPRs.
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*/
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/* Atom 2: cross uz × up_in → right. */
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/* Atom 2: cross uz × up_in → right. */
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internal MipsAtom* resolve_look_at__cross_uz_up_in_to_right_proc(AtomArena_R aa, U4 r_scratch
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internal MipsAtom* resolve_look_at__cross_uz_up_in_to_right_proc(AtomArena_R aa, U4 r_scratch
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, U4 r_a, U4 r_b, U4 r_c /* load a.x/y/z; result out.x/y/z */
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, U4 r_a, U4 r_b, U4 r_c /* load a.x/y/z; result out.x/y/z */
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