Made the atom offset/label metaprogram! Still need to support more than one branch per-atom.

This commit is contained in:
ed
2026-07-06 10:10:02 -04:00
parent c3a7e22743
commit 352a8c9c25
11 changed files with 930 additions and 42 deletions
+2 -2
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@@ -67,8 +67,8 @@
*
* asm volatile("nop" : : : reg_str(R_RA), "memory"); // clobber list */
#define rlit_stringfy(n) "$" stringify(n)
#define rlit_tmpl(n) rlit_stringfy(tmpl(n,Code))
#define rlit(n) rlit_tmpl(n)
#define rlit_tmpl(n) rlit_stringfy(tmpl(n,Code))
#define rlit(n) rlit_tmpl(n)
/* ------------------------------------------------------------------------ *
* rgcc(n) — GCC-specific bundle for register-variable declarations.
+50
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@@ -0,0 +1,50 @@
// Auto-generated by gen_atom_offsets.lua — DO NOT EDIT
// Source: C:\projects\Pikuma\ps1\code\duffle\lottes_tape.h
#ifndef LOTTES_TAPE_OFFSETS_H
#define LOTTES_TAPE_OFFSETS_H
#pragma region lottes_tape
// Override the placeholder atom_offset() to dispatch via token pasting.
#undef atom_offset
#define atom_offset(name) atom_offset_##name
// --- atom: sym (8 words) ---
// --- atom: tape_exit (2 words) ---
// --- atom: yield (4 words) ---
// --- atom: mips_flush_icache (13 words) ---
// --- atom: sync_prim_cursor (6 words) ---
// --- atom: set_gte_world (22 words) ---
// --- atom: rbind_cube_tri (6 words) ---
// --- atom: cube_tri (74 words) ---
// --- atom: rbind_floor_tri (6 words) ---
// --- atom: diag_yield (4 words) ---
// --- atom: diag_color (28 words) ---
// --- atom: diag_gte (34 words) ---
#pragma endregion lottes_tape
#endif // LOTTES_TAPE_OFFSETS_H
+1 -1
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@@ -663,7 +663,7 @@ enum {
asm_clobber: clb_system, rlit(R_T4), rlit(R_T5), rlit(R_T6) \
)
#pragma region ASM DSL
#pragma endregion ASM DSL
#pragma region Reserved
+35 -1
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@@ -7,7 +7,10 @@
# include "memory.h"
#endif
typedef U4 const MipsCode;
#define MipsAtom_(sym) MipsCode tmpl(code,sym) [] align_(4) =
#pragma region Tape Drive
/* ---------------------------------------------------------------------------
* TAPE DRIVE ABI & REGISTER ALIASES
* ---------------------------------------------------------------------------
@@ -63,12 +66,14 @@ FI_ TapeBuilder tb_make( FArena* arena) { return (TapeBuilder){
#define tb_emit_(tb, atom) tb_emit(tb, tmpl(code,atom))
FI_ void tb_emit(TapeBuilder* tb, MipsCode* atom) { u4_r(tb->ptr)[tb->used] = u4_(atom); ++ tb->used; }
FI_ void tb_data(TapeBuilder* tb, U4 data) { u4_r(tb->ptr)[tb->used] = u4_(data); ++ tb->used; }
FI_ void tb_data(TapeBuilder* tb, U4 data) { u4_r(tb->ptr)[tb->used] = u4_(data); ++ tb->used; }
FI_ Slice_U4 tb_end (TapeBuilder* tb) { tb_emit(tb,code_tape_exit); return (Slice_U4){ C_(U4*,tb->ptr), tb->used }; }
FI_ Slice_U4 tb_slice(TapeBuilder tb) { return (Slice_U4){ C_(U4*,tb.ptr), tb.used }; }
#define tb_scope(tb) for(U4 tbs_once=0;tbs_once==0;++tbs_once,tb_emit(tb,code_tape_exit))
#pragma endregion Tape Drive
#pragma region Macro Mips Atom Components
/* ---------------------------------------------------------------------------
* MACRO ATOM Components (Reusable Assembly Components)
@@ -150,6 +155,35 @@ FI_ void atombuilder_end(MipsAtomBuilder_R ab) {
#pragma region Baked Mips Atoms
// These atoms are resolved at compile time and are (usually) statically linked readonly data.
enum {
bios_flushcache = 0x44,
bios_table_addr = 0xA0,
};
/* Flushes the Instruction Cache (PSX A-function 0x44 via BIOS stub at 0xA0).
*
* Sequence (per MIPS ABI; arguments in arg registers, RA pushed to stack):
* 1. sp -= 8; sw $ra, 4($sp) ; save RA
* 2. $a0 = bios_flushcache (arg0)
* 3. $t0 = bios_table_addr ; t0 = &BIOS A-function table
* 4. jalr $t0, $ra ; call BIOS(flushcache)
* nop ; branch delay slot
* 5. lw $ra, 4($sp); jr $ra ; restore & return
* 6. sp += 8
*/
internal MipsAtom_(mips_flush_icache) {
add_ui(rstack_ptr, rstack_ptr, -8) /* sp -= 8 */
, store_word(rret_addr, rstack_ptr, 4) /* sw $ra, 4($sp) */
, add_ui(rret_0, rdiscard, bios_flushcache) /* addiu $a0, $0, 0x44 */
, add_ui(rtmp_0, rdiscard, bios_table_addr) /* addiu $t0, $0, 0xA0 */
, jump_link(rtmp_0, rret_addr) /* jalr $t0, $ra */
, nop /* BD slot */
, load_word(rret_addr, rstack_ptr, 4) /* lw $ra, 4($sp) */
, jump_reg(rret_addr) /* jr $ra */
, add_ui(rstack_ptr, rstack_ptr, 8) /* sp += 8 (BD) */
, mac_yield()
};
typedef Struct_(Binds_SyncPrimCursor) {
U4 PrimtiveArena_Used;
U4 PrimtiveBase;
-37
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@@ -482,39 +482,6 @@ enum { _BitOffsets = 0
} \
} while (0 )
// Binary Metaprogramming
typedef U4 const MipsCode;
#define MipsAtom_(sym) MipsCode tmpl(code,sym) [] align_(4) =
enum {
bios_flushcache = 0x44,
bios_table_addr = 0xA0,
};
/* Flushes the Instruction Cache (PSX A-function 0x44 via BIOS stub at 0xA0).
*
* Sequence (per MIPS ABI; arguments in arg registers, RA pushed to stack):
* 1. sp -= 8; sw $ra, 4($sp) ; save RA
* 2. $a0 = bios_flushcache (arg0)
* 3. $t0 = bios_table_addr ; t0 = &BIOS A-function table
* 4. jalr $t0, $ra ; call BIOS(flushcache)
* nop ; branch delay slot
* 5. lw $ra, 4($sp); jr $ra ; restore & return
* 6. sp += 8
*/
internal MipsAtom_(mips_flush_icache) {
add_ui(rstack_ptr, rstack_ptr, -8) /* sp -= 8 */
, store_word(rret_addr, rstack_ptr, 4) /* sw $ra, 4($sp) */
, add_ui(rret_0, rdiscard, bios_flushcache) /* addiu $a0, $0, 0x44 */
, add_ui(rtmp_0, rdiscard, bios_table_addr) /* addiu $t0, $0, 0xA0 */
, jump_link(rtmp_0, rret_addr) /* jalr $t0, $ra */
, nop /* BD slot */
, load_word(rret_addr, rstack_ptr, 4) /* lw $ra, 4($sp) */
, jump_reg(rret_addr) /* jr $ra */
, add_ui(rstack_ptr, rstack_ptr, 8) /* sp += 8 (BD) */
};
I_ void mips_flush_icache(void) { C_(VoidFn*, code_mips_flush_icache)(); }
/* Standard clobber list for pure-MIPS asm volatile blocks: caller-saved
* GPRs that the kernel treats as volatile (v0/v1/t0/t1/ra) plus the
@@ -533,7 +500,3 @@ I_ void mips_flush_icache(void) { C_(VoidFn*, code_mips_flush_icache)(); }
, jump_reg(rret_addr) \
, add_ui(rstack_ptr, rstack_ptr, 8) \
) asm_clobber: clb_system )
void test_mips_asm() {
asm_mips_flush_icache();
}