mirror of
https://github.com/Ed94/pikuma_ps1.git
synced 2026-07-12 20:31:25 -07:00
Adjustments to formatting
This commit is contained in:
@@ -1,4 +1,4 @@
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// Auto-generated by tape_atom_offset_gen.meta.lua — DO NOT EDIT
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// Auto-generated by ps1_meta.lua (passes/offsets.lua) — DO NOT EDIT
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// Source: C:\projects\Pikuma\ps1\code\duffle\lottes_tape.h
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#pragma once
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+56
-64
@@ -110,60 +110,56 @@ FI_ Slice_U4 tb_slice(TapeBuilder tb) { return (Sli
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* These do NOT yield. They are expanded inline inside Tape Atoms.
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* ---------------------------------------------------------------------------*/
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// The 'Yield' sequence for Tape Atoms (mac_yield). Authored as a
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// bare-form component (MipsAtomComp_). The metaprogram reads the
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// body and generates a `mac_yield(...)` macro in the auto-generated
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// duffle.macs.h header. The body is the same 4-instruction yield
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// sequence as before.
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// The 'Yield' sequence for Tape Atoms (mac_yield).
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MipsAtomComp_(ac_yield) {
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load_word(R_AtomJmp, R_TapePtr, 0)
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, add_ui_self( R_TapePtr, S_(MipsCode))
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, jump_reg( R_AtomJmp)
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, nop
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load_word(R_AtomJmp, R_TapePtr, 0),
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add_ui_self( R_TapePtr, S_(MipsCode)),
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jump_reg( R_AtomJmp),
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nop,
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};
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/* Words: 3; Loads 3 S2 indices from the face array */
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MipsAtomComp_(ac_load_tri_indices) {
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load_half_u(R_T0, R_FaceCursor, 0 * S_(S2))
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, load_half_u(R_T1, R_FaceCursor, 1 * S_(S2))
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, load_half_u(R_T2, R_FaceCursor, 2 * S_(S2))
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load_half_u(R_T0, R_FaceCursor, 0 * S_(S2)),
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load_half_u(R_T1, R_FaceCursor, 1 * S_(S2)),
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load_half_u(R_T2, R_FaceCursor, 2 * S_(S2)),
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};
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/* Words: 18; Translates indices to vertex addresses and pushes them to GTE */
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MipsAtomComp_(ac_load_tri_verts) {
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shift_lleft(R_AT, R_T0, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY0), gte_mv_to_data_r(R_V1, C2_VZ0)
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, shift_lleft(R_AT, R_T1, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY1), gte_mv_to_data_r(R_V1, C2_VZ1)
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, shift_lleft(R_AT, R_T2, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY2), gte_mv_to_data_r(R_V1, C2_VZ2)
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shift_lleft(R_AT, R_T0, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY0), gte_mv_to_data_r(R_V1, C2_VZ0),
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shift_lleft(R_AT, R_T1, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY1), gte_mv_to_data_r(R_V1, C2_VZ1),
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shift_lleft(R_AT, R_T2, v3s2_byteoff), add_u_self(R_AT, R_VertBase), load_word(R_V0, R_AT, O_(V3_S2,x)), load_word(R_V1, R_AT, O_(V3_S2,z)), gte_mv_to_data_r(R_V0, C2_VXY2), gte_mv_to_data_r(R_V1, C2_VZ2),
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};
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/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
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* Hardcoded for Poly_F3 (5 words). For Poly_G4, use ac_insert_ot_tag_g4. */
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MipsAtomComp_(ac_insert_ot_tag_f3) {
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shift_lleft( R_T1, R_T1, S_(U4)/2) // T1 = otz * S_(U4) (otz arg is implicit R_T1)
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, add_u_self( R_T1, R_OtBase) // T1 = & OrderingTable[OTZ]
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, load_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)) // AT = old_ot_head
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, load_upper_i(R_V0, (S_(Poly_F3)/S_(U4) - S_(PolyTag)/S_(U4)) << polytag_len_bits) /* V0 = (5 - 1) << 24 = 4 << 24 */
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, mask_upper( R_AT, R_AT, S_(polytag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */
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, or_u( R_AT, R_AT, R_V0) /* Merge length */
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, store_word( R_AT, R_PrimCursor, O_(PolyTag,bf_addr_len)) /* prim->tag = packed(prim_length, old_addr) */
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, shift_lleft( R_AT, R_PrimCursor, S_(polytag_len_bits)) /* AT = (prim_length << 24) | old_addr */
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, shift_lright(R_AT, R_AT, S_(polytag_len_bits))
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, store_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)) /* OrderingTable[OTZ] = PrimCursor */
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shift_lleft( R_T1, R_T1, S_(U4)/2), // T1 = otz * S_(U4) (otz arg is implicit R_T1)
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add_u_self( R_T1, R_OtBase), // T1 = & OrderingTable[OTZ]
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load_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)), // AT = old_ot_head
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load_upper_i(R_V0, (S_(Poly_F3)/S_(U4) - S_(PolyTag)/S_(U4)) << polytag_len_bits), // V0 = (5 - 1) << 24 = 4 << 24
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mask_upper( R_AT, R_AT, S_(polytag_len_bits)), // Strip upper 8 bits (length from prev cell) → keep only low 24
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or_u( R_AT, R_AT, R_V0), // Merge length
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store_word( R_AT, R_PrimCursor, O_(PolyTag,bf_addr_len)), // prim->tag = packed(prim_length, old_addr)
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shift_lleft( R_AT, R_PrimCursor, S_(polytag_len_bits)), // AT = (prim_length << 24) | old_addr
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shift_lright(R_AT, R_AT, S_(polytag_len_bits)),
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store_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)), // OrderingTable[OTZ] = PrimCursor
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};
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/* Words: 11; Correctly inserts a primitive into the Ordering Table linked list.
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* Hardcoded for Poly_G4 (9 words). For Poly_F3, use ac_insert_ot_tag_f3. */
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MipsAtomComp_(ac_insert_ot_tag_g4) {
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shift_lleft( R_T1, R_T1, S_(U4)/2) /* T1 = otz * S_(U4) (otz arg is implicit R_T1) */
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, add_u_self( R_T1, R_OtBase) /* T1 = & OrderingTable[OTZ] */
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, load_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)) /* AT = old_ot_head */
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, load_upper_i(R_V0, (S_(Poly_G4)/S_(U4) - S_(PolyTag)/S_(U4)) << polytag_len_bits) /* V0 = (9 - 1) << 24 = 8 << 24 */
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, mask_upper( R_AT, R_AT, S_(polytag_len_bits)) /* Strip upper 8 bits (length from prev cell) → keep only low 24 */
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, or_u( R_AT, R_AT, R_V0) /* Merge length */
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, store_word( R_AT, R_PrimCursor, O_(PolyTag,bf_addr_len)) /* prim->tag = packed(prim_length, old_addr) */
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, shift_lleft( R_AT, R_PrimCursor, S_(polytag_len_bits)) /* AT = (prim_length << 24) | old_addr */
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, shift_lright(R_AT, R_AT, S_(polytag_len_bits))
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, store_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)) /* OrderingTable[OTZ] = PrimCursor */
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shift_lleft( R_T1, R_T1, S_(U4)/2), // T1 = otz * S_(U4) (otz arg is implicit R_T1)
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add_u_self( R_T1, R_OtBase), // T1 = & OrderingTable[OTZ]
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load_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)), // AT = old_ot_head
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load_upper_i(R_V0, (S_(Poly_G4)/S_(U4) - S_(PolyTag)/S_(U4)) << polytag_len_bits), // V0 = (9 - 1) << 24 = 8 << 24
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mask_upper( R_AT, R_AT, S_(polytag_len_bits)), // Strip upper 8 bits (length from prev cell) → keep only low 24
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or_u( R_AT, R_AT, R_V0), // Merge length
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store_word( R_AT, R_PrimCursor, O_(PolyTag,bf_addr_len)), // prim->tag = packed(prim_length, old_addr)
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shift_lleft( R_AT, R_PrimCursor, S_(polytag_len_bits)), // AT = (prim_length << 24) | old_addr
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shift_lright(R_AT, R_AT, S_(polytag_len_bits)),
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store_word( R_AT, R_T1, O_(PolyTag,bf_addr_len)), // OrderingTable[OTZ] = PrimCursor
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};
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/* Words: 3; Emits one (cmd|color) word to R_PrimCursor at the given
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@@ -172,25 +168,23 @@ MipsAtomComp_(ac_insert_ot_tag_g4) {
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* a Poly_G4), r/g/b = 8-bit RGB byte values. */
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FI_ MipsAtom ac_pack_color_word(U4 off, U4 code, U1 r, U1 g, U1 b)
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MipsAtomComp_Proc_(ac_pack_color_word, {
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load_upper_i(R_AT, (code) << 8 | (b))
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, or_i_self( R_AT, ((g) << 8) | (r))
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, store_word( R_AT, R_PrimCursor, (off))
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load_upper_i(R_AT, (code) << 8 | (b)),
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or_i_self( R_AT, ((g) << 8) | (r)),
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store_word( R_AT, R_PrimCursor, (off)),
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})
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/* Words: 3; Emits the F3 command+color word (cmd byte | BLUE | GREEN | RED)
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* Args: _r, _g, _b are 8-bit RGB byte values (not raw 16-bit fields).
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* Migrated from hello_gte_tape.c; takes RGB form per the Phase 3 convention. */
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FI_ MipsAtom ac_format_f3_color(U1 r, U1 g, U1 b)
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MipsAtomComp_Proc_(ac_format_f3_color, {
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mac_pack_color_word(O_(Poly_F3,color), gp0_cmd_poly_f3, r, g, b)
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})
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MipsAtomComp_Proc_(ac_format_f3_color, { mac_pack_color_word(O_(Poly_F3,color), gp0_cmd_poly_f3, r, g, b) })
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/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices to the F3.
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* PIPELINE: post-RTPT (SXY0=v0.screen, SXY1=v1.screen, SXY2=v2.screen). */
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MipsAtomComp_(ac_gte_store_f3_post_rtpt) {
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gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_F3,p0))
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, gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_F3,p1))
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, gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_F3,p2))
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gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_F3,p0)),
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gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_F3,p1)),
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gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_F3,p2)),
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};
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/* Words: 12; Emits the four (code|color) words of a Poly_G4.
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@@ -201,10 +195,10 @@ FI_ MipsAtom ac_format_g4_color(
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U1 r2, U1 g2, U1 b2,
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U1 r3, U1 g3, U1 b3)
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MipsAtomComp_Proc_(ac_format_g4_color, {
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mac_pack_color_word(O_(Poly_G4,c0), gp0_cmd_poly_g4, r0,g0,b0)
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, mac_pack_color_word(O_(Poly_G4,c1), 0, r1,g1,b1)
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, mac_pack_color_word(O_(Poly_G4,c2), 0, r2,g2,b2)
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, mac_pack_color_word(O_(Poly_G4,c3), 0, r3,g3,b3)
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mac_pack_color_word(O_(Poly_G4,c0), gp0_cmd_poly_g4, r0,g0,b0),
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mac_pack_color_word(O_(Poly_G4,c1), 0, r1,g1,b1),
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mac_pack_color_word(O_(Poly_G4,c2), 0, r2,g2,b2),
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mac_pack_color_word(O_(Poly_G4,c3), 0, r3,g3,b3),
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})
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/* Words: 3; Stores the 3 transformed (V2_S2 screen) vertices of the
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@@ -216,9 +210,9 @@ MipsAtomComp_Proc_(ac_format_g4_color, {
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* The macro name declares the pipeline position; check #6 (GTE state-
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* machine validation) verifies the call site matches the declaration. */
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MipsAtomComp_(ac_gte_store_g4_p012_post_rtpt_pre_rtps) {
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gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_G4,p0))
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, gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_G4,p1))
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, gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p2))
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gte_sw(C2_SXY0, R_PrimCursor, O_(Poly_G4,p0)),
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gte_sw(C2_SXY1, R_PrimCursor, O_(Poly_G4,p1)),
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gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p2)),
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};
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/* Words: 1; Stores the V3 screen coord to the G4's p3 slot.
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@@ -227,9 +221,7 @@ MipsAtomComp_(ac_gte_store_g4_p012_post_rtpt_pre_rtps) {
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* earlier RTPT — DO NOT read SXY0 here, that's the bug this name
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* prevents).
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*/
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MipsAtomComp_(ac_gte_store_g4_p3_post_rtps) {
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gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p3))
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};
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MipsAtomComp_(ac_gte_store_g4_p3_post_rtps) { gte_sw(C2_SXY2, R_PrimCursor, O_(Poly_G4,p3)) };
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#pragma endregion Macro Atom Components
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@@ -280,16 +272,16 @@ enum {
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* 6. sp += 8
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*/
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internal MipsAtom_(mips_flush_icache) {
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add_ui(rstack_ptr, rstack_ptr, -MipsStackAlignment) // sp -= 8
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, store_word(rret_addr, rstack_ptr, S_(U4)) // sw $ra, 4($sp)
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, add_ui(rret_0, rdiscard, bios_flushcache) // addiu $a0, $0, 0x44
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, add_ui(rtmp_0, rdiscard, bios_table_addr) // addiu $t0, $0, 0xA0
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, jump_link(rtmp_0, rret_addr) // jalr $t0, $ra
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, nop // BD slot
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, load_word(rret_addr, rstack_ptr, S_(U4)) // lw $ra, 4($sp)
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, jump_reg(rret_addr) // jr $ra
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, add_ui(rstack_ptr, rstack_ptr, MipsStackAlignment) // sp += 8 (BD)
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, mac_yield()
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add_ui(rstack_ptr, rstack_ptr, -MipsStackAlignment), // sp -= 8
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store_word(rret_addr, rstack_ptr, S_(U4)), // sw $ra, 4($sp)
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add_ui(rret_0, rdiscard, bios_flushcache), // addiu $a0, $0, 0x44
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add_ui(rtmp_0, rdiscard, bios_table_addr), // addiu $t0, $0, 0xA0
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jump_link(rtmp_0, rret_addr), // jalr $t0, $ra
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nop, // BD slot
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load_word(rret_addr, rstack_ptr, S_(U4)), // lw $ra, 4($sp)
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jump_reg(rret_addr), // jr $ra
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add_ui(rstack_ptr, rstack_ptr, MipsStackAlignment), // sp += 8 (BD)
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mac_yield(),
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};
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typedef Struct_(Binds_SetGteWorld) {
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