remove outdated comments.

code/duffle/gte.atom.c

@@ -51,9 +51,7 @@ FI_ Slice_MipsCode ac_gte_store_g4_p012(AtomBuilder_R ab, Reg r_primitive_cursor
 FI_ Slice_MipsCode ac_gte_store_g4_p3(AtomBuilder_R ab, U4 r_primitive_cursor) atom_dbg_skip MipsAtomComp_Proc_(ab, { gte_sw(C2_SXY2, r_primitive_cursor, O_(Poly_G4,p3)) })
 
 /* ─── STAGE 1 of normalize: SQR + mfc2 MAC1/2/3 ───
- * Emits squared magnitude per component (in MAC1/2/3) into caller-provided scratch regs.
- * Stage 2 of normalize consumes these directly.
- * Words: 8.  Clobbers: IR1/2/3, MAC1/2/3.  Uses gte_cmdw_sqr (sf=0, lm=1). */
+ * Emits squared magnitude per component (in MAC1/2/3) into caller-provided scratch regs. */
 FI_ Slice_MipsCode ac_gte_sqr_v3(AtomBuilder_R ab, U4 r_sx, U4 r_sy, U4 r_sz, U4 r_sq_x, U4 r_sq_y, U4 r_sq_z) atom_dbg_skip MipsAtomComp_Proc_(ab, {
 	mac_gte_sqr_v3s4(r_sx, r_sy, r_sz, nop),
 	gte_mv_from_data_r(r_sq_x, C2_MAC1),
@@ -61,10 +59,7 @@ FI_ Slice_MipsCode ac_gte_sqr_v3(AtomBuilder_R ab, U4 r_sx, U4 r_sy, U4 r_sz, U4
 	gte_mv_from_data_r(r_sq_z, C2_MAC3),
 })
 
-/* ─── SQR FIRE — mtc2 3 GPRs into IR1/IR2/IR3, then fire SQR. ───
- * The SQR command always squares IR1/IR2/IR3 — those C2 registers are fixed.
- * The GPRs holding the source vector are caller-determined.
- * Words: 5 (3 mtc2 + 1 nop hazard + 1 cmd). */
+/* ─── SQR FIRE — mtc2 3 GPRs into IR1/IR2/IR3, then fire SQR. ─── */
 FI_ Slice_MipsCode ac_gte_sqr_v3s4(AtomBuilder_R ab, Reg r_sx, Reg r_sy, Reg r_sz, MipsCode delay_slot)
 atom_dbg_skip MipsAtomComp_Proc_(ab, {
 	gte_mv_to_data_r(r_sx, C2_IR1),
@@ -255,29 +250,6 @@ typedef Struct_(RegUse_build_normalize_v3s4) {
 /* ─── Full normalize (all 4 stages inline) ───
  * Generic 4-stage GTE normalize (SQR → sum+LZCR → align+sqrtbl → GPF+srav).
  *
- * Parameterized by caller-provided scratch base + src/dst offsets.
- * The caller passes r_src_offset and r_dst_offset as compile-time constants
- * (typically derived from O_ macros in the caller's struct schema, e.g., `O_(CallerBundleScratch, fwd)`).
- *
- * This design lets any caller (with a scratch base + struct schema) use `normalize_v3s4_proc` 
- * without putting magic offsets in the C-side bundle helper — the offsets come from O_ macros at the call site.
- *
- * Body uses 9 GPRs (r_src_ptr..r_branch_tmp):
- *   r_src_ptr, r_dst_ptr : src/dst pointers (computed from r_scratch + caller offsets)
- *   r_tmp                : src.x PRESERVED across stages 1-2 (NOT clobbered by mfc2 MAC2) → fed to IR1 in stage 4
- *   r_mac1_scratch       : MAC1 result scratch (also holds aligned |v|² in stage 3)
- *   r_mac2_scratch       : MAC2 result scratch → result.x after stage 4 sra
- *   r_recip_est          : src.y PRESERVED across stages 1-2 → fed to IR2 in stage 4 → result.y
- *   r_norm               : |v|² sum (stage 2) → half-shift (stage 3) → 1/|v| (stage 4 IR0)
- *   r_shift              : shift count SAVED in stage 3 → consumed by stage 4 srav
-*   r_branch_tmp         : src.z PRESERVED across stages 1-2 → fed to IR3 in stage 4 → result.z (also sqrtbl base addr)
- *
- * Atom_labels are srav_path / aligned_done 
- * (NOT namespaced — they're internal to this proc; 
- * the metaprogram's per-atom-name enum emission handles any collision across different atoms/files that share the same labels).
- *
- * Pool cost: 11 GPRs (well within the 9-10 caller-trash GPR budget when r_scratch is a wave-context carrier).
- *
  * Direct port of PSYQ libgte msc02.rel.text VectorNormal disassembly (0x800160a0..0x8001615c).
  * Words: ~59 (matches libgte 0x800160a0..0x8001615c at +/- 0-2 words for BD-slot reshuffling).
  * Sqrtbl: hardcoded to 0x800185B4 (libgte msc02.rel.data). Note: swapped to local.

code/duffle/lottes_tape.h

@@ -77,8 +77,7 @@ enum {
 
 // Reserved Registers (Callee-saved):
 // - R_T9: Holds the Tape Ptr which we need to increment
-//         If we hit a wall with register allocations we can clobber V0 & V1 (return values), defering as opt-in by user.
-// - R_RA: Not sure??
+// - R_RA: Return address register
 // Needed by ac_yield but can be used as atom scratch:
 // - R_T8: Will be used as the atom jump register.
 
@@ -144,6 +143,7 @@ typedef Slice_(MipsAtom);
 // Inline-only callers (the generated `mac_<name>` aliases) skip the `ab` arg via metaprogram filtering; escape callers (ac_<name> invoked as a function) pass a long-lived builder.
 #define MipsAtomComp_Proc_(ab, ...) { MipsCode atom_comp_code[] align_(4) = __VA_ARGS__; atombuilder_push(ab, slice_from_array(MipsCode, atom_comp_code)); }
 
+// Used for trivial mappings from one atom component proc to the command of a more baser (meant for type-mapping)
 #define MipsAtomComp_ProcMap_(ab, base_command) atom_dbg_skip MipsAtomComp_Proc_(ab, {base_command })
 
 /* Line-table anchor: gcc only adds a file to the .debug_line file table when the contains line-numbered content.