From 95e67a8c1a88d58596e08b797c583a3d1e9a7295 Mon Sep 17 00:00:00 2001
From: Ed_ <edwardgz@gmail.com>
Date: Wed, 9 Sep 2026 14:03:30 -0400
Subject: [PATCH] simplifcation of encoding table, properly define
 compositionaly various encoding definitions.

---
 code/8086/decoder.c                      |  20 +-
 code/8086/decoder.h                      |   8 +
 code/8086/decoder_table_generator.meta.c |  12 +-
 code/8086/encoder.h                      | 140 ++++--
 code/8086/encoder_table.h                | 494 ++------------------
 code/8086/gen/decoder_table.h            | 550 ++++++++++-------------
 6 files changed, 397 insertions(+), 827 deletions(-)

diff --git a/code/8086/decoder.c b/code/8086/decoder.c
index f11941a..b17f992 100644
--- a/code/8086/decoder.c
+++ b/code/8086/decoder.c
@@ -44,6 +44,8 @@ typedef Struct_(X8616_DecodePlex) {
 	X8616_Sign          s;
 	X8616_VariableShift v;
 	X8616_Repeat        z;
+	X8616_ALU           alu;
+	X8616_Condition     cc;
 	X8616_DecodedReg    reg_opcode;
 	X8616_Segment       sr_opcode;
 
@@ -275,10 +277,18 @@ x8616_decode_one_plex(X8616_DecodePlex* plex)
 		plex->mod      = C_(X8616_Mod,     x8616_modrm_mod(plex->mod_rm));
 		plex->reg.r16  = C_(X8616_Reg16,   x8616_modrm_reg(plex->mod_rm));
 		plex->rm       = C_(X8616_EA,      x8616_modrm_rm(plex->mod_rm));
-		plex->sr_modrm = C_(X8616_Segment, x8616_modrm_sr(plex->mod_rm));
+		plex->sr_modrm      = C_(X8616_Segment, x8616_modrm_sr(plex->mod_rm));
 		plex->body_at += 1;
 	}
 
+	if (plan->flags & x8616_plan_has_alu) {
+		if (plan->flags & x8616_plan_alu_modrm) plex->alu = C_(X8616_ALU, plex->reg.r16);
+		else plex->alu = C_(X8616_ALU, (plex->opcode >> plan->alu_shift) & x8616_field_mask(0, X8616_OPCODE_ALU_TTT_WIDTH));
+	}
+	if (plan->flags & x8616_plan_has_cc) {
+		plex->cc = C_(X8616_Condition, (plex->opcode >> plan->cc_shift) & x8616_field_mask(0, X8616_OPCODE_CC_WIDTH));
+	}
+
 	plex->displacement_at = plex->body_at;
 
 	if (plan->flags & x8616_plan_uses_rm) plex->displacement_bytes = x8616_decode_disp_bytes[(u1_(plex->mod) << 3) | u1_(plex->rm)];
@@ -412,6 +422,14 @@ x8616_decode_one_plex(X8616_DecodePlex* plex)
 	plex->instruction.operands[swap ^ 1] = source[plan->operands[1]];
 
 	plex->instruction.op            = plan->op;
+	if (plan->flags & x8616_plan_has_alu) {
+		plex->instruction.alu = plex->alu;
+		plex->instruction.op  = x8616_op_from_alu[plex->alu];
+	}
+	if (plan->flags & x8616_plan_has_cc) {
+		plex->instruction.cc = plex->cc;
+		plex->instruction.op = x8616_op_from_cc[plex->cc];
+	}
 	plex->instruction.flags         = plan->encoding_flags;
 	plex->instruction.decode_flags  = (plex->encoding_invalid ? x8616_decode_invalid : 0) | (plex->classification_truncated ? x8616_decode_truncated : 0);
 	plex->instruction.width         = plex->width;
diff --git a/code/8086/decoder.h b/code/8086/decoder.h
index 23ca174..00bd915 100644
--- a/code/8086/decoder.h
+++ b/code/8086/decoder.h
@@ -71,6 +71,8 @@ typedef Struct_(X8616_DecodedInstruction) {
 	X8616_OpcodePrefix    opcode;
 	X8616_Direction       d;
 	X8616_Width           w;
+	X8616_ALU             alu;
+	X8616_Condition       cc;
 	B1 has_mod_rm;
 	U1 size;
 	U1 size_required;
@@ -89,6 +91,9 @@ typedef Enum_(U2, X8616_DecodePlanFlags) {
 	Bit_(x8616_plan_has_sr,          9),
 	Bit_(x8616_plan_uses_rm,        10),
 	Bit_(x8616_plan_is_prefix,      11),
+	Bit_(x8616_plan_has_alu,        12),
+	Bit_(x8616_plan_has_cc,         13),
+	Bit_(x8616_plan_alu_modrm,      14),
 };
 
 typedef Enum_(U1, X8616_DecodePayload) {
@@ -132,6 +137,9 @@ typedef Struct_(X8616_DecodePlan) {
 
 	X8616_BytePattern mod_rm;
 	X8616_BytePattern post_opcode;
+
+	U1 alu_shift;
+	U1 cc_shift;
 };
 
 enum {
diff --git a/code/8086/decoder_table_generator.meta.c b/code/8086/decoder_table_generator.meta.c
index c66163f..3f8fb5f 100644
--- a/code/8086/decoder_table_generator.meta.c
+++ b/code/8086/decoder_table_generator.meta.c
@@ -97,6 +97,13 @@ x8616_decode_gen_plan(X8616_Encoding_R encoding, U4 encoding_idx, X8616_InfoList
 	if (encoding->fields.z.width)   { plan.flags |= x8616_plan_has_z;   plan.z_shift   = encoding->fields.z.shift; }
 	if (encoding->fields.reg.width) { plan.flags |= x8616_plan_has_reg; plan.reg_shift = encoding->fields.reg.shift; }
 	if (encoding->fields.sr.width)  { plan.flags |= x8616_plan_has_sr;  plan.sr_shift  = encoding->fields.sr.shift; }
+	if (encoding->fields.alu.width) {
+		plan.flags    |= x8616_plan_has_alu;
+		plan.alu_shift = encoding->fields.alu.shift;
+		if ((plan.flags & x8616_plan_has_modrm) && encoding->fields.d.width == 0)
+			plan.flags |= x8616_plan_alu_modrm;
+	}
+	if (encoding->fields.cc.width)  { plan.flags |= x8616_plan_has_cc;  plan.cc_shift  = encoding->fields.cc.shift; }
 
 	if (x8616_decode_gen_operand_uses_rm(encoding->operands[0]) || x8616_decode_gen_operand_uses_rm(encoding->operands[1]))
 		plan.flags |= x8616_plan_uses_rm;
@@ -328,7 +335,8 @@ x8616_decode_gen_emit_plan(Str8Gen_R out, X8616_DecodePlan_R plan) { defer_rewin
 			<payload>, <prefix_kind>,
 			<d_shift>, <w_shift>, <s_shift>, <v_shift>, <z_shift>, <reg_shift>, <sr_shift>,
 			{<mod_rm.bits>, <mod_rm.mask>},
-			{<post_opcode.bits>, <post_opcode.mask>}, 
+			{<post_opcode.bits>, <post_opcode.mask>},
+			<alu_shift>, <cc_shift>,
 		},\n
 	);
 	KTL_Slot_Str8 tbl[] = {
@@ -352,6 +360,8 @@ x8616_decode_gen_emit_plan(Str8Gen_R out, X8616_DecodePlan_R plan) { defer_rewin
 		entry("mod_rm.mask",      hex_u1(plan->mod_rm.mask)),
 		entry("post_opcode.bits", hex_u1(plan->post_opcode.bits)),
 		entry("post_opcode.mask", hex_u1(plan->post_opcode.mask)),
+		entry("alu_shift",        dec(plan->alu_shift)),
+		entry("cc_shift",         dec(plan->cc_shift)),
 	}; 
 	str8gen_append_fmt(out, template, ktl_str8_from_arr(tbl));
 }}
diff --git a/code/8086/encoder.h b/code/8086/encoder.h
index c133082..2079408 100644
--- a/code/8086/encoder.h
+++ b/code/8086/encoder.h
@@ -14,8 +14,13 @@ typedef Struct_(X8616_OpcodeFields) {
 	X8616_BitField z;
 	X8616_BitField reg;
 	X8616_BitField sr;
+	X8616_BitField alu;
+	X8616_BitField cc;
 };
 
+#define x8616_field_mask(shift, width) u1_(((1u << (width)) - 1u) << (shift))
+#define x8616_stem_mask(low_width)     u1_(~((1u << (low_width)) - 1u))
+
 typedef Enum_(U1, X8616_Op) {
 	x8616_op_invalid = 0x00,
 	x8616_op_nop     = 0x01,
@@ -169,9 +174,9 @@ typedef Enum_(U1, X8616_Width) {
 typedef Enum_(U1, X8616_Direction) {
 	x8616_d_rm_dst  = 0b0,
 	x8616_d_reg_dst = 0b1,
-	x8616_d_acc_dst = 0b0,
-	x8616_d_mem_dst = 0b1,
-	x8616_d_seg_dst = 0b1,
+	x8616_d_acc_dst = x8616_d_rm_dst,
+	x8616_d_mem_dst = x8616_d_reg_dst,
+	x8616_d_seg_dst = x8616_d_reg_dst,
 };
 
 typedef Enum_(U1, X8616_Sign) {
@@ -248,6 +253,17 @@ typedef Enum_(U1, X8616_ALU) {
 	x8616_cmp = 0b111,
 };
 
+RO_ global X8616_Op x8616_op_from_alu[] = {
+	[x8616_add] = x8616_op_add,
+	[x8616_or]  = x8616_op_or,
+	[x8616_adc] = x8616_op_adc,
+	[x8616_sbb] = x8616_op_sbb,
+	[x8616_and] = x8616_op_and,
+	[x8616_sub] = x8616_op_sub,
+	[x8616_xor] = x8616_op_xor,
+	[x8616_cmp] = x8616_op_cmp,
+};
+
 typedef Enum_(U1, X8616_Group3) {
 	x8616_g3_test = 0b000,
 	x8616_g3_not  = 0b010,
@@ -300,6 +316,29 @@ typedef Enum_(U1, X8616_Condition) {
 	x8616_cc_g   = 0b1111,
 };
 
+RO_ global X8616_Op x8616_op_from_cc[] = {
+	[x8616_cc_o]  = x8616_op_jo,
+	[x8616_cc_no] = x8616_op_jno,
+	[x8616_cc_b]  = x8616_op_jb,
+	[x8616_cc_nb] = x8616_op_jnb,
+	[x8616_cc_e]  = x8616_op_je,
+	[x8616_cc_ne] = x8616_op_jne,
+	[x8616_cc_be] = x8616_op_jbe,
+	[x8616_cc_a]  = x8616_op_ja,
+	[x8616_cc_s]  = x8616_op_js,
+	[x8616_cc_ns] = x8616_op_jns,
+	[x8616_cc_p]  = x8616_op_jp,
+	[x8616_cc_np] = x8616_op_jnp,
+	[x8616_cc_l]  = x8616_op_jl,
+	[x8616_cc_nl] = x8616_op_jnl,
+	[x8616_cc_le] = x8616_op_jle,
+	[x8616_cc_g]  = x8616_op_jg,
+};
+
+typedef Enum_(U1, X8616_Digit) {
+	x8616_digit_0 = 0b000,
+};
+
 typedef Enum_(U1, X8616_OpcodePrefix) {
 	x8616_opcode_mov_rm_r     = 0b100010,
 	x8616_opcode_mov_rm_i     = 0b1100011,
@@ -318,7 +357,6 @@ typedef Enum_(U1, X8616_OpcodePrefix) {
 	x8616_opcode_out_dx       = 0b1110111,
 
 	x8616_opcode_alu_rm_i     = 0b100000,
-	x8616_opcode_logic_rm_i   = 0b1000000,
 	x8616_opcode_incdec_rm    = 0b1111111,
 	x8616_opcode_inc_reg      = 0b01000,
 	x8616_opcode_dec_reg      = 0b01001,
@@ -393,10 +431,9 @@ typedef Enum_(U1, X8616_Opcode) {
 };
 
 enum {
-	X8616_OPCODE_MASK = 0b11111111,
+	X8616_OPCODE_MASK = x8616_field_mask(0, 8),
 
-	X8616_OPCODE_ALU_ACC_I_FIXED = 0b10,
-	X8616_POST_OPCODE_AAM_AAD    = 0b00001010,
+	X8616_POST_OPCODE_AAM_AAD = 0b00001010,
 
 // ModR/M:
 //  7 6   5 4 3   2 1 0
@@ -405,95 +442,109 @@ enum {
 // +-----+-------+-------+
 
 	X8616_MODRM_RM_SHIFT  = 0,
+	X8616_MODRM_RM_WIDTH  = 3,
 	X8616_MODRM_REG_SHIFT = 3,
+	X8616_MODRM_REG_WIDTH = 3,
 	X8616_MODRM_MOD_SHIFT = 6,
-	X8616_MODRM_RM_MASK   = 0b00000111,
-	X8616_MODRM_REG_MASK  = 0b00111000,
-	X8616_MODRM_MOD_MASK  = 0b11000000,
+	X8616_MODRM_MOD_WIDTH = 2,
+	X8616_MODRM_RM_MASK   = x8616_field_mask(X8616_MODRM_RM_SHIFT,  X8616_MODRM_RM_WIDTH),
+	X8616_MODRM_REG_MASK  = x8616_field_mask(X8616_MODRM_REG_SHIFT, X8616_MODRM_REG_WIDTH),
+	X8616_MODRM_MOD_MASK  = x8616_field_mask(X8616_MODRM_MOD_SHIFT, X8616_MODRM_MOD_WIDTH),
 
-// Segment register occupies bits 4..3 in the segment-register MOV form.
-
-	X8616_MODRM_SR_SHIFT        = 3,
-	X8616_MODRM_SR_MASK         = 0b00011000,
-	X8616_MODRM_SEG_FIXED_MASK  = 0b00100000,
+	X8616_MODRM_SR_SHIFT       = 3,
+	X8616_MODRM_SR_WIDTH       = 2,
+	X8616_MODRM_SR_MASK        = x8616_field_mask(X8616_MODRM_SR_SHIFT, X8616_MODRM_SR_WIDTH),
+	X8616_MODRM_SEG_FIXED_BIT  = 5,
+	X8616_MODRM_SEG_FIXED_MASK = x8616_field_mask(X8616_MODRM_SEG_FIXED_BIT, 1),
 
 // ... d w
 
 	X8616_OPCODE_DW_W_SHIFT      = 0,
 	X8616_OPCODE_DW_D_SHIFT      = 1,
 	X8616_OPCODE_DW_PREFIX_SHIFT = X8616_OPCODE_DW_D_SHIFT + 1,
-	X8616_OPCODE_DW_PREFIX_MASK  = 0b11111100,
+	X8616_OPCODE_DW_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_DW_PREFIX_SHIFT),
 
 // ... s w
 
 	X8616_OPCODE_SW_W_SHIFT      = 0,
 	X8616_OPCODE_SW_S_SHIFT      = 1,
 	X8616_OPCODE_SW_PREFIX_SHIFT = X8616_OPCODE_SW_S_SHIFT + 1,
-	X8616_OPCODE_SW_PREFIX_MASK  = 0b11111100,
+	X8616_OPCODE_SW_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_SW_PREFIX_SHIFT),
 
 // ... v w
 
 	X8616_OPCODE_VW_W_SHIFT      = 0,
 	X8616_OPCODE_VW_V_SHIFT      = 1,
 	X8616_OPCODE_VW_PREFIX_SHIFT = X8616_OPCODE_VW_V_SHIFT + 1,
-	X8616_OPCODE_VW_PREFIX_MASK  = 0b11111100,
+	X8616_OPCODE_VW_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_VW_PREFIX_SHIFT),
 
 // ... z
 
 	X8616_OPCODE_Z_Z_SHIFT      = 0,
 	X8616_OPCODE_Z_PREFIX_SHIFT = X8616_OPCODE_Z_Z_SHIFT + 1,
-	X8616_OPCODE_Z_PREFIX_MASK  = 0b11111110,
+	X8616_OPCODE_Z_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_Z_PREFIX_SHIFT),
 
 // ... w
 
 	X8616_OPCODE_W_W_SHIFT      = 0,
 	X8616_OPCODE_W_PREFIX_SHIFT = X8616_OPCODE_W_W_SHIFT + 1,
-	X8616_OPCODE_W_PREFIX_MASK  = 0b11111110,
+	X8616_OPCODE_W_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_W_PREFIX_SHIFT),
 
 // ... reg
 
 	X8616_OPCODE_REG_REG_SHIFT    = 0,
 	X8616_OPCODE_REG_REG_WIDTH    = 3,
-	X8616_OPCODE_REG_REG_MASK     = 0b00000111,
+	X8616_OPCODE_REG_REG_MASK     = x8616_field_mask(X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH),
 	X8616_OPCODE_REG_PREFIX_SHIFT = X8616_OPCODE_REG_REG_SHIFT + X8616_OPCODE_REG_REG_WIDTH,
-	X8616_OPCODE_REG_PREFIX_MASK  = 0b11111000,
+	X8616_OPCODE_REG_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_REG_PREFIX_SHIFT),
 
 // ... w reg
 
 	X8616_OPCODE_WREG_REG_SHIFT    = 0,
 	X8616_OPCODE_WREG_REG_WIDTH    = 3,
-	X8616_OPCODE_WREG_REG_MASK     = 0b00000111,
+	X8616_OPCODE_WREG_REG_MASK     = x8616_field_mask(X8616_OPCODE_WREG_REG_SHIFT, X8616_OPCODE_WREG_REG_WIDTH),
 	X8616_OPCODE_WREG_W_SHIFT      = X8616_OPCODE_WREG_REG_SHIFT + X8616_OPCODE_WREG_REG_WIDTH,
-	X8616_OPCODE_WREG_W_MASK       = 0b00001000,
+	X8616_OPCODE_WREG_W_MASK       = x8616_field_mask(X8616_OPCODE_WREG_W_SHIFT, 1),
 	X8616_OPCODE_WREG_PREFIX_SHIFT = X8616_OPCODE_WREG_W_SHIFT + 1,
-	X8616_OPCODE_WREG_PREFIX_MASK  = 0b11110000,
+	X8616_OPCODE_WREG_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_WREG_PREFIX_SHIFT),
 
-// ... d 0
+// ... d 0  (bit 0 fixed, bit 1 = d, bits 7-2 = stem)
 
 	X8616_OPCODE_D0_D_SHIFT      = 1,
 	X8616_OPCODE_D0_PREFIX_SHIFT = X8616_OPCODE_D0_D_SHIFT + 1,
-	X8616_OPCODE_D0_PREFIX_MASK  = 0b11111101,
+	X8616_OPCODE_D0_PREFIX_MASK  = x8616_stem_mask(X8616_OPCODE_D0_PREFIX_SHIFT) | x8616_field_mask(0, 1),
 
-// xxx sr xxx
+// class(3) | sr(2) | low(3)
 
+	X8616_OPCODE_SR_LOW_SHIFT    = 0,
+	X8616_OPCODE_SR_LOW_WIDTH    = 3,
 	X8616_OPCODE_SR_SHIFT        = 3,
 	X8616_OPCODE_SR_WIDTH        = 2,
-	X8616_OPCODE_SR_MASK         = 0b00011000,
-	X8616_OPCODE_SR_PATTERN_MASK = 0b11100111,
-	X8616_OPCODE_PUSH_SR_FIXED   = 0b00000110,
-	X8616_OPCODE_POP_SR_FIXED    = 0b00000111,
-	X8616_OPCODE_SEG_FIXED       = 0b00100110,
+	X8616_OPCODE_SR_CLASS_SHIFT  = 5,
+	X8616_OPCODE_SR_CLASS_WIDTH  = 3,
+	X8616_OPCODE_SR_MASK         = x8616_field_mask(X8616_OPCODE_SR_SHIFT, X8616_OPCODE_SR_WIDTH),
+	X8616_OPCODE_SR_PATTERN_MASK = u1_(~X8616_OPCODE_SR_MASK),
+	X8616_OPCODE_PUSH_SR_FIXED   = (0b000 << X8616_OPCODE_SR_CLASS_SHIFT) | 0b110,
+	X8616_OPCODE_POP_SR_FIXED    = (0b000 << X8616_OPCODE_SR_CLASS_SHIFT) | 0b111,
+	X8616_OPCODE_SEG_FIXED       = (0b001 << X8616_OPCODE_SR_CLASS_SHIFT) | 0b110,
 
 // 0111 cccc
 
 	X8616_OPCODE_CC_SHIFT        = 0,
 	X8616_OPCODE_CC_WIDTH        = 4,
-	X8616_OPCODE_CC_MASK         = 0b00001111,
+	X8616_OPCODE_CC_MASK         = x8616_field_mask(X8616_OPCODE_CC_SHIFT, X8616_OPCODE_CC_WIDTH),
 	X8616_OPCODE_CC_PREFIX_SHIFT = X8616_OPCODE_CC_WIDTH,
 
-// 00 op ...
+// 00 ttt ...
 
-	X8616_OPCODE_ALU_OP_SHIFT = 3,
+	X8616_OPCODE_ALU_CLASS_SHIFT = 6,
+	X8616_OPCODE_ALU_CLASS_WIDTH = 2,
+	X8616_OPCODE_ALU_TTT_SHIFT   = 3,
+	X8616_OPCODE_ALU_TTT_WIDTH   = 3,
+	X8616_OPCODE_ALU_OP_SHIFT    = X8616_OPCODE_ALU_TTT_SHIFT,
+	X8616_OPCODE_ALU_BIT2_SHIFT  = 2,
+	X8616_OPCODE_ALU_ACC_FORM    = 0b10,
+	X8616_OPCODE_ALU_ACC_FORM_SHIFT = 1,
 };
 
 // ============================================================================
@@ -560,10 +611,11 @@ FI_ U1 x8616_modrm_sr            (U1 modrm)                           { return (
 #define x8616_enc_modrm(mod,reg,rm)    C_(U1, x8616_enc_modrm_mod(mod) | x8616_enc_modrm_reg(reg) | x8616_enc_modrm_rm(rm))
 #define x8616_enc_modrm_seg(mod,sr,rm) C_(U1, x8616_enc_modrm_mod(mod) | x8616_enc_modrm_sr(sr) | x8616_enc_modrm_rm(rm))
 
-#define x8616_enc_alu_op(alu)       ((alu) << X8616_OPCODE_ALU_OP_SHIFT)
-#define x8616_enc_alu_acc_i_fixed   (X8616_OPCODE_ALU_ACC_I_FIXED << X8616_OPCODE_W_PREFIX_SHIFT)
-#define x8616_enc_alu_rm_r(alu,d,w) C_(U1, x8616_enc_alu_op(alu) | x8616_enc_d(d) | x8616_enc_width(w))
-#define x8616_enc_alu_acc_i(alu,w)  C_(U1, x8616_enc_alu_op(alu) | x8616_enc_alu_acc_i_fixed | x8616_enc_width(w))
+#define x8616_enc_alu_class()              ((0b00) << X8616_OPCODE_ALU_CLASS_SHIFT)
+#define x8616_enc_alu_ttt(ttt)             ((ttt) << X8616_OPCODE_ALU_TTT_SHIFT)
+#define x8616_enc_alu_op(alu)              x8616_enc_alu_ttt(alu)
+#define x8616_enc_alu_rm_r(ttt,d,w)        C_(U1, x8616_enc_alu_class() | x8616_enc_alu_ttt(ttt) | (0 << X8616_OPCODE_ALU_BIT2_SHIFT) | x8616_enc_d(d) | x8616_enc_width(w))
+#define x8616_enc_alu_acc_i(ttt,w)         C_(U1, x8616_enc_alu_class() | x8616_enc_alu_ttt(ttt) | (X8616_OPCODE_ALU_ACC_FORM << X8616_OPCODE_ALU_ACC_FORM_SHIFT) | x8616_enc_width(w))
 
 // Scalar / generic packets
 
@@ -615,7 +667,7 @@ FI_ U1 x8616_modrm_sr            (U1 modrm)                           { return (
 
 // MOV
 
-#define x8616_nop()                 x8616_emit_op(x8616_opcode_nop)
+#define x8616_nop()                 x8616_enc_reg(x8616_opcode_xchg_ax_reg, x8616_ax)
 #define x8616_mov_r8_r8(dst,src)    x8616_emit_rm_r(x8616_opcode_mov_rm_r,x8616_d_reg_dst,x8616_w_byte,x8616_mod_reg,dst,src)
 #define x8616_mov_r16_r16(dst,src)  x8616_emit_rm_r(x8616_opcode_mov_rm_r,x8616_d_reg_dst,x8616_w_word,x8616_mod_reg,dst,src)
 #define x8616_mov_r8_i(dst,imm)     x8616_enc_wreg(x8616_opcode_mov_r_i,x8616_w_byte,dst), u1_(imm)
@@ -634,7 +686,7 @@ FI_ U1 x8616_modrm_sr            (U1 modrm)                           { return (
 #define x8616_push_seg(seg)   x8616_enc_sr(X8616_OPCODE_PUSH_SR_FIXED,seg)
 #define x8616_pop_seg(seg)    x8616_enc_sr(X8616_OPCODE_POP_SR_FIXED,seg)
 #define x8616_push_rm(mod,rm) x8616_emit_modrm(x8616_opcode_group_ff,mod,x8616_ff_push,rm)
-#define x8616_pop_rm(mod,rm)  x8616_emit_modrm(x8616_opcode_pop_rm,mod,0b000,rm)
+#define x8616_pop_rm(mod,rm)  x8616_emit_modrm(x8616_opcode_pop_rm,mod,x8616_digit_0,rm)
 
 #define x8616_xchg_r8_r8(a,b)   x8616_enc_w(x8616_opcode_xchg_rm_r,x8616_w_byte), x8616_enc_modrm(x8616_mod_reg,a,b)
 #define x8616_xchg_r16_r16(a,b) x8616_enc_w(x8616_opcode_xchg_rm_r,x8616_w_word), x8616_enc_modrm(x8616_mod_reg,a,b)
@@ -667,8 +719,8 @@ FI_ U1 x8616_modrm_sr            (U1 modrm)                           { return (
 #define x8616_emit_alu_r8_i(alu,dst,imm)    x8616_emit_rm_i8(x8616_opcode_alu_rm_i,x8616_s_full,x8616_w_byte,alu,x8616_mod_reg,dst,imm)
 #define x8616_emit_alu_r16_i(alu,dst,imm)   x8616_emit_rm_i16(x8616_opcode_alu_rm_i,alu,x8616_mod_reg,dst,imm)
 #define x8616_emit_alu_r16_i8s(alu,dst,imm) x8616_emit_rm_i8(x8616_opcode_alu_rm_i,x8616_s_extend,x8616_w_word,alu,x8616_mod_reg,dst,imm)
-#define x8616_emit_logic_r8_i(alu,dst,imm)  x8616_emit_rm_i8_w(x8616_opcode_logic_rm_i,alu,x8616_mod_reg,dst,imm)
-#define x8616_emit_logic_r16_i(alu,dst,imm) x8616_emit_rm_i16_w(x8616_opcode_logic_rm_i,alu,x8616_mod_reg,dst,imm)
+#define x8616_emit_logic_r8_i(alu,dst,imm)  x8616_emit_rm_i8(x8616_opcode_alu_rm_i,x8616_s_full,x8616_w_byte,alu,x8616_mod_reg,dst,imm)
+#define x8616_emit_logic_r16_i(alu,dst,imm) x8616_emit_rm_i16(x8616_opcode_alu_rm_i,alu,x8616_mod_reg,dst,imm)
 #define x8616_emit_alu_al_i(alu,imm)        x8616_enc_alu_acc_i(alu,x8616_w_byte), u1_(imm)
 #define x8616_emit_alu_ax_i(alu,imm)        x8616_enc_alu_acc_i(alu,x8616_w_word), x8616_emit_u2(imm)
 
diff --git a/code/8086/encoder_table.h b/code/8086/encoder_table.h
index b89547a..01a564f 100644
--- a/code/8086/encoder_table.h
+++ b/code/8086/encoder_table.h
@@ -36,7 +36,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
 			.mask = X8616_OPCODE_W_PREFIX_MASK,
 		},
 		.mod_rm = {
-			.bits = 0b000 << X8616_MODRM_REG_SHIFT,
+			.bits = x8616_digit_0 << X8616_MODRM_REG_SHIFT,
 			.mask = X8616_MODRM_REG_MASK,
 		},
 		.fields = {
@@ -137,7 +137,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
 			.mask = X8616_OPCODE_MASK,
 		},
 		.mod_rm = {
-			.bits = 0b000 << X8616_MODRM_REG_SHIFT,
+			.bits = x8616_digit_0 << X8616_MODRM_REG_SHIFT,
 			.mask = X8616_MODRM_REG_MASK,
 		},
 		.operands = { x8616_operand_rm },
@@ -317,339 +317,52 @@ RO_ global X8616_Encoding x8616_encodings[] =
 	},
 
 	// Arithmetic / logical----------------------------------------------------
+	// 00 ttt 0 d w  |  00 ttt 10 w  |  100000 s w /ttt
 
-	/* ADD r/m,reg: 000000 d w */ {
+	/* ALU r/m,reg: 00 ttt 0 d w */ {
 		.opcode = {
-			.bits = 0b000000 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
+			.bits = x8616_enc_alu_class(),
+			.mask = x8616_field_mask(X8616_OPCODE_ALU_CLASS_SHIFT, X8616_OPCODE_ALU_CLASS_WIDTH)
+			      | x8616_field_mask(X8616_OPCODE_ALU_BIT2_SHIFT, 1),
 		},
 		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
+			.alu = { X8616_OPCODE_ALU_TTT_SHIFT, X8616_OPCODE_ALU_TTT_WIDTH },
+			.d   = { X8616_OPCODE_DW_D_SHIFT, 1 },
+			.w   = { X8616_OPCODE_DW_W_SHIFT, 1 },
 		},
 		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_add,
+		.op = x8616_op_invalid,
 	},
 
-	/* ADD imm,r/m: 100000 s w /0 */ {
+
+	/* ALU acc,imm: 00 ttt 10 w */ {
+		.opcode = {
+			.bits = x8616_enc_alu_class() | (X8616_OPCODE_ALU_ACC_FORM << X8616_OPCODE_ALU_ACC_FORM_SHIFT),
+			.mask = x8616_field_mask(X8616_OPCODE_ALU_CLASS_SHIFT, X8616_OPCODE_ALU_CLASS_WIDTH)
+			      | x8616_field_mask(X8616_OPCODE_ALU_ACC_FORM_SHIFT, 2),
+		},
+		.fields = {
+			.alu = { X8616_OPCODE_ALU_TTT_SHIFT, X8616_OPCODE_ALU_TTT_WIDTH },
+			.w   = { X8616_OPCODE_W_W_SHIFT, 1 },
+		},
+		.operands = { x8616_operand_acc, x8616_operand_imm },
+		.op = x8616_op_invalid,
+	},
+
+	/* ALU imm,r/m: 100000 s w /ttt */ {
 		.opcode = {
 			.bits = x8616_opcode_alu_rm_i << X8616_OPCODE_SW_PREFIX_SHIFT,
 			.mask = X8616_OPCODE_SW_PREFIX_MASK,
 		},
-		.mod_rm = {
-			.bits = x8616_add << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
 		.fields = {
-			.s = { X8616_OPCODE_SW_S_SHIFT, 1 },
-			.w = { X8616_OPCODE_SW_W_SHIFT, 1 },
+			.alu = { X8616_MODRM_REG_SHIFT, X8616_MODRM_REG_WIDTH },
+			.s   = { X8616_OPCODE_SW_S_SHIFT, 1 },
+			.w   = { X8616_OPCODE_SW_W_SHIFT, 1 },
 		},
 		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_add,
+		.op = x8616_op_invalid,
 	},
 
-	/* ADD accumulator,imm: 0000010 w */ {
-		.opcode = {
-			.bits = 0b0000010 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_add,
-	},
-
-	/* OR r/m,reg: 000010 d w */ {
-		.opcode = {
-			.bits = 0b000010 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
-		},
-		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_or,
-	},
-
-	/* OR imm,r/m: 1000000 w /1 */ {
-		.opcode = {
-			.bits = x8616_opcode_logic_rm_i << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.mod_rm = {
-			.bits = x8616_or << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_or,
-	},
-
-	/* OR accumulator,imm: 0000110 w */ {
-		.opcode = {
-			.bits = 0b0000110 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_or,
-	},
-
-	/* ADC r/m,reg: 000100 d w */ {
-		.opcode = {
-			.bits = 0b000100 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
-		},
-		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_adc,
-	},
-
-	/* ADC imm,r/m: 100000 s w /2 */ {
-		.opcode = {
-			.bits = x8616_opcode_alu_rm_i << X8616_OPCODE_SW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_SW_PREFIX_MASK,
-		},
-		.mod_rm = {
-			.bits = x8616_adc << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
-		.fields = {
-			.s = { X8616_OPCODE_SW_S_SHIFT, 1 },
-			.w = { X8616_OPCODE_SW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_adc,
-	},
-
-	/* ADC accumulator,imm: 0001010 w */ {
-		.opcode = {
-			.bits = 0b0001010 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_adc,
-	},
-
-	/* SBB r/m,reg: 000110 d w */ {
-		.opcode = {
-			.bits = 0b000110 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
-		},
-		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_sbb,
-	},
-
-	/* SBB imm,r/m: 100000 s w /3 */ {
-		.opcode = {
-			.bits = x8616_opcode_alu_rm_i << X8616_OPCODE_SW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_SW_PREFIX_MASK,
-		},
-		.mod_rm = {
-			.bits = x8616_sbb << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
-		.fields = {
-			.s = { X8616_OPCODE_SW_S_SHIFT, 1 },
-			.w = { X8616_OPCODE_SW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_sbb,
-	},
-
-	/* SBB accumulator,imm: 0001110 w */ {
-		.opcode = {
-			.bits = 0b0001110 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_sbb,
-	},
-
-	/* AND r/m,reg: 001000 d w */ {
-		.opcode = {
-			.bits = 0b001000 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
-		},
-		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_and,
-	},
-
-	/* AND imm,r/m: 1000000 w /4 */ {
-		.opcode = {
-			.bits = x8616_opcode_logic_rm_i << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.mod_rm = {
-			.bits = x8616_and << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_and,
-	},
-
-	/* AND accumulator,imm: 0010010 w */ {
-		.opcode = {
-			.bits = 0b0010010 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_and,
-	},
-
-	/* SUB r/m,reg: 001010 d w */ {
-		.opcode = {
-			.bits = 0b001010 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
-		},
-		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_sub,
-	},
-
-	/* SUB imm,r/m: 100000 s w /5 */ {
-		.opcode = {
-			.bits = x8616_opcode_alu_rm_i << X8616_OPCODE_SW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_SW_PREFIX_MASK,
-		},
-		.mod_rm = {
-			.bits = x8616_sub << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
-		.fields = {
-			.s = { X8616_OPCODE_SW_S_SHIFT, 1 },
-			.w = { X8616_OPCODE_SW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_sub,
-	},
-
-	/* SUB accumulator,imm: 0010110 w */ {
-		.opcode = {
-			.bits = 0b0010110 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_sub,
-	},
-
-	/* XOR r/m,reg: 001100 d w */ {
-		.opcode = {
-			.bits = 0b001100 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
-		},
-		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_xor,
-	},
-
-	/* XOR imm,r/m: 1000000 w /6 */ {
-		.opcode = {
-			.bits = x8616_opcode_logic_rm_i << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.mod_rm = {
-			.bits = x8616_xor << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_xor,
-	},
-
-	/* XOR accumulator,imm: 0011010 w */ {
-		.opcode = {
-			.bits = 0b0011010 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_xor,
-	},
-
-	/* CMP r/m,reg: 001110 d w */ {
-		.opcode = {
-			.bits = 0b001110 << X8616_OPCODE_DW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_DW_PREFIX_MASK,
-		},
-		.fields = {
-			.d = { X8616_OPCODE_DW_D_SHIFT, 1 },
-			.w = { X8616_OPCODE_DW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_reg_modrm },
-		.op = x8616_op_cmp,
-	},
-
-	/* CMP imm,r/m: 100000 s w /7 */ {
-		.opcode = {
-			.bits = x8616_opcode_alu_rm_i << X8616_OPCODE_SW_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_SW_PREFIX_MASK,
-		},
-		.mod_rm = {
-			.bits = x8616_cmp << X8616_MODRM_REG_SHIFT,
-			.mask = X8616_MODRM_REG_MASK,
-		},
-		.fields = {
-			.s = { X8616_OPCODE_SW_S_SHIFT, 1 },
-			.w = { X8616_OPCODE_SW_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_rm, x8616_operand_imm },
-		.op = x8616_op_cmp,
-	},
-
-	/* CMP accumulator,imm: 0011110 w */ {
-		.opcode = {
-			.bits = 0b0011110 << X8616_OPCODE_W_PREFIX_SHIFT,
-			.mask = X8616_OPCODE_W_PREFIX_MASK,
-		},
-		.fields = {
-			.w = { X8616_OPCODE_W_W_SHIFT, 1 },
-		},
-		.operands = { x8616_operand_acc, x8616_operand_imm },
-		.op = x8616_op_cmp,
-	},
 
 	// INC / DEC / unary / adjust---------------------------------------------
 
@@ -1271,149 +984,18 @@ RO_ global X8616_Encoding x8616_encodings[] =
 		.op = x8616_op_retf,
 	},
 
-	/* JO rel8 */ {
+	/* Jcc rel8: 0111 cccc */ {
 		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_o),
-			.mask = X8616_OPCODE_MASK,
+			.bits = x8616_opcode_jcc << X8616_OPCODE_CC_PREFIX_SHIFT,
+			.mask = x8616_stem_mask(X8616_OPCODE_CC_PREFIX_SHIFT),
+		},
+		.fields = {
+			.cc = { X8616_OPCODE_CC_SHIFT, X8616_OPCODE_CC_WIDTH },
 		},
 		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jo,
+		.op = x8616_op_invalid,
 	},
 
-	/* JNO rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_no),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jno,
-	},
-
-	/* JB rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_b),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jb,
-	},
-
-	/* JNB rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_nb),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jnb,
-	},
-
-	/* JE rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_e),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_je,
-	},
-
-	/* JNE rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_ne),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jne,
-	},
-
-	/* JBE rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_be),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jbe,
-	},
-
-	/* JA rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_a),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_ja,
-	},
-
-	/* JS rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_s),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_js,
-	},
-
-	/* JNS rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_ns),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jns,
-	},
-
-	/* JP rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_p),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jp,
-	},
-
-	/* JNP rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_np),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jnp,
-	},
-
-	/* JL rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_l),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jl,
-	},
-
-	/* JNL rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_nl),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jnl,
-	},
-
-	/* JLE rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_le),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jle,
-	},
-
-	/* JG rel8 */ {
-		.opcode = {
-			.bits = x8616_enc_jcc(x8616_cc_g),
-			.mask = X8616_OPCODE_MASK,
-		},
-		.operands = { x8616_operand_rel8 },
-		.op = x8616_op_jg,
-	},
 
 	/* LOOPNZ rel8 */ {
 		.opcode = {
diff --git a/code/8086/gen/decoder_table.h b/code/8086/gen/decoder_table.h
index 4331387..eb4f8e4 100644
--- a/code/8086/gen/decoder_table.h
+++ b/code/8086/gen/decoder_table.h
@@ -4,359 +4,259 @@
 #	include "dsl.h"
 #endif
 
-RO_ global X8616_DecodePlan x8616_decode_plans[132] =
+RO_ global X8616_DecodePlan x8616_decode_plans[96] =
 {
-	{ 0x0000, 0x00, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x02, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x02, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, },
-	{ 0x0110, 0x02, 0x00, 0x00, {0x03, 0x07}, 2, 1, 0, 0, 3, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0018, 0x02, 0x00, 0x00, {0x06, 0x0a}, 2, 4, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x040a, 0x02, 0x00, 0x02, {0x01, 0x04}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x20}, {0x00, 0x00}, },
-	{ 0x0402, 0x0b, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x30, 0x38}, {0x00, 0x00}, },
-	{ 0x0100, 0x0b, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0200, 0x0b, 0x00, 0x02, {0x05, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 3, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x0c, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, },
-	{ 0x0100, 0x0c, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0200, 0x0c, 0x00, 0x02, {0x05, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 3, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x0d, 0x00, 0x00, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0100, 0x0d, 0x00, 0x02, {0x06, 0x03}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x0e, 0x00, 0x00, {0x06, 0x08}, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x0e, 0x00, 0x00, {0x06, 0x0e}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x0f, 0x00, 0x00, {0x08, 0x06}, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x0f, 0x00, 0x00, {0x0e, 0x06}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x10, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x11, 0x00, 0x02, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x12, 0x00, 0x02, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x13, 0x00, 0x02, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x14, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x15, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x16, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x17, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x03, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0432, 0x03, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x03, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x04, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x04, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x08, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x04, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x05, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0432, 0x05, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, {0x10, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x05, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x06, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0432, 0x06, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, {0x18, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x06, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x07, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x07, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x20, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x07, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x08, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0432, 0x08, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, {0x28, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x08, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x09, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x09, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x30, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x09, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x041a, 0x0a, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0432, 0x0a, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, {0x38, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x0a, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x18, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, },
-	{ 0x0100, 0x18, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x19, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x1a, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x1b, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x08, 0x38}, {0x00, 0x00}, },
-	{ 0x0100, 0x1b, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x1c, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x18, 0x38}, {0x00, 0x00}, },
-	{ 0x0412, 0x1f, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x20, 0x38}, {0x00, 0x00}, },
-	{ 0x0412, 0x20, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x28, 0x38}, {0x00, 0x00}, },
-	{ 0x0412, 0x22, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x30, 0x38}, {0x00, 0x00}, },
-	{ 0x0412, 0x23, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x38, 0x38}, {0x00, 0x00}, },
-	{ 0x0412, 0x27, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x10, 0x38}, {0x00, 0x00}, },
-	{ 0x0000, 0x1d, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x1e, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0004, 0x21, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x0a, 0xff}, },
-	{ 0x0004, 0x24, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x0a, 0xff}, },
-	{ 0x0000, 0x25, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x26, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0452, 0x2b, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, },
-	{ 0x0452, 0x2c, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x08, 0x38}, {0x00, 0x00}, },
-	{ 0x0452, 0x2d, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x10, 0x38}, {0x00, 0x00}, },
-	{ 0x0452, 0x2e, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x18, 0x38}, {0x00, 0x00}, },
-	{ 0x0452, 0x28, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x20, 0x38}, {0x00, 0x00}, },
-	{ 0x0452, 0x29, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x28, 0x38}, {0x00, 0x00}, },
-	{ 0x0452, 0x2a, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x38, 0x38}, {0x00, 0x00}, },
-	{ 0x0412, 0x2f, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0412, 0x2f, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, },
-	{ 0x0010, 0x2f, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0880, 0x30, 0x02, 0x00, {0x00, 0x00}, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x31, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x32, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x33, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x34, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0010, 0x35, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0800, 0x5b, 0x02, 0x00, {0x00, 0x00}, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0a00, 0x5c, 0x02, 0x00, {0x00, 0x00}, 0, 0, 3, 0, 0, 0, 0, 0, 0, 3, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x36, 0x00, 0x00, {0x0c, 0x00}, 1, 6, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x36, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x10, 0x38}, {0x00, 0x00}, },
-	{ 0x0000, 0x36, 0x01, 0x00, {0x0d, 0x00}, 1, 7, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x36, 0x01, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x18, 0x38}, {0x00, 0x00}, },
-	{ 0x0000, 0x37, 0x00, 0x00, {0x0c, 0x00}, 1, 6, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x37, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x37, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x20, 0x38}, {0x00, 0x00}, },
-	{ 0x0000, 0x37, 0x01, 0x00, {0x0d, 0x00}, 1, 7, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0402, 0x37, 0x01, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x28, 0x38}, {0x00, 0x00}, },
-	{ 0x0000, 0x38, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x38, 0x00, 0x00, {0x09, 0x00}, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x39, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x39, 0x00, 0x00, {0x09, 0x00}, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x40, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x48, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x3d, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x45, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x3a, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x42, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x3e, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x46, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x41, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x49, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x3f, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x47, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x3b, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x43, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x3c, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x44, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x4c, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x4b, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x4a, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x4d, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x4e, 0x00, 0x00, {0x08, 0x00}, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x4f, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x50, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x51, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x52, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x53, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x54, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x55, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x56, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x57, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x58, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x59, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
-	{ 0x0000, 0x5a, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, },
+	{ 0x0000, 0x00, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x041a, 0x02, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x02, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0110, 0x02, 0x00, 0x00, {0x03, 0x07}, 2, 1, 0, 0, 3, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0018, 0x02, 0x00, 0x00, {0x06, 0x0a}, 2, 4, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x040a, 0x02, 0x00, 0x02, {0x01, 0x04}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x20}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x0b, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x30, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0100, 0x0b, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0200, 0x0b, 0x00, 0x02, {0x05, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 3, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x0c, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0100, 0x0c, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0200, 0x0c, 0x00, 0x02, {0x05, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 3, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x0d, 0x00, 0x00, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0100, 0x0d, 0x00, 0x02, {0x06, 0x03}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x0e, 0x00, 0x00, {0x06, 0x08}, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x0e, 0x00, 0x00, {0x06, 0x0e}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x0f, 0x00, 0x00, {0x08, 0x06}, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x0f, 0x00, 0x00, {0x0e, 0x06}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x10, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x11, 0x00, 0x02, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x12, 0x00, 0x02, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x13, 0x00, 0x02, {0x02, 0x01}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x14, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x15, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x16, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x17, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x141a, 0x00, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 3, 0, },
+	{ 0x1010, 0x00, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 3, 0, },
+	{ 0x5432, 0x00, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 1, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 3, 0, },
+	{ 0x0412, 0x18, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0100, 0x18, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x19, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x1a, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x1b, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x08, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0100, 0x1b, 0x00, 0x02, {0x03, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x1c, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x18, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x1f, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x20, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x20, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x28, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x22, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x30, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x23, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x38, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x27, 0x00, 0x00, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x10, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x1d, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x1e, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0004, 0x21, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x0a, 0xff}, 0, 0, },
+	{ 0x0004, 0x24, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x0a, 0xff}, 0, 0, },
+	{ 0x0000, 0x25, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x26, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0452, 0x2b, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0452, 0x2c, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x08, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0452, 0x2d, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x10, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0452, 0x2e, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x18, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0452, 0x28, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x20, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0452, 0x29, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x28, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0452, 0x2a, 0x00, 0x00, {0x01, 0x0f}, 2, 0, 0, 0, 0, 0, 1, 0, 0, 0, {0x38, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x2f, 0x00, 0x00, {0x01, 0x02}, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0412, 0x2f, 0x00, 0x00, {0x01, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x2f, 0x00, 0x00, {0x06, 0x07}, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0880, 0x30, 0x02, 0x00, {0x00, 0x00}, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x31, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x32, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x33, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x34, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0010, 0x35, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0800, 0x5b, 0x02, 0x00, {0x00, 0x00}, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0a00, 0x5c, 0x02, 0x00, {0x00, 0x00}, 0, 0, 3, 0, 0, 0, 0, 0, 0, 3, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x36, 0x00, 0x00, {0x0c, 0x00}, 1, 6, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x36, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x10, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x36, 0x01, 0x00, {0x0d, 0x00}, 1, 7, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x36, 0x01, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x18, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x37, 0x00, 0x00, {0x0c, 0x00}, 1, 6, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x37, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x37, 0x00, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x20, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x37, 0x01, 0x00, {0x0d, 0x00}, 1, 7, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0402, 0x37, 0x01, 0x02, {0x01, 0x00}, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x28, 0x38}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x38, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x38, 0x00, 0x00, {0x09, 0x00}, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x39, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x39, 0x00, 0x00, {0x09, 0x00}, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x2000, 0x00, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x4c, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x4b, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x4a, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x4d, 0x00, 0x00, {0x0b, 0x00}, 1, 5, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x4e, 0x00, 0x00, {0x08, 0x00}, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x4f, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x50, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x51, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x52, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x53, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x54, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x55, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x56, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x57, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x58, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x59, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
+	{ 0x0000, 0x5a, 0x00, 0x00, {0x00, 0x00}, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0x00, 0x00}, {0x00, 0x00}, 0, 0, },
 };
 
 RO_ global U2 x8616_decode_dispatch[256] =
 {
-	0x001a, 0x001a, 0x001a, 0x001a, 0x001c, 0x001c, 0x0008, 0x000b, 0x001d, 0x001d, 0x001d, 0x001d, 0x001f, 0x001f, 0x0008, 0x000b,
-	0x0020, 0x0020, 0x0020, 0x0020, 0x0022, 0x0022, 0x0008, 0x000b, 0x0023, 0x0023, 0x0023, 0x0023, 0x0025, 0x0025, 0x0008, 0x000b,
-	0x0026, 0x0026, 0x0026, 0x0026, 0x0028, 0x0028, 0x0055, 0x0035, 0x0029, 0x0029, 0x0029, 0x0029, 0x002b, 0x002b, 0x0055, 0x003f,
-	0x002c, 0x002c, 0x002c, 0x002c, 0x002e, 0x002e, 0x0055, 0x0034, 0x002f, 0x002f, 0x002f, 0x002f, 0x0031, 0x0031, 0x0055, 0x003e,
-	0x0033, 0x0033, 0x0033, 0x0033, 0x0033, 0x0033, 0x0033, 0x0033, 0x0037, 0x0037, 0x0037, 0x0037, 0x0037, 0x0037, 0x0037, 0x0037,
+	0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0008, 0x000b, 0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0008, 0x000b,
+	0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0008, 0x000b, 0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0008, 0x000b,
+	0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0040, 0x0020, 0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0040, 0x002a,
+	0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0040, 0x001f, 0x001a, 0x001a, 0x001a, 0x001a, 0x001b, 0x001b, 0x0040, 0x0029,
+	0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x001e, 0x0022, 0x0022, 0x0022, 0x0022, 0x0022, 0x0022, 0x0022, 0x0022,
 	0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x000a, 0x000a, 0x000a, 0x000a, 0x000a, 0x000a, 0x000a, 0x000a,
 	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-	0x0063, 0x0064, 0x0065, 0x0066, 0x0067, 0x0068, 0x0069, 0x006a, 0x006b, 0x006c, 0x006d, 0x006e, 0x006f, 0x0070, 0x0071, 0x0072,
-	0x8000, 0x8100, 0x8200, 0x8300, 0x004b, 0x004b, 0x000c, 0x000c, 0x0001, 0x0001, 0x0001, 0x0001, 0x0005, 0x0013, 0x0005, 0x0009,
-	0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x0042, 0x0043, 0x0058, 0x0083, 0x0018, 0x0019, 0x0017, 0x0016,
-	0x0004, 0x0004, 0x0004, 0x0004, 0x004f, 0x004f, 0x0050, 0x0050, 0x004d, 0x004d, 0x0053, 0x0053, 0x0052, 0x0052, 0x0051, 0x0051,
+	0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e, 0x004e,
+	0x001c, 0x001c, 0x001c, 0x001c, 0x0036, 0x0036, 0x000c, 0x000c, 0x0001, 0x0001, 0x0001, 0x0001, 0x0005, 0x0013, 0x0005, 0x0009,
+	0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x000d, 0x002d, 0x002e, 0x0043, 0x005f, 0x0018, 0x0019, 0x0017, 0x0016,
+	0x0004, 0x0004, 0x0004, 0x0004, 0x003a, 0x003a, 0x003b, 0x003b, 0x0038, 0x0038, 0x003e, 0x003e, 0x003d, 0x003d, 0x003c, 0x003c,
 	0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
-	0x0000, 0x0000, 0x0060, 0x005f, 0x0015, 0x0014, 0x0002, 0x0002, 0x0000, 0x0000, 0x0062, 0x0061, 0x0078, 0x0077, 0x0079, 0x007a,
-	0x8400, 0x8500, 0x8600, 0x8700, 0x0040, 0x0041, 0x0000, 0x0012, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-	0x0073, 0x0074, 0x0075, 0x0076, 0x000e, 0x000e, 0x0010, 0x0010, 0x0056, 0x005a, 0x005d, 0x005b, 0x000f, 0x000f, 0x0011, 0x0011,
-	0x0054, 0x0000, 0x004e, 0x004e, 0x0082, 0x007c, 0x8800, 0x8900, 0x007b, 0x007d, 0x0080, 0x0081, 0x007e, 0x007f, 0x8a00, 0x8b00,
+	0x0000, 0x0000, 0x004b, 0x004a, 0x0015, 0x0014, 0x0002, 0x0002, 0x0000, 0x0000, 0x004d, 0x004c, 0x0054, 0x0053, 0x0055, 0x0056,
+	0x8000, 0x8100, 0x8200, 0x8300, 0x002b, 0x002c, 0x0000, 0x0012, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x004f, 0x0050, 0x0051, 0x0052, 0x000e, 0x000e, 0x0010, 0x0010, 0x0041, 0x0045, 0x0048, 0x0046, 0x000f, 0x000f, 0x0011, 0x0011,
+	0x003f, 0x0000, 0x0039, 0x0039, 0x005e, 0x0058, 0x8400, 0x8500, 0x0057, 0x0059, 0x005c, 0x005d, 0x005a, 0x005b, 0x8600, 0x8700,
 };
 
-RO_ global U1 x8616_decode_aux[3072] =
+RO_ global U1 x8616_decode_aux[2048] =
 {
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
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-	0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,
-	0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e,
+	0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21,
+	0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44,
+	0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49,
 	0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-	0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,
-	0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e,
+	0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21,
+	0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44,
+	0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49,
 	0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-	0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,
-	0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e,
+	0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21,
+	0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44,
+	0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49,
 	0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 };
 
 enum {
- 	X8616_DECODE_PLAN_COUNT = 132,
- 	X8616_DECODE_AUX_COUNT = 3072, 
+ 	X8616_DECODE_PLAN_COUNT = 96,
+ 	X8616_DECODE_AUX_COUNT = 2048, 
 };