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correct terminology

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ed
2026-09-09 16:30:11 -04:00
parent f2a8f6d2cf
commit 7daa333a71
3 changed files with 96 additions and 96 deletions
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code/8086/encoder.h
+56 -56
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@@ -549,42 +549,42 @@ enum {
X8616_OPCODE_DW_W_SHIFT = 0, X8616_OPCODE_DW_W_SHIFT = 0,
X8616_OPCODE_DW_D_SHIFT = 1, X8616_OPCODE_DW_D_SHIFT = 1,
X8616_OPCODE_DW_PREFIX_SHIFT = X8616_OPCODE_DW_D_SHIFT + 1, X8616_OPCODE_DW_HOLE = X8616_OPCODE_DW_D_SHIFT + 1,
X8616_OPCODE_DW_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_DW_PREFIX_SHIFT), X8616_OPCODE_DW_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_DW_HOLE),
// ... s w // ... s w
X8616_OPCODE_SW_W_SHIFT = 0, X8616_OPCODE_SW_W_SHIFT = 0,
X8616_OPCODE_SW_S_SHIFT = 1, X8616_OPCODE_SW_S_SHIFT = 1,
X8616_OPCODE_SW_PREFIX_SHIFT = X8616_OPCODE_SW_S_SHIFT + 1, X8616_OPCODE_SW_HOLE = X8616_OPCODE_SW_S_SHIFT + 1,
X8616_OPCODE_SW_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_SW_PREFIX_SHIFT), X8616_OPCODE_SW_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_SW_HOLE),
// ... v w // ... v w
X8616_OPCODE_VW_W_SHIFT = 0, X8616_OPCODE_VW_W_SHIFT = 0,
X8616_OPCODE_VW_V_SHIFT = 1, X8616_OPCODE_VW_V_SHIFT = 1,
X8616_OPCODE_VW_PREFIX_SHIFT = X8616_OPCODE_VW_V_SHIFT + 1, X8616_OPCODE_VW_HOLE = X8616_OPCODE_VW_V_SHIFT + 1,
X8616_OPCODE_VW_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_VW_PREFIX_SHIFT), X8616_OPCODE_VW_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_VW_HOLE),
// ... z // ... z
X8616_OPCODE_Z_Z_SHIFT = 0, X8616_OPCODE_Z_Z_SHIFT = 0,
X8616_OPCODE_Z_PREFIX_SHIFT = X8616_OPCODE_Z_Z_SHIFT + 1, X8616_OPCODE_Z_HOLE = X8616_OPCODE_Z_Z_SHIFT + 1,
X8616_OPCODE_Z_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_Z_PREFIX_SHIFT), X8616_OPCODE_Z_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_Z_HOLE),
// ... w // ... w
X8616_OPCODE_W_W_SHIFT = 0, X8616_OPCODE_W_W_SHIFT = 0,
X8616_OPCODE_W_PREFIX_SHIFT = X8616_OPCODE_W_W_SHIFT + 1, X8616_OPCODE_W_HOLE = X8616_OPCODE_W_W_SHIFT + 1,
X8616_OPCODE_W_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_W_PREFIX_SHIFT), X8616_OPCODE_W_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_W_HOLE),
// ... reg // ... reg
X8616_OPCODE_REG_REG_SHIFT = 0, X8616_OPCODE_REG_REG_SHIFT = 0,
X8616_OPCODE_REG_REG_WIDTH = 3, X8616_OPCODE_REG_REG_WIDTH = 3,
X8616_OPCODE_REG_REG_MASK = x8616_field_mask(X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH), X8616_OPCODE_REG_REG_MASK = x8616_field_mask(X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH),
X8616_OPCODE_REG_PREFIX_SHIFT = X8616_OPCODE_REG_REG_SHIFT + X8616_OPCODE_REG_REG_WIDTH, X8616_OPCODE_REG_HOLE = X8616_OPCODE_REG_REG_SHIFT + X8616_OPCODE_REG_REG_WIDTH,
X8616_OPCODE_REG_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_REG_PREFIX_SHIFT), X8616_OPCODE_REG_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_REG_HOLE),
// ... w reg // ... w reg
@@ -593,14 +593,14 @@ enum {
X8616_OPCODE_WREG_REG_MASK = x8616_field_mask(X8616_OPCODE_WREG_REG_SHIFT, X8616_OPCODE_WREG_REG_WIDTH), X8616_OPCODE_WREG_REG_MASK = x8616_field_mask(X8616_OPCODE_WREG_REG_SHIFT, X8616_OPCODE_WREG_REG_WIDTH),
X8616_OPCODE_WREG_W_SHIFT = X8616_OPCODE_WREG_REG_SHIFT + X8616_OPCODE_WREG_REG_WIDTH, X8616_OPCODE_WREG_W_SHIFT = X8616_OPCODE_WREG_REG_SHIFT + X8616_OPCODE_WREG_REG_WIDTH,
X8616_OPCODE_WREG_W_MASK = x8616_field_mask(X8616_OPCODE_WREG_W_SHIFT, 1), X8616_OPCODE_WREG_W_MASK = x8616_field_mask(X8616_OPCODE_WREG_W_SHIFT, 1),
X8616_OPCODE_WREG_PREFIX_SHIFT = X8616_OPCODE_WREG_W_SHIFT + 1, X8616_OPCODE_WREG_HOLE = X8616_OPCODE_WREG_W_SHIFT + 1,
X8616_OPCODE_WREG_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_WREG_PREFIX_SHIFT), X8616_OPCODE_WREG_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_WREG_HOLE),
// ... d 0 (bit 0 fixed, bit 1 = d, bits 7-2 = stem) // ... d 0 (bit 0 fixed, bit 1 = d, bits 7-2 = stem)
X8616_OPCODE_D0_D_SHIFT = 1, X8616_OPCODE_D0_D_SHIFT = 1,
X8616_OPCODE_D0_PREFIX_SHIFT = X8616_OPCODE_D0_D_SHIFT + 1, X8616_OPCODE_D0_HOLE = X8616_OPCODE_D0_D_SHIFT + 1,
X8616_OPCODE_D0_PREFIX_MASK = x8616_header_opcode_mask(X8616_OPCODE_D0_PREFIX_SHIFT) | x8616_field_mask(0, 1), X8616_OPCODE_D0_OPCODE_MASK = x8616_header_opcode_mask(X8616_OPCODE_D0_HOLE) | x8616_field_mask(0, 1),
// class(3) | sr(2) | low(3) // class(3) | sr(2) | low(3)
@@ -618,7 +618,7 @@ enum {
X8616_OPCODE_CC_SHIFT = 0, X8616_OPCODE_CC_SHIFT = 0,
X8616_OPCODE_CC_WIDTH = 4, X8616_OPCODE_CC_WIDTH = 4,
X8616_OPCODE_CC_MASK = x8616_field_mask(X8616_OPCODE_CC_SHIFT, X8616_OPCODE_CC_WIDTH), X8616_OPCODE_CC_MASK = x8616_field_mask(X8616_OPCODE_CC_SHIFT, X8616_OPCODE_CC_WIDTH),
X8616_OPCODE_CC_PREFIX_SHIFT = X8616_OPCODE_CC_WIDTH, X8616_OPCODE_CC_HOLE = X8616_OPCODE_CC_WIDTH,
// 00 ttt ... // 00 ttt ...
@@ -635,16 +635,16 @@ enum {
X8616_OPCODE_PAIR_SHIFT = 3, X8616_OPCODE_PAIR_SHIFT = 3,
X8616_OPCODE_PAIR_WIDTH = 1, X8616_OPCODE_PAIR_WIDTH = 1,
X8616_OPCODE_PAIR_REG_PREFIX_SHIFT = X8616_OPCODE_PAIR_SHIFT + X8616_OPCODE_PAIR_WIDTH, X8616_OPCODE_PAIR_REG_HOLE = X8616_OPCODE_PAIR_SHIFT + X8616_OPCODE_PAIR_WIDTH,
X8616_OPCODE_IO_CLASS = 0b1110, X8616_OPCODE_IO_CLASS = 0b1110,
X8616_OPCODE_IO_CLASS_SHIFT = 4, X8616_OPCODE_IO_CLASS_SHIFT = 4,
X8616_OPCODE_IO_DX_SHIFT = 3, X8616_OPCODE_IO_DX_SHIFT = 3,
X8616_OPCODE_IO_FIXED_SHIFT = 2, X8616_OPCODE_IO_FIXED_SHIFT = 2,
X8616_OPCODE_IO_OUT_SHIFT = 1, X8616_OPCODE_IO_OUT_SHIFT = 1,
X8616_OPCODE_IO_FIXED_FORM = 0b10, X8616_OPCODE_IO_FIXED_FORM = 0b10,
X8616_OPCODE_IO_CLASS_STEM_SHIFT = X8616_OPCODE_IO_CLASS_SHIFT - X8616_OPCODE_W_PREFIX_SHIFT, X8616_OPCODE_IO_CLASS_STEM_SHIFT = X8616_OPCODE_IO_CLASS_SHIFT - X8616_OPCODE_W_HOLE,
X8616_OPCODE_IO_DX_STEM_SHIFT = X8616_OPCODE_IO_DX_SHIFT - X8616_OPCODE_W_PREFIX_SHIFT, X8616_OPCODE_IO_DX_STEM_SHIFT = X8616_OPCODE_IO_DX_SHIFT - X8616_OPCODE_W_HOLE,
X8616_OPCODE_IO_OUT_STEM_SHIFT = X8616_OPCODE_IO_OUT_SHIFT - X8616_OPCODE_W_PREFIX_SHIFT, X8616_OPCODE_IO_OUT_STEM_SHIFT = X8616_OPCODE_IO_OUT_SHIFT - X8616_OPCODE_W_HOLE,
}; };
// ============================================================================ // ============================================================================
@@ -674,14 +674,14 @@ FI_ U1 x8616_modrm_sr (U1 modrm) { return (
// Byte fields // Byte fields
#define x8616_enc_dw_prefix(prefix) ((prefix) << X8616_OPCODE_DW_PREFIX_SHIFT) #define x8616_enc_dw_opcode(opcode) ((opcode) << X8616_OPCODE_DW_HOLE)
#define x8616_enc_sw_prefix(prefix) ((prefix) << X8616_OPCODE_SW_PREFIX_SHIFT) #define x8616_enc_sw_opcode(opcode) ((opcode) << X8616_OPCODE_SW_HOLE)
#define x8616_enc_vw_prefix(prefix) ((prefix) << X8616_OPCODE_VW_PREFIX_SHIFT) #define x8616_enc_vw_opcode(opcode) ((opcode) << X8616_OPCODE_VW_HOLE)
#define x8616_enc_z_prefix(prefix) ((prefix) << X8616_OPCODE_Z_PREFIX_SHIFT) #define x8616_enc_z_opcode(opcode) ((opcode) << X8616_OPCODE_Z_HOLE)
#define x8616_enc_w_prefix(prefix) ((prefix) << X8616_OPCODE_W_PREFIX_SHIFT) #define x8616_enc_w_opcode(opcode) ((opcode) << X8616_OPCODE_W_HOLE)
#define x8616_enc_reg_prefix(prefix) ((prefix) << X8616_OPCODE_REG_PREFIX_SHIFT) #define x8616_enc_reg_opcode(opcode) ((opcode) << X8616_OPCODE_REG_HOLE)
#define x8616_enc_wreg_prefix(prefix) ((prefix) << X8616_OPCODE_WREG_PREFIX_SHIFT) #define x8616_enc_wreg_opcode(opcode) ((opcode) << X8616_OPCODE_WREG_HOLE)
#define x8616_enc_d0_prefix(prefix) ((prefix) << X8616_OPCODE_D0_PREFIX_SHIFT) #define x8616_enc_d0_opcode(opcode) ((opcode) << X8616_OPCODE_D0_HOLE)
#define x8616_enc_d(d) ((d) << X8616_OPCODE_DW_D_SHIFT) #define x8616_enc_d(d) ((d) << X8616_OPCODE_DW_D_SHIFT)
#define x8616_enc_s(s) ((s) << X8616_OPCODE_SW_S_SHIFT) #define x8616_enc_s(s) ((s) << X8616_OPCODE_SW_S_SHIFT)
@@ -698,22 +698,22 @@ FI_ U1 x8616_modrm_sr (U1 modrm) { return (
#define x8616_enc_modrm_rm(rm) ((rm) << X8616_MODRM_RM_SHIFT) #define x8616_enc_modrm_rm(rm) ((rm) << X8616_MODRM_RM_SHIFT)
#define x8616_enc_modrm_sr(sr) ((sr) << X8616_MODRM_SR_SHIFT) #define x8616_enc_modrm_sr(sr) ((sr) << X8616_MODRM_SR_SHIFT)
#define x8616_enc_dw(prefix,d,w) C_(U1, x8616_enc_dw_prefix(prefix) | x8616_enc_d(d) | x8616_enc_width(w)) #define x8616_enc_dw(opcode,d,w) C_(U1, x8616_enc_dw_opcode(opcode) | x8616_enc_d(d) | x8616_enc_width(w))
#define x8616_enc_sw(prefix,s,w) C_(U1, x8616_enc_sw_prefix(prefix) | x8616_enc_s(s) | x8616_enc_width(w)) #define x8616_enc_sw(opcode,s,w) C_(U1, x8616_enc_sw_opcode(opcode) | x8616_enc_s(s) | x8616_enc_width(w))
#define x8616_enc_vw(prefix,v,w) C_(U1, x8616_enc_vw_prefix(prefix) | x8616_enc_v(v) | x8616_enc_width(w)) #define x8616_enc_vw(opcode,v,w) C_(U1, x8616_enc_vw_opcode(opcode) | x8616_enc_v(v) | x8616_enc_width(w))
#define x8616_enc_zp(prefix,z) C_(U1, x8616_enc_z_prefix(prefix) | x8616_enc_z(z)) #define x8616_enc_zp(opcode,z) C_(U1, x8616_enc_z_opcode(opcode) | x8616_enc_z(z))
#define x8616_enc_w(prefix,w) C_(U1, x8616_enc_w_prefix(prefix) | x8616_enc_width(w)) #define x8616_enc_w(opcode,w) C_(U1, x8616_enc_w_opcode(opcode) | x8616_enc_width(w))
#define x8616_enc_reg(prefix,reg) C_(U1, x8616_enc_reg_prefix(prefix) | x8616_enc_opcode_reg(reg)) #define x8616_enc_reg(opcode,reg) C_(U1, x8616_enc_reg_opcode(opcode) | x8616_enc_opcode_reg(reg))
#define x8616_enc_wreg(prefix,w,reg) C_(U1, x8616_enc_wreg_prefix(prefix) | x8616_enc_wreg_width(w) | x8616_enc_opcode_reg(reg)) #define x8616_enc_wreg(opcode,w,reg) C_(U1, x8616_enc_wreg_opcode(opcode) | x8616_enc_wreg_width(w) | x8616_enc_opcode_reg(reg))
#define x8616_enc_d0(prefix,d) C_(U1, x8616_enc_d0_prefix(prefix) | x8616_enc_d(d)) #define x8616_enc_d0(opcode,d) C_(U1, x8616_enc_d0_opcode(opcode) | x8616_enc_d(d))
#define x8616_enc_sr(class,sr,low) C_(U1, ((class) << X8616_OPCODE_SR_CLASS_SHIFT) | x8616_enc_opcode_sr(sr) | (low)) #define x8616_enc_sr(class,sr,low) C_(U1, ((class) << X8616_OPCODE_SR_CLASS_SHIFT) | x8616_enc_opcode_sr(sr) | (low))
#define x8616_enc_jcc(cc) C_(U1, (x8616_opcode_jcc << X8616_OPCODE_CC_PREFIX_SHIFT) | x8616_enc_cc(cc)) #define x8616_enc_jcc(cc) C_(U1, (x8616_opcode_jcc << X8616_OPCODE_CC_HOLE) | x8616_enc_cc(cc))
#define x8616_enc_modrm(mod,reg,rm) C_(U1, x8616_enc_modrm_mod(mod) | x8616_enc_modrm_reg(reg) | x8616_enc_modrm_rm(rm)) #define x8616_enc_modrm(mod,reg,rm) C_(U1, x8616_enc_modrm_mod(mod) | x8616_enc_modrm_reg(reg) | x8616_enc_modrm_rm(rm))
#define x8616_enc_modrm_seg(mod,sr,rm) C_(U1, x8616_enc_modrm_mod(mod) | x8616_enc_modrm_sr(sr) | x8616_enc_modrm_rm(rm)) #define x8616_enc_modrm_seg(mod,sr,rm) C_(U1, x8616_enc_modrm_mod(mod) | x8616_enc_modrm_sr(sr) | x8616_enc_modrm_rm(rm))
#define x8616_header_w(opcode,w) ((X8616_BytePattern){ x8616_enc_w((opcode), (w)), X8616_BYTE_MASK }) #define x8616_header_w(opcode,w) ((X8616_BytePattern){ x8616_enc_w((opcode), (w)), X8616_BYTE_MASK })
#define x8616_header_sr(class,low) ((X8616_BytePattern){ u1_(((class) << X8616_OPCODE_SR_CLASS_SHIFT) | (low)), X8616_OPCODE_SR_PATTERN_MASK }) #define x8616_header_sr(class,low) ((X8616_BytePattern){ u1_(((class) << X8616_OPCODE_SR_CLASS_SHIFT) | (low)), X8616_OPCODE_SR_PATTERN_MASK })
#define x8616_header_d0(opcode) ((X8616_BytePattern){ u1_((opcode) << X8616_OPCODE_D0_PREFIX_SHIFT), X8616_OPCODE_D0_PREFIX_MASK }) #define x8616_header_d0(opcode) ((X8616_BytePattern){ u1_((opcode) << X8616_OPCODE_D0_HOLE), X8616_OPCODE_D0_OPCODE_MASK })
#define x8616_enc_alu_class() (X8616_OPCODE_ALU_CLASS << X8616_OPCODE_ALU_CLASS_SHIFT) #define x8616_enc_alu_class() (X8616_OPCODE_ALU_CLASS << X8616_OPCODE_ALU_CLASS_SHIFT)
#define x8616_enc_alu_ttt(ttt) ((ttt) << X8616_OPCODE_ALU_TTT_SHIFT) #define x8616_enc_alu_ttt(ttt) ((ttt) << X8616_OPCODE_ALU_TTT_SHIFT)
@@ -724,7 +724,7 @@ FI_ U1 x8616_modrm_sr (U1 modrm) { return (
#define x8616_enc_io_dx(dx) ((dx) << X8616_OPCODE_IO_DX_STEM_SHIFT) #define x8616_enc_io_dx(dx) ((dx) << X8616_OPCODE_IO_DX_STEM_SHIFT)
#define x8616_enc_io_out(out) ((out) << X8616_OPCODE_IO_OUT_STEM_SHIFT) #define x8616_enc_io_out(out) ((out) << X8616_OPCODE_IO_OUT_STEM_SHIFT)
#define x8616_enc_io_stem(dx, out) (x8616_enc_io_class() | x8616_enc_io_dx(dx) | X8616_OPCODE_IO_FIXED_FORM | x8616_enc_io_out(out)) #define x8616_enc_io_stem(dx, out) (x8616_enc_io_class() | x8616_enc_io_dx(dx) | X8616_OPCODE_IO_FIXED_FORM | x8616_enc_io_out(out))
#define x8616_enc_io(dx, out, w) C_(U1, (x8616_enc_io_stem(dx, out) << X8616_OPCODE_W_PREFIX_SHIFT) | x8616_enc_width(w)) #define x8616_enc_io(dx, out, w) C_(U1, (x8616_enc_io_stem(dx, out) << X8616_OPCODE_W_HOLE) | x8616_enc_width(w))
#define x8616_enc_pair(bit) ((bit) << X8616_OPCODE_PAIR_SHIFT) #define x8616_enc_pair(bit) ((bit) << X8616_OPCODE_PAIR_SHIFT)
// Scalar / generic packets // Scalar / generic packets
@@ -749,24 +749,24 @@ FI_ U1 x8616_modrm_sr (U1 modrm) { return (
// r/m + register / immediate packets // r/m + register / immediate packets
#define x8616_emit_rm_r(prefix,d,w,mod,reg,rm) x8616_enc_dw (prefix,d,w), x8616_enc_modrm(mod,reg,rm) #define x8616_emit_rm_r(opcode,d,w,mod,reg,rm) x8616_enc_dw (opcode,d,w), x8616_enc_modrm(mod,reg,rm)
#define x8616_emit_rm_r_d8(prefix,d,w,reg,rm,disp) x8616_emit_rm_r(prefix,d,w,x8616_mod_mem_d8, reg,rm), u1_(disp) #define x8616_emit_rm_r_d8(opcode,d,w,reg,rm,disp) x8616_emit_rm_r(opcode,d,w,x8616_mod_mem_d8, reg,rm), u1_(disp)
#define x8616_emit_rm_r_d16(prefix,d,w,reg,rm,disp) x8616_emit_rm_r(prefix,d,w,x8616_mod_mem_d16,reg,rm), x8616_emit_s2(disp) #define x8616_emit_rm_r_d16(opcode,d,w,reg,rm,disp) x8616_emit_rm_r(opcode,d,w,x8616_mod_mem_d16,reg,rm), x8616_emit_s2(disp)
#define x8616_emit_rm_r_direct(prefix,d,w,reg,addr) x8616_emit_rm_r(prefix,d,w,x8616_mod_mem,reg,x8616_ea_direct), x8616_emit_u2(addr) #define x8616_emit_rm_r_direct(opcode,d,w,reg,addr) x8616_emit_rm_r(opcode,d,w,x8616_mod_mem,reg,x8616_ea_direct), x8616_emit_u2(addr)
#define x8616_emit_rm_i8_w(prefix,ext,mod,rm,imm) x8616_enc_w(prefix,x8616_w_byte), x8616_enc_modrm(mod,ext,rm), u1_(imm) #define x8616_emit_rm_i8_w(opcode,ext,mod,rm,imm) x8616_enc_w(opcode,x8616_w_byte), x8616_enc_modrm(mod,ext,rm), u1_(imm)
#define x8616_emit_rm_i16_w(prefix,ext,mod,rm,imm) x8616_enc_w(prefix,x8616_w_word), x8616_enc_modrm(mod,ext,rm), x8616_emit_u2(imm) #define x8616_emit_rm_i16_w(opcode,ext,mod,rm,imm) x8616_enc_w(opcode,x8616_w_word), x8616_enc_modrm(mod,ext,rm), x8616_emit_u2(imm)
#define x8616_emit_rm_i8_w_d8(prefix,ext,rm,disp,imm) x8616_enc_w(prefix,x8616_w_byte), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), u1_(imm) #define x8616_emit_rm_i8_w_d8(opcode,ext,rm,disp,imm) x8616_enc_w(opcode,x8616_w_byte), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), u1_(imm)
#define x8616_emit_rm_i16_w_d8(prefix,ext,rm,disp,imm) x8616_enc_w(prefix,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), x8616_emit_u2(imm) #define x8616_emit_rm_i16_w_d8(opcode,ext,rm,disp,imm) x8616_enc_w(opcode,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), x8616_emit_u2(imm)
#define x8616_emit_rm_i8_w_d16(prefix,ext,rm,disp,imm) x8616_enc_w(prefix,x8616_w_byte), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), u1_(imm) #define x8616_emit_rm_i8_w_d16(opcode,ext,rm,disp,imm) x8616_enc_w(opcode,x8616_w_byte), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), u1_(imm)
#define x8616_emit_rm_i16_w_d16(prefix,ext,rm,disp,imm) x8616_enc_w(prefix,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), x8616_emit_u2(imm) #define x8616_emit_rm_i16_w_d16(opcode,ext,rm,disp,imm) x8616_enc_w(opcode,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), x8616_emit_u2(imm)
#define x8616_emit_rm_i8(prefix,s,w,ext,mod,rm,imm) x8616_enc_sw(prefix,s,w), x8616_enc_modrm(mod,ext,rm), u1_(imm) #define x8616_emit_rm_i8(opcode,s,w,ext,mod,rm,imm) x8616_enc_sw(opcode,s,w), x8616_enc_modrm(mod,ext,rm), u1_(imm)
#define x8616_emit_rm_i16(prefix,ext,mod,rm,imm) x8616_enc_sw(prefix,x8616_s_full,x8616_w_word), x8616_enc_modrm(mod,ext,rm), x8616_emit_u2(imm) #define x8616_emit_rm_i16(opcode,ext,mod,rm,imm) x8616_enc_sw(opcode,x8616_s_full,x8616_w_word), x8616_enc_modrm(mod,ext,rm), x8616_emit_u2(imm)
#define x8616_emit_rm_i8_d8(prefix,s,w,ext,rm,disp,imm) x8616_enc_sw(prefix,s,w), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), u1_(imm) #define x8616_emit_rm_i8_d8(opcode,s,w,ext,rm,disp,imm) x8616_enc_sw(opcode,s,w), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), u1_(imm)
#define x8616_emit_rm_i16_d8(prefix,ext,rm,disp,imm) x8616_enc_sw(prefix,x8616_s_full,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), x8616_emit_u2(imm) #define x8616_emit_rm_i16_d8(opcode,ext,rm,disp,imm) x8616_enc_sw(opcode,x8616_s_full,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d8,ext,rm), u1_(disp), x8616_emit_u2(imm)
#define x8616_emit_rm_i8_d16(prefix,s,w,ext,rm,disp,imm) x8616_enc_sw(prefix,s,w), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), u1_(imm) #define x8616_emit_rm_i8_d16(opcode,s,w,ext,rm,disp,imm) x8616_enc_sw(opcode,s,w), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), u1_(imm)
#define x8616_emit_rm_i16_d16(prefix,ext,rm,disp,imm) x8616_enc_sw(prefix,x8616_s_full,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), x8616_emit_u2(imm) #define x8616_emit_rm_i16_d16(opcode,ext,rm,disp,imm) x8616_enc_sw(opcode,x8616_s_full,x8616_w_word), x8616_enc_modrm(x8616_mod_mem_d16,ext,rm), x8616_emit_s2(disp), x8616_emit_u2(imm)
// Segment-register packet // Segment-register packet
code/8086/encoder_table.h
+34 -34
View File
@@ -19,7 +19,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
// MOV--------------------------------------------------------------------- // MOV---------------------------------------------------------------------
/* MOV: 100010 d w | mod reg r/m */ { /* MOV: 100010 d w | mod reg r/m */ {
.header = x8616_opc(x8616_opcode_mov_rm_r, X8616_OPCODE_DW_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_mov_rm_r, X8616_OPCODE_DW_HOLE),
.fields = { .fields = {
.d = { X8616_OPCODE_DW_D_SHIFT, 1 }, .d = { X8616_OPCODE_DW_D_SHIFT, 1 },
.w = { X8616_OPCODE_DW_W_SHIFT, 1 }, .w = { X8616_OPCODE_DW_W_SHIFT, 1 },
@@ -29,7 +29,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* MOV imm -> r/m: 1100011 w | mod 000 r/m */ { /* MOV imm -> r/m: 1100011 w | mod 000 r/m */ {
.header = x8616_opc(x8616_opcode_mov_rm_i, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_mov_rm_i, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_digit_0 << X8616_MODRM_REG_SHIFT, .bits = x8616_digit_0 << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -42,7 +42,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* MOV imm -> reg: 1011 w reg */ { /* MOV imm -> reg: 1011 w reg */ {
.header = x8616_opc(x8616_opcode_mov_r_i, X8616_OPCODE_WREG_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_mov_r_i, X8616_OPCODE_WREG_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_WREG_W_SHIFT, 1 }, .w = { X8616_OPCODE_WREG_W_SHIFT, 1 },
.reg = { X8616_OPCODE_WREG_REG_SHIFT, X8616_OPCODE_WREG_REG_WIDTH }, .reg = { X8616_OPCODE_WREG_REG_SHIFT, X8616_OPCODE_WREG_REG_WIDTH },
@@ -52,7 +52,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* MOV accumulator <-> direct memory: 101000 d w */ { /* MOV accumulator <-> direct memory: 101000 d w */ {
.header = x8616_opc(x8616_opcode_mov_acc_mem, X8616_OPCODE_DW_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_mov_acc_mem, X8616_OPCODE_DW_HOLE),
.fields = { .fields = {
.d = { X8616_OPCODE_DW_D_SHIFT, 1 }, .d = { X8616_OPCODE_DW_D_SHIFT, 1 },
.w = { X8616_OPCODE_DW_W_SHIFT, 1 }, .w = { X8616_OPCODE_DW_W_SHIFT, 1 },
@@ -92,7 +92,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* PUSH reg16: 01010 reg */ { /* PUSH reg16: 01010 reg */ {
.header = x8616_opc(x8616_opcode_push_reg, X8616_OPCODE_REG_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_push_reg, X8616_OPCODE_REG_HOLE),
.fields = { .fields = {
.reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH }, .reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH },
}, },
@@ -102,7 +102,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* POP reg16: 01011 reg */ { /* POP reg16: 01011 reg */ {
.header = x8616_opc(x8616_opcode_pop_reg, X8616_OPCODE_REG_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_pop_reg, X8616_OPCODE_REG_HOLE),
.fields = { .fields = {
.reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH }, .reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH },
}, },
@@ -145,7 +145,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* XCHG r/m,reg: 1000011 w | mod reg r/m */ { /* XCHG r/m,reg: 1000011 w | mod reg r/m */ {
.header = x8616_opc(x8616_opcode_xchg_rm_r, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_xchg_rm_r, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -154,7 +154,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* XCHG AX,reg16: 10010 reg (also encodes NOP at reg=AX) */ { /* XCHG AX,reg16: 10010 reg (also encodes NOP at reg=AX) */ {
.header = x8616_opc(x8616_opcode_xchg_ax_reg, X8616_OPCODE_REG_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_xchg_ax_reg, X8616_OPCODE_REG_HOLE),
.fields = { .fields = {
.reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH }, .reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH },
}, },
@@ -166,7 +166,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
// I/O / address / flags--------------------------------------------------- // I/O / address / flags---------------------------------------------------
/* IN acc,imm8: 1110 0 10 w */ { /* IN acc,imm8: 1110 0 10 w */ {
.header = x8616_opc(x8616_opcode_in_i, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_in_i, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -175,7 +175,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* IN acc,DX: 1110 1 10 w */ { /* IN acc,DX: 1110 1 10 w */ {
.header = x8616_opc(x8616_opcode_in_dx, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_in_dx, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -184,7 +184,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* OUT imm8,acc: 1110 0 11 w */ { /* OUT imm8,acc: 1110 0 11 w */ {
.header = x8616_opc(x8616_opcode_out_i, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_out_i, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -193,7 +193,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* OUT DX,acc: 1110 1 11 w */ { /* OUT DX,acc: 1110 1 11 w */ {
.header = x8616_opc(x8616_opcode_out_dx, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_out_dx, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -281,7 +281,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* ALU imm,r/m: 100000 s w /ttt */ { /* ALU imm,r/m: 100000 s w /ttt */ {
.header = x8616_opc(x8616_opcode_alu_rm_i, X8616_OPCODE_SW_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_alu_rm_i, X8616_OPCODE_SW_HOLE),
.fields = { .fields = {
.s = { X8616_OPCODE_SW_S_SHIFT, 1 }, .s = { X8616_OPCODE_SW_S_SHIFT, 1 },
.w = { X8616_OPCODE_SW_W_SHIFT, 1 }, .w = { X8616_OPCODE_SW_W_SHIFT, 1 },
@@ -295,7 +295,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
// INC / DEC / unary / adjust--------------------------------------------- // INC / DEC / unary / adjust---------------------------------------------
/* INC r/m: 1111111 w /0 */ { /* INC r/m: 1111111 w /0 */ {
.header = x8616_opc(x8616_opcode_incdec_rm, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_incdec_rm, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_inc << X8616_MODRM_REG_SHIFT, .bits = x8616_inc << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -308,7 +308,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* INC reg16: 01000 reg */ { /* INC reg16: 01000 reg */ {
.header = x8616_opc(x8616_opcode_inc_reg, X8616_OPCODE_REG_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_inc_reg, X8616_OPCODE_REG_HOLE),
.fields = { .fields = {
.reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH }, .reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH },
}, },
@@ -318,7 +318,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* DEC reg16: 01001 reg */ { /* DEC reg16: 01001 reg */ {
.header = x8616_opc(x8616_opcode_dec_reg, X8616_OPCODE_REG_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_dec_reg, X8616_OPCODE_REG_HOLE),
.fields = { .fields = {
.reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH }, .reg = { X8616_OPCODE_REG_REG_SHIFT, X8616_OPCODE_REG_REG_WIDTH },
}, },
@@ -338,7 +338,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* DEC r/m: 1111111 w /1 */ { /* DEC r/m: 1111111 w /1 */ {
.header = x8616_opc(x8616_opcode_incdec_rm, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_incdec_rm, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_dec << X8616_MODRM_REG_SHIFT, .bits = x8616_dec << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -353,7 +353,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
/* NEG r/m: 1111011 w /neg */ { /* NEG r/m: 1111011 w /neg */ {
.header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_g3_neg << X8616_MODRM_REG_SHIFT, .bits = x8616_g3_neg << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -366,7 +366,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* MUL r/m: 1111011 w /mul */ { /* MUL r/m: 1111011 w /mul */ {
.header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_g3_mul << X8616_MODRM_REG_SHIFT, .bits = x8616_g3_mul << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -379,7 +379,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* IMUL r/m: 1111011 w /imul */ { /* IMUL r/m: 1111011 w /imul */ {
.header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_g3_imul << X8616_MODRM_REG_SHIFT, .bits = x8616_g3_imul << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -392,7 +392,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* DIV r/m: 1111011 w /div */ { /* DIV r/m: 1111011 w /div */ {
.header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_g3_div << X8616_MODRM_REG_SHIFT, .bits = x8616_g3_div << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -405,7 +405,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* IDIV r/m: 1111011 w /idiv */ { /* IDIV r/m: 1111011 w /idiv */ {
.header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_g3_idiv << X8616_MODRM_REG_SHIFT, .bits = x8616_g3_idiv << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -418,7 +418,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* NOT r/m: 1111011 w /not */ { /* NOT r/m: 1111011 w /not */ {
.header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_g3_not << X8616_MODRM_REG_SHIFT, .bits = x8616_g3_not << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -471,7 +471,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
// Shift / rotate / TEST--------------------------------------------------- // Shift / rotate / TEST---------------------------------------------------
/* SHIFT/ROTATE r/m,1|CL: 110100 v w /ttt */ { /* SHIFT/ROTATE r/m,1|CL: 110100 v w /ttt */ {
.header = x8616_opc(x8616_opcode_shift_rm, X8616_OPCODE_VW_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_shift_rm, X8616_OPCODE_VW_HOLE),
.fields = { .fields = {
.v = { X8616_OPCODE_VW_V_SHIFT, 1 }, .v = { X8616_OPCODE_VW_V_SHIFT, 1 },
.w = { X8616_OPCODE_VW_W_SHIFT, 1 }, .w = { X8616_OPCODE_VW_W_SHIFT, 1 },
@@ -483,7 +483,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
/* TEST r/m,reg: 1000010 w */ { /* TEST r/m,reg: 1000010 w */ {
.header = x8616_opc(x8616_opcode_test_rm_r, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_test_rm_r, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -492,7 +492,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* TEST r/m,imm: 1111011 w /0 */ { /* TEST r/m,imm: 1111011 w /0 */ {
.header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_group3, X8616_OPCODE_W_HOLE),
.mod_rm = { .mod_rm = {
.bits = x8616_g3_test << X8616_MODRM_REG_SHIFT, .bits = x8616_g3_test << X8616_MODRM_REG_SHIFT,
.mask = X8616_MODRM_REG_MASK, .mask = X8616_MODRM_REG_MASK,
@@ -505,7 +505,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* TEST accumulator,imm: 1010100 w */ { /* TEST accumulator,imm: 1010100 w */ {
.header = x8616_opc(x8616_opcode_test_acc_i, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_test_acc_i, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -516,7 +516,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
// String / prefixes------------------------------------------------------- // String / prefixes-------------------------------------------------------
/* REP/REPNE prefix: 1111001 z */ { /* REP/REPNE prefix: 1111001 z */ {
.header = x8616_opc(x8616_opcode_rep, X8616_OPCODE_Z_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_rep, X8616_OPCODE_Z_HOLE),
.fields = { .fields = {
.z = { X8616_OPCODE_Z_Z_SHIFT, 1 }, .z = { X8616_OPCODE_Z_Z_SHIFT, 1 },
}, },
@@ -525,7 +525,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* MOVS: ... w */ { /* MOVS: ... w */ {
.header = x8616_opc(x8616_opcode_movs, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_movs, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -533,7 +533,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* CMPS: ... w */ { /* CMPS: ... w */ {
.header = x8616_opc(x8616_opcode_cmps, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_cmps, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -541,7 +541,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* SCAS: ... w */ { /* SCAS: ... w */ {
.header = x8616_opc(x8616_opcode_scas, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_scas, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -549,7 +549,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* LODS: ... w */ { /* LODS: ... w */ {
.header = x8616_opc(x8616_opcode_lods, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_lods, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -557,7 +557,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* STOS: ... w */ { /* STOS: ... w */ {
.header = x8616_opc(x8616_opcode_stos, X8616_OPCODE_W_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_stos, X8616_OPCODE_W_HOLE),
.fields = { .fields = {
.w = { X8616_OPCODE_W_W_SHIFT, 1 }, .w = { X8616_OPCODE_W_W_SHIFT, 1 },
}, },
@@ -694,7 +694,7 @@ RO_ global X8616_Encoding x8616_encodings[] =
}, },
/* Jcc rel8: 0111 cccc */ { /* Jcc rel8: 0111 cccc */ {
.header = x8616_opc(x8616_opcode_jcc, X8616_OPCODE_CC_PREFIX_SHIFT), .header = x8616_opc(x8616_opcode_jcc, X8616_OPCODE_CC_HOLE),
.fields = { .fields = {
.cc = { X8616_OPCODE_CC_SHIFT, X8616_OPCODE_CC_WIDTH }, .cc = { X8616_OPCODE_CC_SHIFT, X8616_OPCODE_CC_WIDTH },
}, },