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Edward R. Gonzalez
2026-02-20 22:10:29 -05:00
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references/Architectural_Consolidation.md
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@@ -19,10 +19,11 @@ This document serves as the master blueprint for the research and curation phase
## 3. Onat's VAMP/KYRA Architecture (The Runtime/Codegen)
* **2-Item Register Stack:** Uses `RAX` and `RDX` as a tiny, hardware-resident stack.
* **The Swap:** `xchg rax, rdx` (1-byte: `48 87 C2`) is emitted to rotate the "top of stack".
* **The Swap / Magenta Pipe:** A definition boundary implicitly emits `RET` (to close the last block) followed by `xchg rax, rdx` (1-byte: `48 87 C2` or `48 92`) to rotate the "top of stack" for the new block.
* **Aliased Global Namespace:** The CPU register file is treated as a shared, aliased memory space for functions.
* **Functions as Blocks:** Words are "free of arguments and returns" in the traditional sense.
* **Preemptive Scatter ("Tape Drive"):** Arguments are pre-placed into fixed, contiguous memory slots ("the tape") by the compiler/loader before execution. This eliminates "argument gathering" during function calls.
* **The FFI Dance (C-ABI Integration):** To call OS APIs (like WinAPI or Vulkan), the hardware stack pointer (`RSP`) must be strictly 16-byte aligned. Custom macros (like `CCALL`) must save state, align `RSP`, map the 2-register stack into C-ABI registers (`RCX`, `RDX`, `R8`, `R9`), execute the `CALL`, and restore `RSP`.
## 4. Implementation Components
* **Emitter:** **Zydis Encoder API**. Zero-allocation, sub-5ms instruction generation.