503 lines
16 KiB
PHP
503 lines
16 KiB
PHP
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if ~ defined AVX2
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restore AVX2 ; this ensures that symbol cannot be forward-referenced
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AVX2 = 1
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include 'avx.inc'
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iterate context, @dest,@src,@src2,@aux
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namespace context
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define visize
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calminstruction AVX.parse_vsib_operand#context operand
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local i, pre, suf
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compute segment_prefix, 0
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compute size, 0
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compute displacement_size, 0
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transform operand
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match pre suf, operand
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jno no_size_prefix
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transform pre, x86
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jno no_size_prefix
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match :size, pre
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jno no_size_prefix
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arrange operand, suf
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no_size_prefix:
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match [address], operand
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jyes memory_operand
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match =ptr? address, operand
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jyes memory_operand
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jump invalid_operand
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memory_operand:
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compute type, 'mem'
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match segment:address, address
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jno segment_prefix_ok
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check segment eq 1 elementof segment & 1 metadataof segment relativeto x86.sreg
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jno invalid_operand
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compute segment, 1 metadataof segment - x86.sreg
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check segment >= 4
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jyes segment_prefix_386
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compute segment_prefix, 26h + segment shl 3
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jump segment_prefix_ok
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segment_prefix_386:
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compute segment_prefix, 64h + segment-4
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segment_prefix_ok:
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match pre suf, address
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jno no_address_size_prefix
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transform pre, x86
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jno no_address_size_prefix
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match :pre, pre
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jno no_address_size_prefix
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arrange address, suf
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check pre = 4 | pre = 8
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jno invalid_address_size
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compute mode, pre shl 3
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no_address_size_prefix:
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compute mode, 0
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compute scale, 0
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compute index, 0
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compute base, 0
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compute auto_relative, 0
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check size
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jyes size_override
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compute size, sizeof address
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size_override:
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compute address, address
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compute base_registers, 0
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compute index_registers, 0
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compute i, 1
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extract_registers:
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check i > elementsof address
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jyes registers_extracted
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check i metadataof address relativeto SSE.reg | i metadataof address relativeto AVX.reg
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jyes index_term
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check i metadataof address relativeto x86.r32 | i metadataof address relativeto x86.r64
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jno next_term
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compute base_registers, base_registers + i elementof address * i scaleof address
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jump next_term
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index_term:
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compute index_registers, index_registers + i elementof address * i scaleof address
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next_term:
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compute i, i+1
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jump extract_registers
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registers_extracted:
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compute displacement, address - base_registers - index_registers
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compute auto_relative, 0
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check elementsof index_registers = 1
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jno invalid_address
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compute scale, 1 scaleof index_registers
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compute index, 0 scaleof (1 metadataof index_registers)
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check scale and (scale-1) | scale > 8
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jyes invalid_address
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check 1 metadataof index_registers relativeto SSE.reg
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jyes xmm_index
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compute visize, 32
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jump index_ok
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xmm_index:
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compute visize, 16
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index_ok:
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compute rm, 4
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check elementsof base_registers = 1 & 1 scaleof base_registers = 1
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jyes base_and_index
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check elementsof base_registers = 0
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jno invalid_address
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compute base, 5
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compute displacement_size, 4
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compute mod, 0
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compute mode, x86.mode
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check mode > 16
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jyes ready
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compute mode, 32
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jump ready
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base_and_index:
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compute base, 0 scaleof (1 metadataof base_registers)
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check mode & mode <> 0 scaleof (1 metadataof (1 metadataof base_registers)) shl 3
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jyes invalid_address
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compute mode, 0 scaleof (1 metadataof (1 metadataof base_registers)) shl 3
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setup_displacement:
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check displacement relativeto 0
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jno displacement_32bit
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check displacement = 0 & rm and 111b <> 5 & (rm <> 4 | base and 111b <> 5)
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jyes displacement_empty
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check displacement < 80h & displacement >= -80h
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jyes displacement_8bit
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check displacement - 1 shl mode >= -80h & displacement < 1 shl mode
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jyes displacement_8bit_wrap
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displacement_32bit:
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compute displacement_size, 4
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compute mod, 2
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jump ready
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displacement_8bit_wrap:
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compute displacement, displacement - 1 shl mode
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displacement_8bit:
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compute displacement_size, 1
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compute mod, 1
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jump ready
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index_only:
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compute displacement_size, 4
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compute mod, 0
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jump ready
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displacement_empty:
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compute displacement_size, 0
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compute mod, 0
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ready:
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exit
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invalid_operand:
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err 'invalid operand'
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exit
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invalid_address:
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err 'invalid address'
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exit
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invalid_address_size:
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err 'invalid address size'
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exit
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end calminstruction
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end namespace
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end iterate
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iterate <instr,opcode,asize>, vpgatherdd,90h,4, vpgatherqd,91h,8, vgatherdps,92h,4, vgatherqps,93h,8
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macro instr? dest*,src*,mask*
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AVX.parse_operand@dest dest
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AVX.parse_vsib_operand@src src
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AVX.parse_operand@aux mask
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if @dest.type = 'mmreg' & @src.type = 'mem' & @aux.type = 'mmreg'
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if @src.size and not 4 | (@dest.size > 16 & @dest.size * (asize shr 2) > @src.visize) | (@src.visize > 16 & @dest.size * (asize shr 2) < @src.visize)
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err 'invalid operand size'
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else if @aux.size <> @dest.size
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err 'operand sizes do not match'
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else if @dest.rm = @aux.rm | @dest.rm = @src.index | @aux.rm = @src.index
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err 'disallowed combination of registers'
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end if
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AVX.store_instruction@src @src.visize,VEX_66_0F38_W0,opcode,@dest.rm,@aux.rm
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else
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err 'invalid combination of operands'
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end if
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end macro
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end iterate
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iterate <instr,opcode,asize>, vpgatherdq,90h,4, vpgatherqq,91h,8, vgatherdpd,92h,4, vgatherqpd,93h,8
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macro instr? dest*,src*,mask*
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AVX.parse_operand@dest dest
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AVX.parse_vsib_operand@src src
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AVX.parse_operand@aux mask
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if @dest.type = 'mmreg' & @src.type = 'mem' & @aux.type = 'mmreg'
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if @src.size and not 8 | (@dest.size > 16 & @dest.size * (asize shr 2) > @src.visize * 2) | (@src.visize > 16 & @dest.size * (asize shr 2) < @src.visize * 2)
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err 'invalid operand size'
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else if @aux.size <> @dest.size
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err 'operand sizes do not match'
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else if @dest.rm = @aux.rm | @dest.rm = @src.index | @aux.rm = @src.index
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err 'disallowed combination of registers'
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end if
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AVX.store_instruction@src @dest.size,VEX_66_0F38_W1,opcode,@dest.rm,@aux.rm
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else
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err 'invalid combination of operands'
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end if
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end macro
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end iterate
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iterate <instr,opcode>, packsswb,63h, packuswb,67h, packssdw,6Bh, paddb,0FCh, paddw,0FDh, paddd,0FEh, paddq,0D4h, paddsb,0ECh, paddsw,0EDh, paddusb,0DCh, paddusw,0DDh, \
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pand,0DBh, pandn,0DFh, pavgb,0E0h, pavgw,0E3h, pcmpeqb,74h, pcmpeqw,75h, pcmpeqd,76h, pcmpgtb,64h, pcmpgtw,65h, pcmpgtd,66h, \
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pmaddwd,0F5h, pmaxsw,0EEh, pmaxub,0DEh, pminsw,0EAh, pminub,0DAh, pmulhuw,0E4h, pmulhw,0E5h, pmullw,0D5h, pmuludq,0F4h, \
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por,0EBh, psadbw,0F6h, psubb,0F8h, psubw,0F9h, psubd,0FAh, psubq,0FBh, psubsb,0E8h, psubsw,0E9h, psubusb,0D8h, psubusw,0D9h, \
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punpckhbw,68h, punpckhwd,69h, punpckhdq,6Ah, punpckhqdq,6Dh, punpcklbw,60h, punpcklwd,61h, punpckldq,62h, punpcklqdq,6Ch, pxor,0EFh
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macro v#instr? dest*,src*,src2*
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AVX.basic_instruction VEX_66_0F_W0,opcode,0,dest,src,src2
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end macro
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end iterate
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iterate <instr,opcode>, packusdw,2Bh, pcmpeqq,29h, pcmpgtq,37h, phaddw,1, phaddd,2, phaddsw,3, phsubw,5, phsubd,6, phsubsw,7, pmaddubsw,4, \
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pmaxsb,3Ch, pmaxsd,3Dh, pmaxuw,3Eh, pmaxud,3Fh, pminsb,38h, pminsd,39h, pminuw,3Ah, pminud,3Bh, pmulhrsw,0Bh, pmulld,40h, pmuldq,28h, \
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pshufb,0, psignb,8, psignw,9, psignd,0Ah
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macro v#instr? dest*,src*,src2*
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AVX.basic_instruction VEX_66_0F38_W0,opcode,0,dest,src,src2
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end macro
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end iterate
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iterate <instr,opcode>, mpsadbw,42h, palignr,0Fh, pblendd,02h
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macro v#instr? dest*,src*,src2*,imm*
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AVX.basic_instruction_imm8 VEX_66_0F3A_W0,opcode,0,dest,src,src2,imm
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end macro
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end iterate
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iterate <instr,opcode>, pabsb,1Ch, pabsw,1Dh, pabsd,1Eh, pblendw,0Eh
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macro v#instr? dest*,src*
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AVX.single_source_instruction VEX_66_0F38_W0,opcode,0,dest,src
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end macro
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end iterate
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iterate <instr,vex_mpw>, pshufd,VEX_66_0F_W0, pshufhw,VEX_F3_0F_W0, pshuflw,VEX_F2_0F_W0
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macro v#instr? dest*,src*,imm*
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AVX.single_source_instruction_imm8 vex_mpw,70h,0,dest,src,imm
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end macro
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end iterate
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iterate <instr,vex_mpw,opcode>, vpsllvd,VEX_66_0F38_W0,47h, vpsllvq,VEX_66_0F38_W1,47h, vpsrlvd,VEX_66_0F38_W0,45h, vpsrlvq,VEX_66_0F38_W1,45h, vpsravd,VEX_66_0F38_W0,46h
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macro instr? dest*,src*,src2*
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AVX.basic_instruction vex_mpw,opcode,0,dest,src,src2
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end macro
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end iterate
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macro vpblendvb? dest*,src*,src2*,mask*
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AVX.parse_operand@dest dest
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AVX.parse_operand@src src
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AVX.parse_operand@src2 src2
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AVX.parse_operand@aux mask
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if @dest.type = 'mmreg' & @src.type = 'mmreg' & (@src2.type = 'mem' | @src2.type = 'mmreg') & @aux.type = 'mmreg'
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if @src.size <> @dest.size | @src2.size and not @dest.size | @aux.size <> @dest.size
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err 'operand sizes do not match'
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end if
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AVX.store_instruction@src2 @dest.size,VEX_66_0F3A_W0,4Ch,@dest.rm,@src.rm,1,(@aux.rm and 1111b) shl 4
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else
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err 'invalid combination of operands'
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end if
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end macro
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macro vpmovmskb? dest*,src*
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x86.parse_operand@dest dest
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AVX.parse_operand@src src
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if @dest.type = 'reg' & @src.type = 'mmreg'
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if (@dest.size <> 4 & (x86.mode < 64 | @dest.size <> 8))
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err 'invalid operand size'
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end if
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AVX.store_instruction@src @src.size,VEX_66_0F_W0,0D7h,@dest.rm
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else
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err 'invalid combination of operands'
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end if
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end macro
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iterate <instr,opcode,msize>, pmovsxbw,20h,8, pmovsxbd,21h,4, pmovsxbq,22h,2, pmovsxwd,23h,8, pmovsxwq,24h,4, pmovsxdq,25h,8, \
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pmovzxbw,30h,8, pmovzxbd,31h,4, pmovzxbq,32h,2, pmovzxwd,33h,8, pmovzxwq,34h,4, pmovzxdq,35h,8
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macro v#instr? dest*,src*
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AVX.parse_operand@dest dest
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AVX.parse_operand@src src
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if @dest.type = 'mmreg' & (@src.type = 'mem' | @src.type = 'mmreg')
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if (@src.type = 'mmreg' & @src.size <> 16) | (@src.type = 'mem' & @src.size and not (msize * (@dest.size shr 4)))
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err 'invalid operand size'
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end if
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AVX.store_instruction@src @dest.size,VEX_66_0F38_W0,opcode,@dest.rm
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else
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err 'invalid combination of operands'
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end if
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end macro
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end iterate
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iterate <instr,postbyte>, pslldq,7, psrldq,3
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macro v#instr dest*,src*,src2*
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AVX.parse_operand@dest dest
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AVX.parse_operand@src src
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x86.parse_operand@src2 src2
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if @dest.type = 'mmreg' & @src.type = 'mmreg' & @src2.type = 'imm'
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if @src2.size and not 1
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err 'invalid operand size'
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else if @src.size <> @dest.size
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err 'operand sizes do not match'
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end if
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|
AVX.store_instruction@src @dest.size,VEX_66_0F_W0,73h,postbyte,@dest.rm,1,@src2.imm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
end iterate
|
||
|
|
|
||
|
|
iterate <instr,opcode_rrm,opcode,postbyte>, psllw,0F1h,71h,6, pslld,0F2h,72h,6, psllq,0F3h,73h,6, psraw,0E1h,71h,4, psrad,0E2h,72h,4, psrlw,0D1h,71h,2, psrld,0D2h,72h,2, psrlq,0D3h,73h,2
|
||
|
|
|
||
|
|
macro v#instr? dest*,src*,src2*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
AVX.parse_operand@src src
|
||
|
|
AVX.parse_operand@src2 src2
|
||
|
|
if @dest.type = 'mmreg' & @src.type = 'mmreg' & (@src2.type = 'mem' | @src2.type = 'mmreg')
|
||
|
|
if @src2.size and not 16
|
||
|
|
err 'invalid operand size'
|
||
|
|
else if @src.size <> @dest.size
|
||
|
|
err 'operand sizes do not match'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src2 @dest.size,VEX_66_0F_W0,opcode_rrm,@dest.rm,@src.rm
|
||
|
|
else if @dest.type = 'mmreg' & @src.type = 'mmreg' & @src2.type = 'imm'
|
||
|
|
if @src2.size and not 1
|
||
|
|
err 'invalid operand size'
|
||
|
|
else if @src.size <> @dest.size
|
||
|
|
err 'operand sizes do not match'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src @dest.size,VEX_66_0F_W0,opcode,postbyte,@dest.rm,1,@src2.imm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
end iterate
|
||
|
|
|
||
|
|
macro vmovntdqa? dest*,src*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
x86.parse_operand@src src
|
||
|
|
if @dest.type = 'mmreg' & @src.type = 'mem'
|
||
|
|
if @src.size and not @dest.size
|
||
|
|
err 'operand sizes do not match'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src @dest.size,VEX_66_0F38_W0,2Ah,@dest.rm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
iterate <instr,w>, vpmaskmovd,0, vpmaskmovq,1
|
||
|
|
|
||
|
|
macro instr? dest*,src*,src2*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
AVX.parse_operand@src src
|
||
|
|
AVX.parse_operand@src2 src2
|
||
|
|
if @dest.type = 'mmreg' & @src.type = 'mmreg' & @src2.type = 'mem'
|
||
|
|
if @src.size <> @dest.size | @src2.size and not @dest.size
|
||
|
|
err 'operand sizes do not match'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src2 @dest.size,VEX_66_0F38_W#w,8Ch,@dest.rm,@src.rm
|
||
|
|
else if @dest.type = 'mem' & @src.type = 'mmreg' & @src2.type = 'mmreg'
|
||
|
|
if @src.size <> @src2.size | @dest.size and not @src.size
|
||
|
|
err 'operand sizes do not match'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@dest @src.size,VEX_66_0F38_W#w,8Eh,@src2.rm,@src.rm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
end iterate
|
||
|
|
|
||
|
|
macro vbroadcasti128? dest*,src*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
AVX.parse_operand@src src
|
||
|
|
if @dest.type = 'mmreg' & @src.type = 'mem'
|
||
|
|
if @dest.size <> 32 | @src.size and not 16
|
||
|
|
err 'invalid operand size'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src 32,VEX_66_0F38_W0,5Ah,@dest.rm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
macro vextracti128? dest*,src*,aux*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
AVX.parse_operand@src src
|
||
|
|
x86.parse_operand@aux aux
|
||
|
|
if (@dest.type = 'mmreg' | @dest.type = 'mem') & @src.type = 'mmreg' & @aux.type = 'imm'
|
||
|
|
if @dest.size and not 16 | @src.size <> 32 | @aux.size and not 1
|
||
|
|
err 'invalid operand size'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@dest 32,VEX_66_0F3A_W0,39h,@src.rm,,1,@aux.imm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
macro vinserti128? dest*,src*,src2*,aux*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
AVX.parse_operand@src src
|
||
|
|
AVX.parse_operand@src2 src2
|
||
|
|
x86.parse_operand@aux aux
|
||
|
|
if @dest.type = 'mmreg' & @src.type = 'mmreg' & (@src2.type = 'mmreg' | @src2.type = 'mem') & @aux.type = 'imm'
|
||
|
|
if @dest.size <> 32 | @src.size <> 32 | @src2.size and not 16 | @aux.size and not 1
|
||
|
|
err 'invalid operand size'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src2 32,VEX_66_0F3A_W0,38h,@dest.rm,@src.rm,1,@aux.imm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
macro vperm2i128? dest*,src*,src2*,imm*
|
||
|
|
AVX.basic_instruction_imm8 VEX_66_0F3A_W0,46h,32,dest,src,src2,imm
|
||
|
|
end macro
|
||
|
|
|
||
|
|
iterate <instr,opcode,msize>, vbroadcastss,18h,4, vpbroadcastb,78h,1, vpbroadcastw,79h,2, vpbroadcastd,58h,4, vpbroadcastq,59h,8
|
||
|
|
|
||
|
|
macro instr? dest*,src*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
AVX.parse_operand@src src
|
||
|
|
if @dest.type = 'mmreg' & (@src.type = 'mmreg' | @src.type = 'mem')
|
||
|
|
if (@src.type='mmreg' & @src.size <> 16) | (@src.type = 'mem' & @src.size and not msize)
|
||
|
|
err 'invalid operand size'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src @dest.size,VEX_66_0F38_W0,opcode,@dest.rm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
end iterate
|
||
|
|
|
||
|
|
macro vbroadcastsd? dest*,src*
|
||
|
|
AVX.parse_operand@dest dest
|
||
|
|
AVX.parse_operand@src src
|
||
|
|
if @dest.type = 'mmreg' & (@src.type = 'mmreg' | @src.type = 'mem')
|
||
|
|
if @dest.size <> 32 | (@src.type='mmreg' & @src.size <> 16) | (@src.type = 'mem' & @src.size and not 8)
|
||
|
|
err 'invalid operand size'
|
||
|
|
end if
|
||
|
|
AVX.store_instruction@src 32,VEX_66_0F38_W0,19h,@dest.rm
|
||
|
|
else
|
||
|
|
err 'invalid combination of operands'
|
||
|
|
end if
|
||
|
|
end macro
|
||
|
|
|
||
|
|
iterate <instr,opcode>, vpermq,0, vpermpd,1
|
||
|
|
|
||
|
|
macro instr? dest*,src*,imm*
|
||
|
|
AVX.single_source_instruction_imm8 VEX_66_0F3A_W1,opcode,32,dest,src,imm
|
||
|
|
end macro
|
||
|
|
|
||
|
|
end iterate
|
||
|
|
|
||
|
|
iterate <instr,opcode>, vpermd,36h, vpermps,16h
|
||
|
|
|
||
|
|
macro instr? dest*,src*,src2*
|
||
|
|
AVX.basic_instruction VEX_66_0F38_W0,opcode,32,dest,src,src2
|
||
|
|
end macro
|
||
|
|
|
||
|
|
end iterate
|
||
|
|
|
||
|
|
end if
|