diff --git a/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-NOTimothyLottes-3-if-you-had-multiple-line-stores-collecting-on-a.md b/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-NOTimothyLottes-3-if-you-had-multiple-line-stores-collecting-on-a.md
index 41406cd..a0859ff 100644
--- a/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-NOTimothyLottes-3-if-you-had-multiple-line-stores-collecting-on-a.md
+++ b/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-NOTimothyLottes-3-if-you-had-multiple-line-stores-collecting-on-a.md
@@ -26,199 +26,199 @@ parent_post_id: "1869436199884222515"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari (3.) If you had multiple line stores collecting on a given line with ECC, you'd have the same bottleneck as fire-and-forget atomics. A throughput of one line modification per clock.
-**2/**
+**2/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari (4.) Note the prior assumes a read hit!
So at the point you get anti-atomic, you are also anti-store and anti-ECC, and anti-etc. It's the same pipelines with the same variability due to on-chip networking, different clock domain crossing, etc.
-**3/**
+**3/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari (5.) Good GPUs have multiple ALUs doing the atomic by the last level cache. So it scales very well as a function of line collisions. Meaning if all lanes access separate addresses on a cacheline, those go in parallel.
-**4/**
+**4/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari (6.) Atomics and regular stores have the same memory controller base-camping behavior. If all SIMDs store to addresses that hash to the same last level cache partition, they will drop efficiency just like doing all atomics to the same address.
-**5/**
+**5/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari (7.) Anyway, while CPU atomics are serious design fail, GPU atomics on good GPUs are your best friend. They are actually a fantastic tool for getting more regular performance in many parallel algorithms.
-**6/**
+**6/** @SebAaltonen
@NOTimothyLottes @AgileJebrim @munohikari Indeed. Many CPU programmers have the wrong belief that GPU atomics are slow and unusable. They are fantastic. Bump allocator is your best friend on CPU side. On GPU you do atomic add to implement a bump allocator. As simple as that. It's super fast.
-**7/**
+**7/** @AgileJebrim
@SebAaltonen @NOTimothyLottes @munohikari I know NVIDIA did a really good atomicAdd, especially if you don’t use the result of the atomicAdd(). If you use it, then it forces it down a significantly slower path. But it’s all implementation-specific and different vendors will do different things yes?
-**8/**
+**8/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari Atomics come in two forms
(1.) fire-and-forget (aka you don't use the return) - the compiler will flag it for no-return, so it behaves like a store
(2.) read the return - it behaves like a {store, and read} simultaneously with layout "coherent"
-**9/**
+**9/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari Good GPUs have address coalescing on writes and atomics. So a wave wide store is reduced to a cost that scales with the number of total cachelines all waves touch, with byte-write-mask so there is no read-modify-write
-**10/**
+**10/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari ... atomics have the same but if any wave lane's addresses collide it will bump those to another request (for the same cacheline). Possible that some HW implements a HW reduction for collisions of some kinds of atomics locally before the requests go out, but don't assume that
-**11/**
+**11/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari ... it's more likely that some compilers try to fix stupid behavior by doing a wave-reduction in software, and that causes hell for those of us who already write good code
-**12/**
+**12/** @AgileJebrim
@NOTimothyLottes @SebAaltonen @munohikari Thoughts on atomic compare exchange? I use similar functionality on CPUs to globally synchronize threads and I figured I’d give it a shot attempting to do that on GPUs.
-**13/**
+**13/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari Compare and exchange since it takes 2 values, it could have half the peak rate through on-chip network. Personally I have always used algorithms that do better things without the cmpswap atomic. You always can get the return (value pre-atomic), so cmpswap utility is less
-**14/**
+**14/** @AgileJebrim
@NOTimothyLottes @SebAaltonen My CPU sync mechanism works by stalling each thread until it reaches a multiple of the total number of threads to be synced, only incrementing an integer (swapping) when it reaches its specific thread index.
-**15/**
+**15/** @NOTimothyLottes
@AgileJebrim @SebAaltonen I assume you are using a futex then on Linux to block? But the GPU doesn't have such a thing exposed in software. Instead you'd be effectively polling using serial global memory atomic latency as your rate limiter and 'blocking'
-**16/**
+**16/** @NOTimothyLottes
@AgileJebrim @SebAaltonen Serializing workgroups on the GPU in this way has a very high latency granularity. There is also the issue of preemption on PCs, there is no guarantee of forward progress due to no guarantee all workgroups get restored
-**17/**
+**17/** @NOTimothyLottes
@AgileJebrim @SebAaltonen So you can deadlock post preemption if the workgroup that needs to do the atomic to unblock those spinning cannot get back on the machine
-**18/**
+**18/** @NOTimothyLottes
@AgileJebrim @SebAaltonen Now, the important part, there is one compromise rule that has the highest chance of being possible, that is an ask that if there is a partial restore, that it restores the oldest launched workgroups first ...
-**19/**
+**19/** @NOTimothyLottes
@AgileJebrim @SebAaltonen And with that you can have some forward progress if an algorithm only has dependencies on workgroups launched before it (like lower kernel global workgroup index), food for thought for algorithm design
-**20/**
+**20/** @NOTimothyLottes
@AgileJebrim @SebAaltonen on the CPU side, you'd futex block to get the thread off being scheduled so the dependent one could get on the machine to avoid deadlock, it isn't efficient by any means but works, the GPU's exposed only voluntary method to get off the machine is to exit the workgroup ...
-**21/**
+**21/** @NOTimothyLottes
@AgileJebrim @SebAaltonen So if you uber-task, meaning just keep launching the same dispatch, and the workgroup finds what it needs to do (instead of working off kernel global index), then you can workaround preemption that way too ...
-**22/**
+**22/** @NOTimothyLottes
@AgileJebrim @SebAaltonen Blocking becomes just workgroup exit. And the next workgroup gets lower schedule priority than existing active workgroups which helps solve of the scheduling issues
-**23/**
+**23/** @AgileJebrim
@NOTimothyLottes @SebAaltonen I’m not using a Linux futex. Could you look over my code here?
-**24/**
+**24/** @simplex_fx
@AgileJebrim @NOTimothyLottes @SebAaltonen Hey Jeb, have you considered hitting the funny L shaped button on the right of your keyboard more frequently? 😅
-**25/**
+**25/** @AgileJebrim
@simplex_fx @NOTimothyLottes @SebAaltonen Enter? Nah
-**26/**
+**26/** @simplex_fx
@AgileJebrim @NOTimothyLottes @SebAaltonen
-**27/**
+**27/** @AgileJebrim
@simplex_fx @NOTimothyLottes @SebAaltonen If I don’t have to scroll right…
-**28/**
+**28/** @simplex_fx
@AgileJebrim @NOTimothyLottes @SebAaltonen Dude, stop with that WQHD bullshit, buy a proper tv and limit yourself to 80-120
-**29/**
+**29/** @AgileJebrim
@simplex_fx @NOTimothyLottes @SebAaltonen Nty. The hell do I need a tv for? I have several monitors.
-**30/**
+**30/** @simplex_fx
@AgileJebrim @NOTimothyLottes @SebAaltonen How big?
-**31/**
+**31/** @AgileJebrim
@simplex_fx @NOTimothyLottes @SebAaltonen Big enough to maximize a window on each.
-**32/**
+**32/** @simplex_fx
@AgileJebrim @NOTimothyLottes @SebAaltonen If you go too wide, you will just kill your neck on the long run
-**33/**
+**33/** @AgileJebrim
@simplex_fx @NOTimothyLottes @SebAaltonen I have 4 monitors
-**34/**
+**34/** @simplex_fx
@AgileJebrim @NOTimothyLottes @SebAaltonen How big?
-**35/**
+**35/** @NOTimothyLottes
@simplex_fx @AgileJebrim @SebAaltonen Ideally one of these
-**36/**
+**36/** @AgileJebrim
@NOTimothyLottes @simplex_fx @SebAaltonen Not big enough. Evans & Sutherland still makes planetariums. We have smaller scale 360 degree domes. I think they’re about 14ft high.
-**37/**
+**37/** @SebAaltonen
@AgileJebrim @NOTimothyLottes Same is true for everything. All memory loads on GPUs are highly vendor specific. On GTX 1080 (Pascal) your memory load goes through sampler, which is around 85 cycles of latency. While on Turing your raw load is only 28 cycles of latency (CUDA benchmarks).
-**38/**
+**38/** @AgileJebrim
@SebAaltonen @NOTimothyLottes For sure, but my focus is more on how deterministic and predictable these are. I’ll take 85 if it’s always 85 over something that might vary unpredictably between 28 and 100.
-**39/**
+**39/** @SebAaltonen
@AgileJebrim @NOTimothyLottes Nvidia has big L1$, so they are more predictable. Texture samplers are shared with all waves running on the same compute unit. They are not really predictable. You wait until the unit is ready. There's quite a lot of fluctuation. That's why you have 8x-10x hyperthreading per CU.
-**40/**
+**40/** @SebAaltonen
@AgileJebrim @NOTimothyLottes The idea is to keep the SIMD running all the time. Wave execution time variance hasn't been a big optimization goal. There's always more work coming, so it's not a problem if some wave takes 10x time to execute compared to others.
-**41/**
+**41/** @SebAaltonen
@AgileJebrim @NOTimothyLottes Basically if the SIMD is executing instructions all the time, then your workload runs at predictable amount of instructions per cycle. The problem is barriers. You wait for longest wave to finish. You can't to batch barriers to avoid turning latency into real lost SIMD cycles.
-**42/**
+**42/** @AgileJebrim
@SebAaltonen @NOTimothyLottes If they all take the same amount of time then there shouldn’t be much idling of hardware for waiting on the longest wave.
-**43/**
+**43/** @SebAaltonen
@AgileJebrim @NOTimothyLottes That's true. But they don't take the same amount of time due to caches. That's where the 10x hyper-threading kicks in. As long as the SIMD is fed all the time, there's no visible issue with fluctuating wave lengths. Barriers make that visible. Minimal amount of barriers = good.
-**44/**
+**44/** @AgileJebrim
@NOTimothyLottes @SebAaltonen @munohikari Would you implement a prefix sum compaction algorithm using atomicAdd?
-**45/**
+**45/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari Standard optimizations apply, like doing wave-reductions first.
-**46/**
+**46/** @AgileJebrim
@NOTimothyLottes @SebAaltonen @munohikari Okay so you don’t just blanket throw an atomicAdd on it then.
-**47/**
+**47/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari No. For things like scanning a 1-bit value, it's a wave masked bit count op in software, followed by predicating the atomic to just lane 0 of the wave. For scanning uint32s it's a log2 wave reduction, then predicating the add to lane 0. And so on
diff --git a/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-SebAaltonen-yes-but-its-going-to-be-much-slower-you-can-do.md b/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-SebAaltonen-yes-but-its-going-to-be-much-slower-you-can-do.md
index df6495a..fdbca46 100644
--- a/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-SebAaltonen-yes-but-its-going-to-be-much-slower-you-can-do.md
+++ b/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-SebAaltonen-yes-but-its-going-to-be-much-slower-you-can-do.md
@@ -26,13 +26,13 @@ parent_post_id: "1869424048607993895"
## Branch
-**1/**
+**1/** @SebAaltonen
@AgileJebrim @NOTimothyLottes @munohikari Yes, but it's going to be MUCH slower. You can do sums and reductions in groupshared memory, but if that mobile GPU doesn't have real groupshared memory, it's going to be very slow. For example GMEM based groupshared is this slow on Qualcomm (and 730 is much better than 610):
-**2/**
+**2/** @SebAaltonen
@AgileJebrim @NOTimothyLottes @munohikari X1 is the brand new laptop chip. This architecture is only on latest mobile phones. Low end is Adreno 610 and similar.
diff --git a/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/index.md b/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/index.md
index ab4048a..d0980cc 100644
--- a/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/index.md
+++ b/archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/index.md
@@ -25,56 +25,56 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @AgileJebrim
@munohikari @SebAaltonen You left out the bit where I also said no graphics pipeline. :P
-**2/**
+**2/** @SebAaltonen
@AgileJebrim @munohikari Computer shaders are a can of worms for old mobile GPUs too. Some have fast groupshared memory (could be tiny), some emulate it. Some have wave intrinsics, some don't. 64-bit atomic support is nonexistent (for MM Dreams / Native style Z+payload packing).
-**3/**
+**3/** @SebAaltonen
@AgileJebrim @munohikari Also compute shader writes are not compressed (pixel shader framebuffer writes have HW lossless compressor). You pay full memory bandwidth cost, which causes phone to heat (drain battery) and eventually throttle.
-**4/**
+**4/** @AgileJebrim
@SebAaltonen @munohikari Alternative approach is to do all rendering in screen space in a fragment shader.
-**5/**
+**5/** @SebAaltonen
@AgileJebrim @munohikari If you intend to do distance field ray-tracing using volume textures, worth noting that most mobile GPUs don't do proper 3d tiling layout for volume textures. Instead they use legacy 2d sliced layout, which results in significantly more L1$ trashing. Can 5x your mem BW use.
-**6/**
+**6/** @AgileJebrim
@SebAaltonen @munohikari Raycasting, no bouncing, using cubic textured bricks that emulate voxel surfaces via a parallax occlusion map approach measuring distances to each voxel surface.
If I’m writing something for an avionics cockpit, I’d be either using an Arm Mali-G78AE or NVIDIA DRIVE AGX Thor GPU.
-**7/**
+**7/** @AgileJebrim
@SebAaltonen @munohikari I’d also be using Vulkan SC, which I believe disables atomics entirely. :P
-**8/**
+**8/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari Disabling atomics is like chopping off both legs because someone thinks one tow has a blister when it actually doesn't.
-**9/**
+**9/** @AgileJebrim
@NOTimothyLottes @SebAaltonen @munohikari You can still implement a comparable feature yourself.
Branches: [[archive/threads/AgileJebrim/2024-12-18-you-left-out-the-bit-where-i-also-said-no/2024-12-18-SebAaltonen-yes-but-its-going-to-be-much-slower-you-can-do]]
-**10/**
+**10/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari No actually you cannot. No method of software (or even HW) implemented lock-line algorithm survives the kind of latency in the GPU memory system. There is a big reason atomics on GPUs are done right by the last level of cache (the coherent memory domain)
-**11/**
+**11/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari Something you really need to understand for your own benefit:
(1.) There are a lot of more expensive things happening in the GPU memory system than atomics. For instance DCC compression. It requires metadata access (to get the state of memory just to do the compression on store).
-**12/**
+**12/** @NOTimothyLottes
@AgileJebrim @SebAaltonen @munohikari (2.) Think of GPU atomics as a read-modify-write op. It's effectively the same behavior as a partial cacheline write-through STORE operation on HW using ECC. Because ECC eats the bits used for byte-write-mask.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-Alecazam123-hard-to-believe-im-still-writing-games-in-win32.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-Alecazam123-hard-to-believe-im-still-writing-games-in-win32.md
index b606161..5d4048e 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-Alecazam123-hard-to-believe-im-still-writing-games-in-win32.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-Alecazam123-hard-to-believe-im-still-writing-games-in-win32.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @Alecazam123
@Dispatch_Graph Hard to believe I’m still writing games in Win32 25 years later. But it runs on SteamOS, so can never be replaced now.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-BowTiedTails-yep-win32-is-heaven-when-you-see-what-else-is-out.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-BowTiedTails-yep-win32-is-heaven-when-you-see-what-else-is-out.md
index a510fb4..e83971e 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-BowTiedTails-yep-win32-is-heaven-when-you-see-what-else-is-out.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-BowTiedTails-yep-win32-is-heaven-when-you-see-what-else-is-out.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @BowTiedTails
@Dispatch_Graph Yep. Win32 is heaven when you see what else is out there.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-coincidentally-i-made-a-vulkan-wayland-compute.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-coincidentally-i-made-a-vulkan-wayland-compute.md
index 3aa7062..a6695b7 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-coincidentally-i-made-a-vulkan-wayland-compute.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-coincidentally-i-made-a-vulkan-wayland-compute.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @VPCOMPRESSB
@Dispatch_Graph coincidentally, i made a Vulkan Wayland compute engine yesterday in ~600 LoC.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-yeah-i-actually-prefer-wayland-because-if-you.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-yeah-i-actually-prefer-wayland-because-if-you.md
index f4b7f31..900b761 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-yeah-i-actually-prefer-wayland-because-if-you.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-yeah-i-actually-prefer-wayland-because-if-you.md
@@ -26,32 +26,32 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @VPCOMPRESSB
yeah. i actually prefer Wayland because if you implement something super simple, you get something super simple back (e.g., if i create a window, i get the bare minimum window - no decorations, no resizing, no keyboard or mouse input). with Win32, i'd have fight it and move through its weeds to force it to make something simple.
another problem with Win32 is that it modularizes too much, and make everything seem irrelevant from each other. in Wayland, it's all unified, where if just learn 1 pattern from 1 thing, you can apply that pattern to everything else, from windows to input (e.g., all interfaces are just a simple server-client messaging model). basically, you can take a step back and look at everything as a whole, and clearly see a pattern.
-**2/**
+**2/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph You didn't get the true Wayland experience until you try interfacing to Wayland without the Wayland user-space library. Meaning do it with just the kernel calls required. Then you will have taken the gold off the poop, and understood how bad it actually is.
-**3/**
+**3/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph WIN32 base system DLLs are a substantially cleaner interface. I only do non-decorated full-screen (foreground or background) window. Majority of WIN32 code fits on screen grab with mostly comments. I'm not a fan of their "WndProc" but at least it is simple.
-**4/**
+**4/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph Some like to hate on X11, but for what it was designed to do (support both local and remote displays), it is at least very well documented and actually quite easy to roll an interface for with just Linux kernel calls (no external libraries). Docs here: https://x.org/releases/X11R7.7/doc/xproto/x11protocol.html
-**5/**
+**5/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph Duckduckgo Wayland protocol and you get this garbage as documentation (below). Nothing there actually explains how it works, it's just high-level OOP obfustication speak. My vomit translator cannot even process this stuff.
-**6/**
+**6/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph Lets continue. It's built over unix domain sockets and doesn't support remote rendering. Haha, WFT. Just because they want to transfer file descriptors between processes for "bulk data". Wayland looses network displays and is SLOWER (fail): https://www.dedoimedo.com/computers/plasma-6-4-performance-wayland-x11-power-cpu-kernel.html
@@ -59,33 +59,33 @@ another problem with Win32 is that it modularizes too much, and make everything
-**7/**
+**7/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph Don't understand why Linux people had to take what was working, X11, and instead of just improving it, they had to make something that {removed the remote desktop, made it slower, and forces an OOP garbage design}. There is nothing good here.
-**8/**
+**8/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph Another great thing about X11, is that it was trivial to both write and use your own window manager, using the same stable system for DECADES. I had a 350 line minwm.c window manager. Dead easy.
-**9/**
+**9/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph Unix was about KISS (keep it simple stupid) then Linux user-space people transformed that into MISC {make it stupid complex}. Seen this trend with Audio, from OSS to ALSA, and so on.
-**10/**
+**10/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph I worked in the {SunOS,Solaris,HPUX,SGI,AXI,etc} workstation era and started on Linux before ELF and before pthreads. Meaning I build things based on fork() [instead of pthreads] and SHM (shared page mappings) when doing local-only interfaces (no high kernel call granularity).
-**11/**
+**11/** @NOTimothyLottes
@VPCOMPRESSB @Dispatch_Graph If Linux people wanted to replace X11 with a local only interface, at a minimum it should have been simple SHM for the majority, and then only go outside SHM when needing to say kick a doorbell (make wake another process), etc.
-**12/**
+**12/** @o__boga
@NOTimothyLottes @VPCOMPRESSB @Dispatch_Graph Obfuscation is the secret for its "security!"!
-**13/**
+**13/** @VPCOMPRESSB
@NOTimothyLottes @Dispatch_Graph i've never actually used X11. this is much easier.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-hadal101dev-yea-windows-makes-some-interesting-choices-lol.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-hadal101dev-yea-windows-makes-some-interesting-choices-lol.md
index 160948e..9cadc1e 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-hadal101dev-yea-windows-makes-some-interesting-choices-lol.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-hadal101dev-yea-windows-makes-some-interesting-choices-lol.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @hadal101dev
@Dispatch_Graph Yea windows makes some interesting choices lol. Calling CreateFile when you want to OPEN a file? very weird lol.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-smolus-one-thing-i-appreciate-about-wayland-is-that-its.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-smolus-one-thing-i-appreciate-about-wayland-is-that-its.md
index a40374b..3f6b0b5 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-smolus-one-thing-i-appreciate-about-wayland-is-that-its.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-smolus-one-thing-i-appreciate-about-wayland-is-that-its.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @smolus
@Dispatch_Graph one thing I appreciate about wayland is that it's just a simple protocol spec so you are not married to any particular API/library but yeah it can be a lot of work to get basic things working
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Chris_Linux-apples-and-oranges-comparison-here.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Chris_Linux-apples-and-oranges-comparison-here.md
index 7bdaccb..b1e9a7b 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Chris_Linux-apples-and-oranges-comparison-here.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Chris_Linux-apples-and-oranges-comparison-here.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @Chris_Linux
@Dispatch_Graph Apples and oranges comparison here
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-FoundryOfLies-its-kwin.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-FoundryOfLies-its-kwin.md
index f27514a..856144f 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-FoundryOfLies-its-kwin.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-FoundryOfLies-its-kwin.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @FoundryOfLies
@Dispatch_Graph It's KWin
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-JoaoBapt-i-suggest-you-to-stick-with-glfw-if-youre-only.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-JoaoBapt-i-suggest-you-to-stick-with-glfw-if-youre-only.md
index 46f4119..1bed4d5 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-JoaoBapt-i-suggest-you-to-stick-with-glfw-if-youre-only.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-JoaoBapt-i-suggest-you-to-stick-with-glfw-if-youre-only.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @JoaoBapt
@Dispatch_Graph I suggest you to stick with GLFW if you’re only doing Vulkan.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Oka7071-thread.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Oka7071-thread.md
index e3bb38c..584323b 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Oka7071-thread.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Oka7071-thread.md
@@ -26,13 +26,13 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @Oka7071
@Dispatch_Graph
-**2/**
+**2/** @Dispatch_Graph
@Oka4902 if you give me 3 trillion dollars I can elaborate
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-PervWizz-well-win32-began-as-a-bad-api-and-then.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-PervWizz-well-win32-began-as-a-bad-api-and-then.md
index 9f9eb8f..dff1315 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-PervWizz-well-win32-began-as-a-bad-api-and-then.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-PervWizz-well-win32-began-as-a-bad-api-and-then.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @PervWizz
@Dispatch_Graph Well. Win32 began as a bad API and then organically got reshaped into a worse one. Same goes for X11
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Rami36217810-what-about-x11.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Rami36217810-what-about-x11.md
index 5acc9ae..51e2204 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Rami36217810-what-about-x11.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Rami36217810-what-about-x11.md
@@ -26,11 +26,11 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @Rami36217810
@Dispatch_Graph What about x11
-**2/**
+**2/** @Dispatch_Graph
@Rami36217810 its aight
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-SyntaxError2505-why-sdl-works-great.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-SyntaxError2505-why-sdl-works-great.md
index 1b786d2..ed74e51 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-SyntaxError2505-why-sdl-works-great.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-SyntaxError2505-why-sdl-works-great.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @SyntaxError2505
@Dispatch_Graph Why? Sdl works great
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-f82james-fuck-x11.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-f82james-fuck-x11.md
index 9422d3e..6d6edda 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-f82james-fuck-x11.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-f82james-fuck-x11.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @f82james
@Dispatch_Graph fuck x11
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-linux_version-oddly-enough-with-how-old-the-wine-project-is.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-linux_version-oddly-enough-with-how-old-the-wine-project-is.md
index 18fab4d..8ed7623 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-linux_version-oddly-enough-with-how-old-the-wine-project-is.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-linux_version-oddly-enough-with-how-old-the-wine-project-is.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @linux_version
@Dispatch_Graph Oddly enough, with how old the wine project is, Win32 might be the most stable API on Linux.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-mizanyx-elaborate-please-im-still-an-x11-user.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-mizanyx-elaborate-please-im-still-an-x11-user.md
index 20bdef1..dc66de3 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-mizanyx-elaborate-please-im-still-an-x11-user.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-mizanyx-elaborate-please-im-still-an-x11-user.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @mizanyx
@Dispatch_Graph Elaborate please, I'm still an X11 user
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-platonvin-windows-h-is-like-a-nightmare-but-real-it-is-so.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-platonvin-windows-h-is-like-a-nightmare-but-real-it-is-so.md
index 73a77f3..28f2ac8 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-platonvin-windows-h-is-like-a-nightmare-but-real-it-is-so.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-platonvin-windows-h-is-like-a-nightmare-but-real-it-is-so.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @platonvin
@Dispatch_Graph windows.h is like a nightmare but real. It is so bad, that many people manually paste parts of it to avoid including entire thing
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-ruminaik-and-let-us-say-amen.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-ruminaik-and-let-us-say-amen.md
index 7672553..cdadfe6 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-ruminaik-and-let-us-say-amen.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-ruminaik-and-let-us-say-amen.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @ruminaik
@Dispatch_Graph And let us say Amen
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-thedarkhog-get-xlibre-instead-if-youre-using-arch-btw-its-in.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-thedarkhog-get-xlibre-instead-if-youre-using-arch-btw-its-in.md
index 4766ec0..9b265c1 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-thedarkhog-get-xlibre-instead-if-youre-using-arch-btw-its-in.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-thedarkhog-get-xlibre-instead-if-youre-using-arch-btw-its-in.md
@@ -26,7 +26,7 @@ parent_post_id: "2010303501851877740"
## Branch
-**1/**
+**1/** @thedarkhog
@Dispatch_Graph Get Xlibre instead. If you're using arch, btw., it's in the AUR.
diff --git a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/index.md b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/index.md
index 89eeff7..a0a41ec 100644
--- a/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/index.md
+++ b/archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/index.md
@@ -25,16 +25,16 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @Dispatch_Graph
Ok, the Win32 API sure is something, but WOW wayland is awful
Branches: [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-coincidentally-i-made-a-vulkan-wayland-compute]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-hadal101dev-yea-windows-makes-some-interesting-choices-lol]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-VPCOMPRESSB-yeah-i-actually-prefer-wayland-because-if-you]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-Alecazam123-hard-to-believe-im-still-writing-games-in-win32]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-smolus-one-thing-i-appreciate-about-wayland-is-that-its]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-11-BowTiedTails-yep-win32-is-heaven-when-you-see-what-else-is-out]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-thedarkhog-get-xlibre-instead-if-youre-using-arch-btw-its-in]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Chris_Linux-apples-and-oranges-comparison-here]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-mizanyx-elaborate-please-im-still-an-x11-user]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-SyntaxError2505-why-sdl-works-great]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-FoundryOfLies-its-kwin]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-platonvin-windows-h-is-like-a-nightmare-but-real-it-is-so]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-ruminaik-and-let-us-say-amen]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-f82james-fuck-x11]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-linux_version-oddly-enough-with-how-old-the-wine-project-is]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-PervWizz-well-win32-began-as-a-bad-api-and-then]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-JoaoBapt-i-suggest-you-to-stick-with-glfw-if-youre-only]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Rami36217810-what-about-x11]], [[archive/threads/Dispatch_Graph/2026-01-11-ok-the-win32-api-sure-is-something-but-wow/2026-01-12-Oka7071-thread]]
-**2/**
+**2/** @ocarina588
@Dispatch_Graph 😂😂😂, what are you using? Hyprland ?
-**3/**
+**3/** @Dispatch_Graph
@ocarina588 KDE Plasma
diff --git a/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/2025-01-29-mu_chrinovic-i-know-a-person-with-a-phd-that-might-disagree.md b/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/2025-01-29-mu_chrinovic-i-know-a-person-with-a-phd-that-might-disagree.md
index 21ee6f5..0284b4a 100644
--- a/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/2025-01-29-mu_chrinovic-i-know-a-person-with-a-phd-that-might-disagree.md
+++ b/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/2025-01-29-mu_chrinovic-i-know-a-person-with-a-phd-that-might-disagree.md
@@ -26,27 +26,27 @@ parent_post_id: "1884730404587909544"
## Branch
-**1/**
+**1/** @mu_chrinovic
@FFmpeg I know a person with a PhD that might disagree with you
-**2/**
+**2/** @NOTimothyLottes
@mu_chrinovic @FFmpeg Yeah PTX is not assembly, it's a mid level language that is closer to a 1:1 match for the HW ISA --- BUT --- the actual register allocation and management is still done by a high-level compiler ...
-**3/**
+**3/** @janekm
@NOTimothyLottes @mu_chrinovic @FFmpeg That's almost semantics at this point though? If you're writing x86 assembly it gets translated to microcode in the CPU as well, and will do register remapping etc. Only difference in Nvidia case that's happening in the driver, right?
-**4/**
+**4/** @NOTimothyLottes
@janekm @mu_chrinovic @FFmpeg Sounds like you are trying to claim software compiler register allocation is the same as HW runtime register renaming? No. CPU register renaming maps a small set of registers to a larger set to get IPC. Compiler GPU reg allocation maps a massive SSA mess to a small set.
-**5/**
+**5/** @janekm
@NOTimothyLottes @mu_chrinovic @FFmpeg Fair point, my argument was merely that both cases of assembly language are really an intermediate language that gets translated to the final instructions executed by the CPU/GPU. Feels quite pedantic to claim that PTX assembly is not assembly, merely because of reg allocation 🤷♂️
-**6/**
+**6/** @NOTimothyLottes
@janekm @mu_chrinovic @FFmpeg SOFTWARE
Assembler = human writes the physical HW instructions
@@ -56,11 +56,11 @@ HW
Instruction-reordering / wave-scheduling
Register renaming
-**7/**
+**7/** @janekm
@NOTimothyLottes @mu_chrinovic @FFmpeg We've been calling it Assembly since at least when JVM byte code was first a thing. Doesn't matter that a JIT compiler will still do register allocation.
-**8/**
+**8/** @NOTimothyLottes
@janekm @mu_chrinovic @FFmpeg Sure people have been incorrectly labeling stuff for a long time
diff --git a/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/index.md b/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/index.md
index d82a506..27a3ef6 100644
--- a/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/index.md
+++ b/archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/index.md
@@ -25,12 +25,12 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @FFmpeg
PTX is a form of assembly language
Branches: [[archive/threads/FFmpeg/2025-01-29-ptx-is-a-form-of-assembly-language/2025-01-29-mu_chrinovic-i-know-a-person-with-a-phd-that-might-disagree]]
-**2/**
+**2/** @FFmpeg
https://docs.nvidia.com/cuda/inline-ptx-assembly/index.html
diff --git a/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-jaap_null-its-a-silly-thing-on-many-levels-the-entire-arch.md b/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-jaap_null-its-a-silly-thing-on-many-levels-the-entire-arch.md
index 96361e0..8837e74 100644
--- a/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-jaap_null-its-a-silly-thing-on-many-levels-the-entire-arch.md
+++ b/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-jaap_null-its-a-silly-thing-on-many-levels-the-entire-arch.md
@@ -26,7 +26,7 @@ parent_post_id: "1781724279798686001"
## Branch
-**1/**
+**1/** @jaap_null
@KostasAAA It's a silly thing on many levels. The entire arch. limitation is awkward, then the way compilers deal (or not deal) with it is just broken. Sad to see it's still around.
diff --git a/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-matiasgoldberg-whats-the-value-of.md b/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-matiasgoldberg-whats-the-value-of.md
index cd4f2a8..a513f4f 100644
--- a/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-matiasgoldberg-whats-the-value-of.md
+++ b/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/2024-04-24-matiasgoldberg-whats-the-value-of.md
@@ -26,7 +26,7 @@ parent_post_id: "1781724279798686001"
## Branch
-**1/**
+**1/** @matiasgoldberg
@KostasAAA What's the value of shaderSampledImageArrayDynamicIndexing?
diff --git a/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/index.md b/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/index.md
index 505c0f8..7b1f7ed 100644
--- a/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/index.md
+++ b/archive/threads/KostasAAA/2024-04-20-when-using-arrays-of-resources-bindless-its-worth/index.md
@@ -25,19 +25,19 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @KostasAAA
When using arrays of resources/bindless, it's worth paying attention to index divergence. Even if using thread divergent indices, the compiler will use the index from the first active thread to access a resource, for all threads in the wave, which can cause hard to find bugs 1/3
-**2/**
+**2/** @KostasAAA
This happens even when compiler knows that the index varies per thread. To fix this you need to use the NonUniformResourceIndex qualifier. The compiler will then add a waterfall loop to batch wave threads by resource index and ensure that each thread accesses the correct one. 2/3
-**3/**
+**3/** @KostasAAA
This can have a performance impact though, with the worst case being each thread indexing a different resource, both in terms of thread coherence (looping over each thread individually) and texture cache. For more info https://www.asawicki.info/news_1734_which_values_are_scalar_in_a_shader 3/3
diff --git a/archive/threads/MyNameIsMJP/2024-04-23-apparently-uniformity-analysis-is-hard/index.md b/archive/threads/MyNameIsMJP/2024-04-23-apparently-uniformity-analysis-is-hard/index.md
index 0c47615..bead6c8 100644
--- a/archive/threads/MyNameIsMJP/2024-04-23-apparently-uniformity-analysis-is-hard/index.md
+++ b/archive/threads/MyNameIsMJP/2024-04-23-apparently-uniformity-analysis-is-hard/index.md
@@ -25,71 +25,71 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @MyNameIsMJP
@BelgianRenderer @KostasAAA @Nicolas_Lopez_ Apparently uniformity analysis is hard. 🙁
-**2/**
+**2/** @KostasAAA
@MyNameIsMJP @BelgianRenderer @Nicolas_Lopez_ If uniformity can't be deduced, the compiler could be conservative and assume divergence. If it guessed wrong, the waterfall loop won't be executed and all threads will use the same index. Also, the shader author could help the compiler with a UniformResourceIndex qualifier.
-**3/**
+**3/** @MyNameIsMJP
@KostasAAA @BelgianRenderer @Nicolas_Lopez_ Yeah I tend to agree that assuming non-uniformity by default for descriptor indexing would have been a better path, with some better language support for explicit tagging of uniform variables. Maybe in HLSL 2027. 🙂
-**4/**
+**4/** @NOTimothyLottes
@MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ Uniformity is the fast path, it would be horrible to tax the fast path for the sake of things designed to be slow (aka using resource divergence). The right thing to do is place in explicit uniform/nonuniform qualifiers into the languages so it's explicit.
-**5/**
+**5/** @JasperBekkers
@NOTimothyLottes @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ We do nuri for almost all our access (we sometimes turn it off because of badly readable Isa on amd). However the performance impact is in the noise, not all hw resolves this in the shader cores.
-**6/**
+**6/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ NV doesn't advertise this: 32-byte sector size (even with 128-byte lines) mixed with per lane IPs (so you can pipeline latency of divergent accesses) is all about shifting the perf cliff of bad behavior enough to win benchmarks, it is still a cliff (look at ALU utilization) ...
-**7/**
+**7/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ AMD never invested in pipelining divergent latency, and their compiler compounds this by serializing a lot of other things that shouldn't be serialized ...
-**8/**
+**8/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ If one is already into the perf cliff, it's easy on AMD to compound perf debt to the point something can never be optimized, and maybe that's ok if time-to-market/ease-of-use/etc is the primary goal ...
-**9/**
+**9/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ There are cases where AMD's compiler is still failing hard on UNIFORM (aka wave coherent) multi-resource access: zero latency hiding -> every resource is a worst case serialization of {fetch descriptor, wait, sample} with zero pipelining ... example below
-**10/**
+**10/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ Or this case where the images get batched, but the descriptors accesses are serialized (below) ... so it's easy sometimes to assume NURI is not that expensive because the compiler already shot itself in the face (which is quite common in high complexity material shading).
-**11/**
+**11/** @JasperBekkers
@NOTimothyLottes @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ Most of the time for us the resource access is uniform, so the overhead is just a few waves to test this though.
-**12/**
+**12/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ If the whole shader coherently branches into uniform vs non-uniform material paths, sure that can work if the non-uniform path is almost never used, and the compiler doesn't choak on the register pressure of the non-uniform code path.
-**13/**
+**13/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ At least for the sake of learnings for others, I'll continue down the compiler rabbit hole a little more ... even serialized latency of K$ (constant) HITs (all in the cache) will destroy shader perf (a single hit is like 30 some clocks). This pattern happens on AMD today still.
-**14/**
+**14/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ And as for 'fixing' bad programmer behavior via the compiler, lets look at atomicAdd() behavior. First the compiler will burn the overhead to elect an active lane even when the compiler statically knows lane zero is active (simple example below).
-**15/**
+**15/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ Try to out smart it like this,
@@ -100,12 +100,12 @@ It fights back, and makes something even worse. [RED] ... see the multiply by ac
-**16/**
+**16/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ And sometimes it gets really squirrly and throws in a full wave reduction (see the DPP ops). When the good dev is just trying to do an already predicated to lane zero atomic ADD ...
-**17/**
+**17/** @NOTimothyLottes
@JasperBekkers @MyNameIsMJP @KostasAAA @BelgianRenderer @Nicolas_Lopez_ So if any solution depends on trusting a compiler to implicitly do the right thing, I'd be very very concerned, because they don't. Compiler size perf 'fixes' are brittle, break easy, and become massive nightmares for programmers who know what they are doing.
diff --git a/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/2022-11-04-rianflo-welcome-not-back.md b/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/2022-11-04-rianflo-welcome-not-back.md
index 4825ee6..380c25c 100644
--- a/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/2022-11-04-rianflo-welcome-not-back.md
+++ b/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/2022-11-04-rianflo-welcome-not-back.md
@@ -26,7 +26,7 @@ parent_post_id: "1588515348223254528"
## Branch
-**1/**
+**1/** @rianflo
@NOTimothyLottes Welcome Not Back! 🤘🏻♥️
diff --git a/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/index.md b/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/index.md
index fdc50a4..7696b03 100644
--- a/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/index.md
+++ b/archive/threads/NOTimothyLottes/2022-11-04-vulkan-1500-lines-of-overhead-including-header/index.md
@@ -28,7 +28,7 @@ in_reply_to: "1588331007622930432"
## Thread
-**1/**
+**1/** @NOTimothyLottes
@rianflo Vulkan: ~1500 lines of overhead (including header src, as I don't include) for complete hotrod bind-everything-only-once compute-only gfx engine. Not a fan of VK bloatware API complexity, but frankly it can be minimized, and exposes enough to do wonderfull things to the hardware.
diff --git a/archive/threads/NOTimothyLottes/2022-11-05-gpu-programming-tip-line-thread/index.md b/archive/threads/NOTimothyLottes/2022-11-05-gpu-programming-tip-line-thread/index.md
index c9f8edf..36cca31 100644
--- a/archive/threads/NOTimothyLottes/2022-11-05-gpu-programming-tip-line-thread/index.md
+++ b/archive/threads/NOTimothyLottes/2022-11-05-gpu-programming-tip-line-thread/index.md
@@ -25,86 +25,86 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
GPU Programming Tip Line Thread /
-**2/**
+**2/** @NOTimothyLottes
[0] Normalization fail case is 'rsq(0)=INF*0=NaN', trim out intermediate INF to fix, 'normalize_safe(x){return x*min(MAX_FLOAT,rsq(dot(x,x)));}'
-**3/**
+**3/** @NOTimothyLottes
[1] PC FP16 1/denormals generates INFs which can easily eventually result in NaNs, fix positives with 'rcp(max(x,SMALLEST_NORMAL))'
-**4/**
+**4/** @NOTimothyLottes
[2] 'spirv-opt -Os' (optimize for size) is your weapon against "back-before-its-done--getting-groceries" IHV compile times
-**5/**
+**5/** @NOTimothyLottes
[3] Driver ignoring your '[[dont_unroll]]', 'int eatThisBuddy=1+/*hidden-zero*/constantBuffer.zero[0];for(i=0;i<1024;i+=eatThisBuddy){...'
-**6/**
+**6/** @NOTimothyLottes
[4] 'Ship-One-Shader' = One SPIR-V binary, use specialization constants to select shader at PSO generation time, minimizes released shader binary size
-**7/**
+**7/** @NOTimothyLottes
[5] 'Ship-One-Shader' requires 'spirv-opt -Os'
-**8/**
+**8/** @NOTimothyLottes
[6] Use signed 'mask=bitfieldExtract(int(v),bit,1)' to turn bit into all 0's or 1's mask
-**9/**
+**9/** @NOTimothyLottes
[7] On PC for AMD's native V_BFI_B32 (to select bits based on mask) use 'Bfi(int src,int ins,int mask){return (ins&mask)|(src&(~mask));}'
-**10/**
+**10/** @NOTimothyLottes
[8] Use 'bitfieldInsert(,,0,compileTimeImmediate)' hits fast V_BFI_B32 on AMD, and portable to other vendors
-**11/**
+**11/** @NOTimothyLottes
[9] AMD ONLY: clamp(a,b,c) is implemented as med3(a,b,c), so can get V_MED3_* without an extension (in a non-portable way)
-**12/**
+**12/** @NOTimothyLottes
[10] Bools as 0|1 floats '(a&b)|c' can be done via 'saturate(a*b+c)'
-**13/**
+**13/** @NOTimothyLottes
[11] Bools as 0|1 floats '!(a&b)' can be done via '(-a)*b+1.0'
-**14/**
+**14/** @NOTimothyLottes
[12] Convert INFs to NaNs via 'x*0.0+x'
-**15/**
+**15/** @NOTimothyLottes
[13] Semi-persistent workgroup opt = reusing the workgroup for more work before exit (ie processing four 8x8 tiles in a 16x16 footprint using a 64-wide group)
-**16/**
+**16/** @NOTimothyLottes
[14] Semi-persistent workgroups can be good for up to 10% perf on AMD (YMMV) ... assuming compiler doesn't fail VGPR allocation, check your disassembly
-**17/**
+**17/** @NOTimothyLottes
[15] Semi-persistent workgroups gain by keeping more local work on the same L0, by factoring out wait for store on wave exit, and better scheduling
-**18/**
+**18/** @NOTimothyLottes
[16] Merge passes to avoid round trip through DRAM, often huge wins there
-**19/**
+**19/** @NOTimothyLottes
[17] Sometimes serial dependent passes can be merged into one shader to keep work in L2 for >10% gains, requires "unsafe you-shouldnt-do-that" logic that works
-**20/**
+**20/** @NOTimothyLottes
[18] Proper double rate "packed" 16-bit can provides gains up to 30% depending on workload/platform (except NV)
-**21/**
+**21/** @NOTimothyLottes
[19] Even without double rate 16-bit, 16-bit is the most important tool for managing register pressure problems, esp with smaller HW register limits or compiler troubles
diff --git a/archive/threads/NOTimothyLottes/2022-11-08-example-of-bind-everything-once-layout-aliasing/index.md b/archive/threads/NOTimothyLottes/2022-11-08-example-of-bind-everything-once-layout-aliasing/index.md
index 3d27914..6ca5fd1 100644
--- a/archive/threads/NOTimothyLottes/2022-11-08-example-of-bind-everything-once-layout-aliasing/index.md
+++ b/archive/threads/NOTimothyLottes/2022-11-08-example-of-bind-everything-once-layout-aliasing/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Example of "Bind-Everything-Once" Layout Aliasing in Vulkan. Storage image format by aliased name, also bound as sampled image. Choose buffer {readonly,writeonly,volatile (read uncached),atomic} access by aliased name, as either {uint,uint4,float,float4}.
diff --git a/archive/threads/NOTimothyLottes/2022-11-09-if-only-pc-vendors-with-open-isas/index.md b/archive/threads/NOTimothyLottes/2022-11-09-if-only-pc-vendors-with-open-isas/index.md
index 16b1c3e..728bc5c 100644
--- a/archive/threads/NOTimothyLottes/2022-11-09-if-only-pc-vendors-with-open-isas/index.md
+++ b/archive/threads/NOTimothyLottes/2022-11-09-if-only-pc-vendors-with-open-isas/index.md
@@ -25,6 +25,6 @@ in_reply_to: "1590003266129383424"
## Thread
-**1/**
+**1/** @NOTimothyLottes
@olson_dan If only PC vendors with open ISAs (AMD/Intel) would allow loading binary compute shaders in VK built using non-driver toolchains. If Valve enabled binary shaders on Steam Deck in Linux, that would be my new exclusive dev platform, instead of just a possible porting target
diff --git a/archive/threads/NOTimothyLottes/2022-11-13-my-prefered-method-of-managing-application-data/index.md b/archive/threads/NOTimothyLottes/2022-11-13-my-prefered-method-of-managing-application-data/index.md
index e3d66b8..f0696c0 100644
--- a/archive/threads/NOTimothyLottes/2022-11-13-my-prefered-method-of-managing-application-data/index.md
+++ b/archive/threads/NOTimothyLottes/2022-11-13-my-prefered-method-of-managing-application-data/index.md
@@ -25,6 +25,6 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
My prefered method of managing application data was the 'self-modifying-binary': (a.) on launch copy binary to temp file, (b.) launch temp file, (c.) exit, (d.) now temp file execution can freely modify origional binary :)
diff --git a/archive/threads/NOTimothyLottes/2023-04-28-https-gpuopen-com-learn-rgp-1-15-enhanced-isa/index.md b/archive/threads/NOTimothyLottes/2023-04-28-https-gpuopen-com-learn-rgp-1-15-enhanced-isa/index.md
index 6c96152..22cf260 100644
--- a/archive/threads/NOTimothyLottes/2023-04-28-https-gpuopen-com-learn-rgp-1-15-enhanced-isa/index.md
+++ b/archive/threads/NOTimothyLottes/2023-04-28-https-gpuopen-com-learn-rgp-1-15-enhanced-isa/index.md
@@ -25,22 +25,22 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
https://gpuopen.com/learn/rgp-1-15-enhanced-isa-view/ Nice Disasm View :) - However op latency isn't useful. Need to see multiwave instruction trace across time, colored by instruction type, enhanced with mark if wave is waiting to issue a given functional unit. Only then will great optimization be possible.
-**2/**
+**2/** @NOTimothyLottes
It would also be best to see overlay of board power (because !/W is the end goal), and an overlay of exactly where there are bubbles in DRAM traffic. Because anything memory bound, the goal is to minimize DRAM bubbles. Need to see how they form dynamically over time to fix ...
-**3/**
+**3/** @NOTimothyLottes
For GPU profilers, might see say {92% ALU, 50% TEX, 21% L2}, then wonder, where is 8% I'm missing. And only way to start to understand that, is to be seeing how waves are executing instruction wise against each other. CPU-profiler-like averages per disassembly line won't cut it.
-**4/**
+**4/** @NOTimothyLottes
Parallel machines can only be understood by seeing the parallel execution. I still have examples today of taking a vanila 32-bit shader (already designed to be fast) and getting 30% returns on all micro optimizations.
-**5/**
+**5/** @NOTimothyLottes
Lastly, side with enabling. Remember people can learn too. And there is typically super skilled people seeded at all companies that teach others how to use advanced tools when they are available.
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrianKaris-great-to-see-these-return-still-have-any-of-the.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrianKaris-great-to-see-these-return-still-have-any-of-the.md
index a9a55c5..e1370ad 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrianKaris-great-to-see-these-return-still-have-any-of-the.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrianKaris-great-to-see-these-return-still-have-any-of-the.md
@@ -26,11 +26,11 @@ parent_post_id: "1653556990302470151"
## Branch
-**1/**
+**1/** @BrianKaris
@NOTimothyLottes Great to see these return. Still have any of the videos?
-**2/**
+**2/** @NOTimothyLottes
@BrianKaris I might, but will have to build a machine to attach the old drives. Too busy making new stuff
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrookeHodgman-i-remember-watching-all-of-these-blog-entries.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrookeHodgman-i-remember-watching-all-of-these-blog-entries.md
index d64d95a..418bc70 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrookeHodgman-i-remember-watching-all-of-these-blog-entries.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrookeHodgman-i-remember-watching-all-of-these-blog-entries.md
@@ -26,7 +26,7 @@ parent_post_id: "1653556990302470151"
## Branch
-**1/**
+**1/** @BrookeHodgman
@NOTimothyLottes I remember watching all of these blog entries fondly ❤
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-Karyuutensei-is-the-blog-still-up-somewhere.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-Karyuutensei-is-the-blog-still-up-somewhere.md
index 05a4f1c..6423f95 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-Karyuutensei-is-the-blog-still-up-somewhere.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-Karyuutensei-is-the-blog-still-up-somewhere.md
@@ -26,15 +26,15 @@ parent_post_id: "1653556990302470151"
## Branch
-**1/**
+**1/** @Karyuutensei
@NOTimothyLottes Is the blog still up somewhere?
-**2/**
+**2/** @NOTimothyLottes
@Karyuutensei No but I have archives in pieces on old hard drives. So there is a chance I might restore it some day.
-**3/**
+**3/** @Karyuutensei
@NOTimothyLottes Speaking of archives, http://archive.org has some from the blogspot here https://web.archive.org/web/20160427173127/http://timothylottes.blogspot.com/ but basically nothing from the github page :S
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-oconnorkg-did-you-write-an-engine-called-atom-talked-about.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-oconnorkg-did-you-write-an-engine-called-atom-talked-about.md
index c4fc2e7..d075e60 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-oconnorkg-did-you-write-an-engine-called-atom-talked-about.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-oconnorkg-did-you-write-an-engine-called-atom-talked-about.md
@@ -26,11 +26,11 @@ parent_post_id: "1653556990302470151"
## Branch
-**1/**
+**1/** @oconnorkg
@NOTimothyLottes Did you write an engine called Atom? Talked about it on the http://OpenGL.org forum?
-**2/**
+**2/** @NOTimothyLottes
@oconnorkg There was also Atomontage or something like that by another person. I had a project called Atom, but I don't remember if I was on the OGL message board
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-i-remember-all-those-fondly-i-also-remembered-the.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-i-remember-all-those-fondly-i-also-remembered-the.md
index b750a42..7614355 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-i-remember-all-those-fondly-i-also-remembered-the.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-i-remember-all-those-fondly-i-also-remembered-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1653556990302470151"
## Branch
-**1/**
+**1/** @won3d
@NOTimothyLottes I remember all those fondly. I also remembered the trick you did to batch logical draw calls with branching in the shader
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-my-former-thesis-advisor-was-a-big-proponent-of.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-my-former-thesis-advisor-was-a-big-proponent-of.md
index a8fbf57..8b7e4c3 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-my-former-thesis-advisor-was-a-big-proponent-of.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-my-former-thesis-advisor-was-a-big-proponent-of.md
@@ -26,15 +26,15 @@ parent_post_id: "1653559205360553985"
## Branch
-**1/**
+**1/** @won3d
@NOTimothyLottes My former thesis advisor was a big proponent of forth. Apparently SunOS used forth in preboot and you could do all sorts of wacky things. He interfaced with custom compute accelerators this way. I agree that concatenantive programming languages are underexplored
-**2/**
+**2/** @NOTimothyLottes
@won3d I think it is less the exact form of the language but more 'the way to make things simple' that truely important now.
-**3/**
+**3/** @won3d
@NOTimothyLottes There's something about Forth-style composition that is has a very nice appeal. It really seems to marry syntax and semantics very directly (but I can appreciate it at a distance, having not done any real work in it as you have)
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-04-Laxer3A-this-is-when-i-learned-about-your-work-and-found.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-04-Laxer3A-this-is-when-i-learned-about-your-work-and-found.md
index 243fb50..11ba58b 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-04-Laxer3A-this-is-when-i-learned-about-your-work-and-found.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-04-Laxer3A-this-is-when-i-learned-about-your-work-and-found.md
@@ -26,7 +26,7 @@ parent_post_id: "1653570742762479620"
## Branch
-**1/**
+**1/** @Laxer3A
@NOTimothyLottes This is when I learned about your work and found it incredible. Nowadays with 4K / 8K, people are really craving for a very good shader/model to emulate as close as possible the CRT feel for arcade / old console etc. (I am serious)
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-06-arm1n-thanks-for-digging-those-up-great-stuff-very.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-06-arm1n-thanks-for-digging-those-up-great-stuff-very.md
index 509f7c4..9303f43 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-06-arm1n-thanks-for-digging-those-up-great-stuff-very.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-06-arm1n-thanks-for-digging-those-up-great-stuff-very.md
@@ -26,7 +26,7 @@ parent_post_id: "1653556990302470151"
## Branch
-**1/**
+**1/** @arm1n
@NOTimothyLottes Thanks for digging those up! Great stuff, very inspiring.
diff --git a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/index.md b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/index.md
index a9ca549..7d311c4 100644
--- a/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/index.md
+++ b/archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Found some of my old blogs: thread looking back an image at a time. 2007, ellipsoid l-system sprites with temporal feedback, yes temporal reprojection in 2007.
@@ -33,13 +33,13 @@ Found some of my old blogs: thread looking back an image at a time. 2007, ellips
Branches: [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-i-remember-all-those-fondly-i-also-remembered-the]], [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrianKaris-great-to-see-these-return-still-have-any-of-the]], [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-Karyuutensei-is-the-blog-still-up-somewhere]], [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-BrookeHodgman-i-remember-watching-all-of-these-blog-entries]], [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-oconnorkg-did-you-write-an-engine-called-atom-talked-about]], [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-06-arm1n-thanks-for-digging-those-up-great-stuff-very]]
-**2/**
+**2/** @NOTimothyLottes
2007 particle based fluid sim mixed with spring model, this was 2D to work out ideas for later 3D implementation, rastered particle properties along particle paths into mip tree to enable high-speed collision
-**3/**
+**3/** @NOTimothyLottes
2007 crazy custom language and live editor for x86-64, color forth is like a virus of the mind, no going back once the understanding is there, and the evolutions of those ideas are ground breaking
@@ -47,7 +47,7 @@ Branches: [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blog
Branches: [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blogs-thread-looking-back-an/2023-05-03-won3d-my-former-thesis-advisor-was-a-big-proponent-of]]
-**4/**
+**4/** @NOTimothyLottes
2010 digital photography, was compositing exposure brackets to get 16-bit tiffs with good dynamic range and did my own development tools (which had some major flaws I'd only learn about much later in life)
@@ -56,51 +56,51 @@ Branches: [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blog
-**5/**
+**5/** @NOTimothyLottes
2011 Was using temporal reprojection in my own engines for a while. Posted TSSAA source, an early TAA using viewport jitter for tri raster. I was mostly convinved this was a tech dead end due to the challenges of thin flicker. Decade+ later, and this story has a lot more to it ..
-**6/**
+**6/** @NOTimothyLottes
2011 A simple GIF showing the challenges of {perceptual vs linear} filtering with temporal aliasing high frequency content with {small to large kernel windows}. No negative lobes here.
-**7/**
+**7/** @NOTimothyLottes
2014 simple anti-aliased point based CS rendering engine with fisheye output using stocastic/stratified visiblity and GPU-side scene graph
-**8/**
+**8/** @NOTimothyLottes
2014 simple non-temporal spatial AA using rotated viewport to provide a good sample distribution with standard non-AA triangle rendering
-**9/**
+**9/** @NOTimothyLottes
2014 monochrome 120 hz laptop ray marcher desiged for VR, fixed cost trace, leaving scene with holes, temporal holefilling reprojection, faked 'lighting' using hierarchical + directional distance probing in lower LOD scene representations, was amazing to just fly around in there
-**10/**
+**10/** @NOTimothyLottes
2014 was amazing how nice it was possible to get the geometry even when tracing only 1/8 the screen pixels per frame, stratified sample pattern really does wonders to neighborhood stability, no flicker at all
-**11/**
+**11/** @NOTimothyLottes
2014 still distracted by custom code generation and languages, running stuff on CRTs with custom live editors (color forth like), generating binaries with ELF header generation inside the code itself
-**12/**
+**12/** @NOTimothyLottes
2015 some more images inside the live fractal tracer
@@ -108,13 +108,13 @@ Branches: [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blog
-**13/**
+**13/** @NOTimothyLottes
2015 crazy mini x86 OS project (bootloader source below), using codeless binary editor with annotation. Everyone should try generating binaries with no assembler, learn alot in the process
-**14/**
+**14/** @NOTimothyLottes
2015 live realtime 120+ hz on laptop tracer now with spatial/temporal reconstruction on 1 shaded/sample per ray for 'fake' lit fog, did a lot of z based logic in the spatial/temporal reconstruction, realized later I was relying on the 120 Hz to hide perceptual artifacts
@@ -123,14 +123,14 @@ Branches: [[archive/threads/NOTimothyLottes/2023-05-03-found-some-of-my-old-blog
-**15/**
+**15/** @NOTimothyLottes
2015 still doing the crazy custom languages and tiny OS projects. I feel like there is a real loss in computer evolution, imagine a machine with C64 simplicity that evolved to have a massively parallel vector machine. It would be amazing. It would be approachable by one person.
-**16/**
+**16/** @NOTimothyLottes
2015 did some custom CPU-side CRT shader tools for high resolution physical paper prints for someone's book. Wasn't trying to be physically accurate, but rather provide the feeling you'd get from a CRT in paper print form
diff --git a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-NOTimothyLottes-or-for-an-apu-a-way-to-have-the-storage-device.md b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-NOTimothyLottes-or-for-an-apu-a-way-to-have-the-storage-device.md
index f34e72f..d2ac470 100644
--- a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-NOTimothyLottes-or-for-an-apu-a-way-to-have-the-storage-device.md
+++ b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-NOTimothyLottes-or-for-an-apu-a-way-to-have-the-storage-device.md
@@ -26,69 +26,69 @@ parent_post_id: "1671276990987370501"
## Branch
-**1/**
+**1/** @NOTimothyLottes
Or for an APU, a way to have the storage device write direct to DRAM in pages setup for use on the GPU, because anything the CPU writes that the GPU reads is stuck on the strangled snooping bus or the strangled WC buffer limit on store.
-**2/**
+**2/** @NOTimothyLottes
If the app tried to manage GPU memory oversubscription via these strangled CPU mappings you'd literally see many second stalls. One can only assume the kernel can do storage<->DRAM DMA for managing GPU DRAM oversubscription?
-**3/**
+**3/** @NOTimothyLottes
Even if could fill VRAM in 1 sec, just 2x oversubscription of VRAM implies 1 sec delay to context switch (assuming 2 apps accessing all meM). So classic VM multitasking is useless. Only single app focus model with pinned memory makes any useful sense. Release pin on focus change.
-**4/**
+**4/** @NOTimothyLottes
The trend is massive res massive VRAM paired with tiny IO bus. So the case for pinned memory and bus master transfers only grows importance as things evolve.
-**5/**
+**5/** @NOTimothyLottes
Back to SteamDeck numbers: GTT (HOST_VISIBLE) + USWC (non-HOST_CACHED) takes 1 sec for 1st 4 GiB BO alloc, but *30 sec* for 2nd 4 GiB alloc. Kernel driver time for memory allocation (maybe page table related) can be brutal (general comment for PCs too).
-**6/**
+**6/** @NOTimothyLottes
Related, I think Chips&Cheese CPU/GPU link DMA and Compute Bandwidths are only measured to a GTT+USWC buffer (only supporting useless uncached CPU reads). Bandwidth exceeds the CPU's bus capacity, implies it is 'garlic' or GPU bus only accesses, direct to DRAM ...
-**7/**
+**7/** @NOTimothyLottes
Since RADV+AMDVLK don't support user-space CPU mapped flush | invalidate, this implies the only supported mapping to read from DRAM direct is USWC (uncached R and write+combine W) ...
-**8/**
+**8/** @NOTimothyLottes
Doing GPU stores to a CPU mapped GTT without USWC would be crippingly slow (limited by the snooping bus rate). But this is unfortunately the only option available for CPU read back. So if doing a shader store, it better be only a few waves and running in parallel.
-**9/**
+**9/** @NOTimothyLottes
"Use GTT because it's as fast as VRAM on the Deck", could only work if GTT+USWC, as that would be only way to get Garlic (direct to DRAM high bandwidth bus). GTT without USWC would need Onion (slow snooping bus) because AMDgpu's only no-CPU map option is for VRAM!
-**10/**
+**10/** @NOTimothyLottes
Summary of the theory on best Steam Deck practices. This is the plan for my deck-compute-only driver too. Theory -> as in I haven't yet verified the GPU-side parts (my driver isn't that far along yet).
-**11/**
+**11/** @NOTimothyLottes
Possible to do better? MAYBE! CPU readback actually has 2 problems, 1st the slow GPU-side copy (4 GiB copy via snooping bus could be almost 4 sec, but direct to DRAM via USWC might be just 160 ms). Also CPU only has 4 MiB of L3, so the majority of 4 GiB will be uncached later ...
-**12/**
+**12/** @NOTimothyLottes
Believe UC MTYPE (uncached) forces the CPU into serialized behavior. My test was single thread 8-byte/access reads. https://uops.info/html-instr/VMOVDQA_M256_YMM.html#ZEN2 Looks like Zen2 might be able to get 32-byte/access via VMOVDQA, and going multi-threaded (8 thread), that might be a 32x speed up ..
-**13/**
+**13/** @NOTimothyLottes
If so might be able to approach under a GB/s for the CPU-side part (UC multithread via VMOVDQA), which would be close enough to the non-USWC running single threaded using the cache.
-**14/**
+**14/** @NOTimothyLottes
What you'd really want here as a band-aid workaround is ability for the GPU to act as if the CPU map was USWC (so go direct to DRAM), but have the CPU map act as non-USWC, so it goes through the cache. Then some kind of hack to flush the tiny 4 MiB L3 and lower caches on the CPU.
-**15/**
+**15/** @NOTimothyLottes
CPU readback (reading and summing 8-byte) GTT without USWC:
@@ -98,7 +98,7 @@ CPU readback (reading and summing 8-byte) GTT without USWC:
Going multi-core on cached readback doesn't really help much. Proper test, parked threads waiting on futex, signal, last-1st active core timing.
-**16/**
+**16/** @NOTimothyLottes
Now CPU readback GTT+USWC
@@ -108,11 +108,11 @@ Now CPU readback GTT+USWC
So measurements match theory, going multi-core with MOVNTDQA uncached read on GTT+USWC can be made to match 1 thread GTT (without USWC)
-**17/**
+**17/** @NOTimothyLottes
Both those results above had been using a pair of 4 GiB allocations. The GTT+USWC one used one 4 GiB GTT+USWC for timing, and one 4 GiB GTT (unused). And that test suffered from a 30 sec GTT BO allocation. So something was going very wrong in the page mapping ...
-**18/**
+**18/** @NOTimothyLottes
When I rerun same test with just one 4 GiB GTT+USWC allocation, the 30 sec stall is gone, and the performance also changes:
@@ -122,38 +122,38 @@ Oh!
Perhaps there is some resource limit that kills perf if too much memory gets mapped, page faults?
-**19/**
+**19/** @NOTimothyLottes
Top with thread cumulative results doesn't show anything significantly different between the 4 GiB and 8 GiB runs in terms of page faults ... suggests it must be something else
-**20/**
+**20/** @NOTimothyLottes
And yet there is obviously a bug in my multi-core tests, you can tell directly from the page fault numbers, only one thread is taking all the faults. So it is back to finding my coding error (fail).
-**21/**
+**21/** @NOTimothyLottes
Lunch break and fixed the bug. Two runs now and leaving threads open to get TOP results. First run definitely soaks up the page faults, second run is page fault free (expected). Both around only 7 GB/s.
-**22/**
+**22/** @NOTimothyLottes
And the 8 GiB of BO mapped, but only 4 GiB used run. The first pass gets only 1 GiB/s and the second gets 7 GiB/s. Page fault number is similar to last run, can only conclude page fault costs exploded?
-**23/**
+**23/** @NOTimothyLottes
30 sec BO alloc time + super low bandwidth on 1st pass only (where page faults happen) suggest that Linux Kernel logic explodes in cost if too many pages are used in this way ...
-**24/**
+**24/** @NOTimothyLottes
~8K faults for 512 MiB accessed / thread = 64 KiB/fault ... X86-64 has either 4 KiB or 2 MiB for page size. So not using large pages (fail). Probably mapping 16 pages per fault. Not sure if this implies anything about GPU page size (but certainly hoping it isn't 4 KiB, ouch).
-**25/**
+**25/** @NOTimothyLottes
Some other very rough measured numbers of GTT+USWC with 8 cores splitting 4 GiB of BO.
@@ -163,11 +163,11 @@ Some other very rough measured numbers of GTT+USWC with 8 cores splitting 4 GiB
I think these seem plausable now (so maybe no more code bugs).
-**26/**
+**26/** @NOTimothyLottes
One takeaways of all this, is that you need to pre-warm the page tables for large mapped buffers (by touching all pages) when the user isn't waiting on results. And if you are doing batch jobs that {open device, send data to GPU, get data back, close device} you are screwed!
-**27/**
+**27/** @NOTimothyLottes
And lastly (maybe) comparison of GTT and GTT+USWC both 8 threads splitting streaming through 4 GiB of mapping (second pass, no page fault issues):
@@ -175,55 +175,55 @@ R> ~14 GiB/s (GTT) and ~7 GiB/s (GTT+USWC)
W+R> ~14 GiB/s (GTT) and ~10 GiB/s (GTT+USWC)
W> ~13 GiB/s (GTT) and ~15 GiB/s (GTT+USWC)
-**28/**
+**28/** @NOTimothyLottes
So an alternative option summary for those who don't want the extra GPU-side GPU to CPU mapped buffer copy step.
-**29/**
+**29/** @NOTimothyLottes
If anyone is looking to repro the 30 sec stall: amdgpu_bo_alloc() one 4 GiB GTT+USWC, then one 4 GiB GTT buffer, the second alloc causes the Deck to become unresponsive for 30 seconds
-**30/**
+**30/** @NOTimothyLottes
madvise() with MADV_HUGEPAGE on mapped 4 GiB region doesn't do anything (still faults at 64 KiB granularity), and none of these MADV_{WILLNEED|POPULATE_READ|POPULATE_WRITE} have any effect either (still waits until use before faulting, causing low initial effective bandwidth)
-**31/**
+**31/** @NOTimothyLottes
64KiB strided write through 4 GiB GTT+USWC (to pre-fault) costs the same as writing full 4 GiB, roughly 3 seconds. So it is quite literally massive page fault overhead for 1st access. No possible workaround found at this time for initial load time problems.
-**32/**
+**32/** @NOTimothyLottes
If doing two 4 GiB GTT+USWC allocations, there is also a 30 second BO allocate cost on the 2nd one. And this makes the initial page fault cost for access to the first 4 GiB take another 30 seconds. Effectively hangs the machine for a full minute.
-**33/**
+**33/** @NOTimothyLottes
Doing two 4 GiB GTT allocations (without USWC), doesn't incure any of the 30 second stalls. So that problem is specific to big USWC allocations. However the initial access page fault problem (extra 3 seconds) is there, so a 2ndary problem with just mapping lots of APU memory.
-**34/**
+**34/** @NOTimothyLottes
Allocation of one 4 GiB GTT first then a 4 GiB GTT+USWC doesn't see the 30 second allocation stall. Almost like anything post a big USWC alloc is poisioned. And after mapping both, then accessing the GTT only, the 30 second time for page faulting comes back.
-**35/**
+**35/** @NOTimothyLottes
Continuing from before, even if you don't map the 2nd GTT+USWC, the 30 second initial page faulting time is still there, so the act of mapping doesn't matter, simply doing the BO allocation had already doomed the Linux page management.
-**36/**
+**36/** @NOTimothyLottes
Despite header docs which imply flag only works on DOMAIN_VRAM, using DOMAIN_GTT+AMDGPU_GEM_CREATE_NO_CPU_ACCESS is apparently what you want for non-mapped GTT allocations. Mapped 4 GiB GTT with 4 GiB GTT+NO_CPU, drops the initial page fault time from 30 seconds to 3 sec.
-**37/**
+**37/** @DaveAirlie
@NOTimothyLottes the problem there is usually tiling, GPUs expect graphicy things in VRAM to be tiled in very specific ways, it's hard to have a storage device do that. Using a transfer engine that can tile/detile makes a lot more sense.
-**38/**
+**38/** @NOTimothyLottes
@DaveAirlie The obvious elephant is an engine using only buffers for resource streaming and doing its own GPU-side decompression. This is practical NOW and portable too. But the lack of a bus master no-CPU direct storage transfer is a serious problem for throughput.
-**39/**
+**39/** @NOTimothyLottes
@DaveAirlie See raw texture streaming (even with lossless compression) is way less interesting now given modern massive data tech direction, u want substantially better lossy compression simply to fit in launch constraints. So really, buffers are the way to go anyway :)
diff --git a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-SheriefFYI-great-thread.md b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-SheriefFYI-great-thread.md
index 4f47a34..5d7a2ee 100644
--- a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-SheriefFYI-great-thread.md
+++ b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-SheriefFYI-great-thread.md
@@ -26,7 +26,7 @@ parent_post_id: "1671276990987370501"
## Branch
-**1/**
+**1/** @SheriefFYI
@NOTimothyLottes Great thread!
diff --git a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-never_released-on-linux-nvidia-has-a-very-good-uvm-however-the.md b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-never_released-on-linux-nvidia-has-a-very-good-uvm-however-the.md
index dc36a47..6068575 100644
--- a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-never_released-on-linux-nvidia-has-a-very-good-uvm-however-the.md
+++ b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/2023-06-20-never_released-on-linux-nvidia-has-a-very-good-uvm-however-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1671276990987370501"
## Branch
-**1/**
+**1/** @never_released
@NOTimothyLottes On Linux, NVIDIA has a very good UVM.
diff --git a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/index.md b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/index.md
index 00d73b2..cec7597 100644
--- a/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/index.md
+++ b/archive/threads/NOTimothyLottes/2023-06-20-how-about-a-mega-thread-on-the-mechanics-of-cpu/index.md
@@ -25,55 +25,55 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
How about a mega thread on the mechanics of CPU/GPU communication. Using AMDgpu based timing results on the SteamDeck an example, but relating to the larger picture of PC GFX APIs like Vulkan/etc. I don't claim to know all, so experts feel free to add your wisdom :)
-**2/**
+**2/** @NOTimothyLottes
Both RADV and AMDVLK: Flush/invalidate mapped memory ranges is a NOP. So bus-crossing dGPU traffic to HOST_VISIBLE is automatically snooping CPU caches. The one without HOST_CACHED, is Write+Combined [WC] on store, and Uncached [UC] on read. The one with HOST_CACHED is non-WC/UC
-**3/**
+**3/** @NOTimothyLottes
In AMDgpu (the kernel driver), likely DEVICE_LOCAL maps to AMDGPU_GEM_DOMAIN_VRAM (also the carve out on APUs) and the non-DEVICE_LOCAL maps to AMDGPU_GEM_DOMAIN_GTT
-**4/**
+**4/** @NOTimothyLottes
AMD+RADV added {DEVICE_COHERENT_BIT_AMD,
DEVICE_UNCACHED_BIT_AMD} variations to the core 4 memory types. Likely to support GPU crash debug. But also provides a way to avoid needing to write-back (flush) GPU caches before CPU read. Likely AMDgpu kernel flag mapping below.
-**5/**
+**5/** @NOTimothyLottes
This AMDGPU_GEM_CREATE_CPU_GTT_USWC appear to toggle on WriteCombine [WC] for CPU store, and Uncached [US] for CPU reads (cases of HOST_VISIBLE without HOST_CACHED)
-**6/**
+**6/** @NOTimothyLottes
For review from https://chipsandcheese.com/2023/03/05/van-gogh-amds-steam-deck-apu/ Deck bandwidths: ~71 GB/s GPU, ~43 GB/s DMA, ~34 GB/s shader copy CPU<->GPU, ~25 GB/s CPU/CPU, and damn, brutal 0.27 GB/s CPU mapped GPU buffer reads, 0.71 GB/s CPU mapped GPU buffer writes
-**7/**
+**7/** @NOTimothyLottes
And going direct to AMDgpu instead of VK on the Deck shows these kinds of bandwidths (non-DEVICE_LOCAL, HOST_VISIBLE with HOST_CACHED and without). So using Write-Combined is amazingly painful for stores.
-**8/**
+**8/** @NOTimothyLottes
Implies that the choices one might make on dGPU PC don't necessarily port over to APUs at all. Another challenge: it takes almost 7 seconds to zero-fill using a 64-bit store for() loop the 8-GiB of mapped memory. Hints at why load times are such a challenge even in the best case.
-**9/**
+**9/** @NOTimothyLottes
This all hints at why PC OS derived systems are lacking in stuffing GPU VRAM. Really need some kind of bus mastered DMA (zero-copy) between non-volatile storage (disk) and GPU DRAM to avoid this CPU-touching performance tax.
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-SebAaltonen-would-be-nice-to-talk-a-full-presentation-about.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-SebAaltonen-would-be-nice-to-talk-a-full-presentation-about.md
index cc885a7..c6ac7a9 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-SebAaltonen-would-be-nice-to-talk-a-full-presentation-about.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-SebAaltonen-would-be-nice-to-talk-a-full-presentation-about.md
@@ -26,13 +26,13 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @SebAaltonen
@NOTimothyLottes Would be nice to talk a full presentation about this topic, but people want me to show cool tech and pretty pixels instead. Maybe one day.
I will save your image for that day (if I get approval to use it), since Twitter search is super bad.
-**2/**
+**2/** @NOTimothyLottes
@SebAaltonen "Approval", haha, sure it's covered under my favorite license
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-_spolsh-once-in-a-while-people-need-to-be-reminded-to.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-_spolsh-once-in-a-while-people-need-to-be-reminded-to.md
index 5bbc205..68bf3ec 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-_spolsh-once-in-a-while-people-need-to-be-reminded-to.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-_spolsh-once-in-a-while-people-need-to-be-reminded-to.md
@@ -26,12 +26,12 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @_spolsh
@NOTimothyLottes Once in a while people need to be reminded to stop the bloat, understand the machine guts and be self aware about productive process
https://tonsky.me/blog/disenchantment/
-**2/**
+**2/** @NOTimothyLottes
@_spolsh That was a fantastic read, thanks
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-domipheus-i-like-this-given-i-never-write-code-any-more.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-domipheus-i-like-this-given-i-never-write-code-any-more.md
index c7f41e7..e35519b 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-domipheus-i-like-this-given-i-never-write-code-any-more.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-domipheus-i-like-this-given-i-never-write-code-any-more.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @domipheus
@NOTimothyLottes I like this, given I never write code any more.
sadly i am still a grumpy git.
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-leonard_coder-4e71-if-you-know-you-know.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-leonard_coder-4e71-if-you-know-you-know.md
index d3d4c4c..ffda9ea 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-leonard_coder-4e71-if-you-know-you-know.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-06-30-leonard_coder-4e71-if-you-know-you-know.md
@@ -26,12 +26,12 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @leonard_coder
@NOTimothyLottes $4e71
if you know, you know
-**2/**
+**2/** @NOTimothyLottes
@leonard_coder ${EA, 1A, 3A, 5A, 7A, DA, or FA}
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-CodingFiend-i-designed-a-language-beads-which-uses-a-graph-db.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-CodingFiend-i-designed-a-language-beads-which-uses-a-graph-db.md
index 6c28f1e..3fa191c 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-CodingFiend-i-designed-a-language-beads-which-uses-a-graph-db.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-CodingFiend-i-designed-a-language-beads-which-uses-a-graph-db.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @CodingFiend
@NOTimothyLottes @Jonathan_Blow i designed a language Beads, which uses a graph DB, has no memory allocation, super modular, approaches this minimalism as close as humanly possible, but billable hour / job security seeking programmers refuse to try it
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-DefenceForceOrg-many-games-used-to-be-like-that-at-least-the-ones.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-DefenceForceOrg-many-games-used-to-be-like-that-at-least-the-ones.md
index 2fbf184..b7113fc 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-DefenceForceOrg-many-games-used-to-be-like-that-at-least-the-ones.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-DefenceForceOrg-many-games-used-to-be-like-that-at-least-the-ones.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @DefenceForceOrg
@NOTimothyLottes Many games used to be like that, at least the ones without dynamic content, mods, etc...
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-PierreTerdiman-i-was-calling-it-disoriented-programming-just-the.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-PierreTerdiman-i-was-calling-it-disoriented-programming-just-the.md
index b41c2d0..177bccf 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-PierreTerdiman-i-was-calling-it-disoriented-programming-just-the.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-PierreTerdiman-i-was-calling-it-disoriented-programming-just-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @PierreTerdiman
@NOTimothyLottes I was calling it "disoriented programming" just the other day.
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-SimonNordon-nop-is-ideal.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-SimonNordon-nop-is-ideal.md
index 8311617..b4787d0 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-SimonNordon-nop-is-ideal.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-SimonNordon-nop-is-ideal.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @SimonNordon
@NOTimothyLottes NOP is ideal.
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-TimSweeneyEpic-can-teach-it-in-abstinence-only-programming.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-TimSweeneyEpic-can-teach-it-in-abstinence-only-programming.md
index f73f26e..d68ac16 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-TimSweeneyEpic-can-teach-it-in-abstinence-only-programming.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-TimSweeneyEpic-can-teach-it-in-abstinence-only-programming.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @TimSweeneyEpic
@NOTimothyLottes Can teach it in abstinence-only programming classes!
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-asparagiii-looks-like-a-koala.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-asparagiii-looks-like-a-koala.md
index c621561..1f9c388 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-asparagiii-looks-like-a-koala.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-asparagiii-looks-like-a-koala.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @asparagiii
@NOTimothyLottes Looks like a koala
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-azeke1984-best-software-is-absense-of-it-https-en-wikipedia.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-azeke1984-best-software-is-absense-of-it-https-en-wikipedia.md
index b9feb6d..e453d9c 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-azeke1984-best-software-is-absense-of-it-https-en-wikipedia.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-azeke1984-best-software-is-absense-of-it-https-en-wikipedia.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @azeke1984
@NOTimothyLottes Best software is absense of it:
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-claudiogonzalo-c-to-c.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-claudiogonzalo-c-to-c.md
index 11ea23b..4080173 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-claudiogonzalo-c-to-c.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-claudiogonzalo-c-to-c.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @claudiogonzalo
@NOTimothyLottes c++ to √c
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-helpful_signage-folks-theyre-calling-it-computer-oriented.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-helpful_signage-folks-theyre-calling-it-computer-oriented.md
index 8de7b96..d67be85 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-helpful_signage-folks-theyre-calling-it-computer-oriented.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-helpful_signage-folks-theyre-calling-it-computer-oriented.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @helpful_signage
@NOTimothyLottes Folks, they're calling it "computer oriented programming". It's where you stop trying to impress peers and just tell the computer the best way to do things
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-mike_acton-thread.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-mike_acton-thread.md
index 0c486d2..0101be7 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-mike_acton-thread.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-01-mike_acton-thread.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @mike_acton
@NOTimothyLottes
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-09-wyattscarpenter-https-github-com-wyattscarpenter-wu.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-09-wyattscarpenter-https-github-com-wyattscarpenter-wu.md
index 0637fc8..f5694c1 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-09-wyattscarpenter-https-github-com-wyattscarpenter-wu.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/2023-07-09-wyattscarpenter-https-github-com-wyattscarpenter-wu.md
@@ -26,7 +26,7 @@ parent_post_id: "1674757854471806977"
## Branch
-**1/**
+**1/** @wyattscarpenter
@NOTimothyLottes https://github.com/wyattscarpenter/wu
diff --git a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/index.md b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/index.md
index c7cf086..da2b862 100644
--- a/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/index.md
+++ b/archive/threads/NOTimothyLottes/2023-06-30-nothing-oriented-programming-nop/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
"Nothing Oriented Programming" (NOP). Where the goal is to achieve minimal enlightenment by writing as little possible code: no dynamic memory allocation, no thousand files of glue, no includes, no objects. Write nothing, be happy. Even applied it to the logo, zero effort.
diff --git a/archive/threads/NOTimothyLottes/2023-08-03-spc-left-off-with-key-and-gamepad-input-gpu/index.md b/archive/threads/NOTimothyLottes/2023-08-03-spc-left-off-with-key-and-gamepad-input-gpu/index.md
index f9010ec..4b75fb9 100644
--- a/archive/threads/NOTimothyLottes/2023-08-03-spc-left-off-with-key-and-gamepad-input-gpu/index.md
+++ b/archive/threads/NOTimothyLottes/2023-08-03-spc-left-off-with-key-and-gamepad-input-gpu/index.md
@@ -25,38 +25,38 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
SPC: Left off with KEY and GAMEPAD input GPU-accessable. NOP design, no functions, no API, just a fixed VA address and data format to read, dead easy.
-**2/**
+**2/** @NOTimothyLottes
Wrote some console data dumping to aid in bringing up HID parsers for Deck and three generations of PlayStation controllers. Apparently XBox controllers aren't HIDs so not sure how one is supposed to access those.
-**3/**
+**3/** @NOTimothyLottes
Supporting hot plug was a bit of a mess, just trying to open devices every second. Adding open devices to an epoll. {Product, vendor} isn't enough to ID a device, too much aliasing, so I use packet size as well.
-**4/**
+**4/** @NOTimothyLottes
Open devices with matching packet size get set in a bit array, and I collect up to 4 of those device outputs to sent to the GPU. Special logic to always place Steam Deck controls last to make docking work well.
-**5/**
+**5/** @NOTimothyLottes
I'll have to tackle audio at some point, but I'm skipping networking for version 1. But otherwise SPC is good to move on to the next step, which is to build out the GPU side assembler & data editor. Which will be written in binary at first.
-**6/**
+**6/** @NOTimothyLottes
Project is roughly 2000 lines of C at this point. With no includes. Anyone have any suggestions for hosting let me know. Source will be released.
-**7/**
+**7/** @NOTimothyLottes
For anyone tuning in now, SPC is kind of like a Pico8, but instead of being a portable fantasy console, SPC turns the Steam Deck into an actual console for exclusive GPU assembly projects. The way consoles had been done before silly portability became the only focus.
diff --git a/archive/threads/NOTimothyLottes/2023-08-03-spc-using-8-deep-swap-all-aliasing-same-bo-image/index.md b/archive/threads/NOTimothyLottes/2023-08-03-spc-using-8-deep-swap-all-aliasing-same-bo-image/index.md
index bcae27d..c040578 100644
--- a/archive/threads/NOTimothyLottes/2023-08-03-spc-using-8-deep-swap-all-aliasing-same-bo-image/index.md
+++ b/archive/threads/NOTimothyLottes/2023-08-03-spc-using-8-deep-swap-all-aliasing-same-bo-image/index.md
@@ -25,26 +25,26 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
SPC: Using 8 deep swap all aliasing same BO (image) fixes Game Mode crash with external display. Pipelined load gets to black screen in 2 ms. Takes 460 ms to allocate 4 GiB GTT video ram, 558 ms to copy 256 MiB cart from page cache to USWC (page faults), all in parallel.
-**2/**
+**2/** @NOTimothyLottes
Clearing page cache to simulate a cold launch: Takes 1.5 sec to read 256 MiB from the stock SSD. This is worst case load time in desktop mode. Won't be any compile/etc after this. So literally in game at this point. Speed of light. This is how it is done.
-**3/**
+**3/** @NOTimothyLottes
Forgot the timing capture ... Load from SSD.
-**4/**
+**4/** @NOTimothyLottes
There are only 3 threads on load: (1.) to open X11 then spin doing present/keyboard, (2.) to open the AMDgpu device, SDMA copy after CART read, and then eventually spin doing dispatchs, (3.) one to load the CART from disk to mapped USWC GTT via read().
-**5/**
+**5/** @NOTimothyLottes
Something I don't know: does read() since it's kernel- side automatically get some multi-core parallelism? Not a good idea to manually thread the read() because SSD needs linear reads to be fast. Not possible to know if the reads are page cache hits in advance either ...
diff --git a/archive/threads/NOTimothyLottes/2023-08-06-1st-spc-project-to-be-based-on-vintage-640x480/index.md b/archive/threads/NOTimothyLottes/2023-08-06-1st-spc-project-to-be-based-on-vintage-640x480/index.md
index 116a066..e7b7801 100644
--- a/archive/threads/NOTimothyLottes/2023-08-06-1st-spc-project-to-be-based-on-vintage-640x480/index.md
+++ b/archive/threads/NOTimothyLottes/2023-08-06-1st-spc-project-to-be-based-on-vintage-640x480/index.md
@@ -25,22 +25,22 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
1st SPC project: to be based on vintage 640x480 render (VGA style), +fallback to 640x240 for 15 KHz arcade CRTs (PGM-esk), and CRT shader scaling on Deck and OLED/LCD. Use mix of render pixel aspect changes, running less than 480 lines, and letter-box to keep integer Y scaling.
-**2/**
+**2/** @NOTimothyLottes
My 15 KHz CRT output path when docked is HD Fury Nano (won't do <480p) doing HDMI to VGA, with a sync combiner (to workaround GBS-C bug), into GBS-C which line drops 480p ~60Hz to 240p ~60Hz and outputs component. The 640 width gets maintained even if some CRTs cannot resolve it.
-**3/**
+**3/** @NOTimothyLottes
Presents issues for UI, namely that my bitmap fonts need to look good in both 480p and 240p modes, so for editor (assembler) I'm going with a font that uses right angles and designed around 2x2 stroke width, in a 8x16 (pow2) bitmap, so 640x240p still gets a readable 8x8 (below)
-**4/**
+**4/** @NOTimothyLottes
The next challenge is overscan safety, since real non-VGA CRTs will be used in development. The Y axis has an easy fix, simply keep cursor pinned in the 'safe' zone, but still print lines in the overscan area (so they can be seen when attached to non-overscan CRTs/etc too).
diff --git a/archive/threads/NOTimothyLottes/2023-08-06-spc-rdna2-assembler-thread/index.md b/archive/threads/NOTimothyLottes/2023-08-06-spc-rdna2-assembler-thread/index.md
index adc9988..35fb116 100644
--- a/archive/threads/NOTimothyLottes/2023-08-06-spc-rdna2-assembler-thread/index.md
+++ b/archive/threads/NOTimothyLottes/2023-08-06-spc-rdna2-assembler-thread/index.md
@@ -25,75 +25,75 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
SPC: RDNA2 ASSEMBLER [thread] ... Did initial design plan this weekend. The aim is a GPU-side assembler+editor, building RDNA2 binary images for Steam Deck. Live edit, live data view, etc. Assembler and editor running in massive vectorized shader code.
-**2/**
+**2/** @NOTimothyLottes
Good reason not to use text input for assembler, instead will use a custom binary format, and treat all 32-bit words in the binary the exact same way (so massively parallel assembly step). This is parallel design 101.
-**3/**
+**3/** @NOTimothyLottes
Some basics: RDNA2 instructions are 1-N 32-bit words. Each of the 32-bit components have a bunch of fields. Will typically need 1-6 fields per 32-bit word, as will be joining some fields into one argument (like DLC/GLC) below.
-**4/**
+**4/** @NOTimothyLottes
Could argue that MIMG has the most fields, but in practice many of those fields will be joined (see example), and I'm not likely to be using NSA encoding. So still will only need maximum 6 arguments to build a 32-bit value.
-**5/**
+**5/** @NOTimothyLottes
Custom editor, using a custom font, designed for vintage CRTs. Wanted 5-character symbol names for easy packing in 30-bit values. So setup a 6-bit character table. This is using a modified 'right-angle-only' font (like the one below). So some glyphs alias, and only upper case.
-**6/**
+**6/** @NOTimothyLottes
Will need some kind of symbol table, what ends up providing the arguments to the rules that build the 32-bit words that comprise the final binary. The symbol indirection provides a way to name registers for example, and then change the register mapping later.
-**7/**
+**7/** @NOTimothyLottes
Notice SMEM ops have 21-bit immediate offsets. I'll use 20-bits of that for an absolute positive offset from KART base. 1 MiB of easy data. The editor will relink tagged symbols that represent offsets automatically.
-**8/**
+**8/** @NOTimothyLottes
Next will need a collection of rules, how to join the 6 possible symbol arguments together. Rules for example for each of the RDNA2 instruction encodings (VOPC, etc). This reduces to just a 6 entry 5-bit left shift amount associated with each argument.
-**9/**
+**9/** @NOTimothyLottes
But will need a 7th argument, hard coded to a signed 16-bit *4 relative offset as this is how RDNA2 does all it's relative branches. This will be setup inside the editor to auto relink as source is edited.
-**10/**
+**10/** @NOTimothyLottes
Source then is simple, two 128-bit values per 32-bit word in the binary. One to select {RULE, SYMBOLS, RELATIVE BRANCH}, and another for {LABEL, COMMENT}.
-**11/**
+**11/** @NOTimothyLottes
And then the source editor, shows a line per 32-bit value (so VOP3's for example would take 2 lines). So the 'assembler' is deceptively simple, but powerful enough to do everything required to generate GPU binary code. And all the opcode generation is in the data itself :)
-**12/**
+**12/** @NOTimothyLottes
The editor itself will have 3 views {symbol table, rule table, source table}. The editor itself will use 2 copies of everything, so each edit, it's one entry/lane, reading prior state and updating to the new. Dead simple, dead parallel (not necessarily efficient) :)
-**13/**
+**13/** @NOTimothyLottes
Yeah, perhaps wildly alien. But for those who grew up with MOD-like trackers (like Impulse Tracker below), the interface will almost feel like home (those had simple {instrument, pattern, arangement} editors, with a very spreadsheet feel).
diff --git a/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/2023-08-10-BlurBusters-very-interesting-crosstalk-from-voltage-inversion.md b/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/2023-08-10-BlurBusters-very-interesting-crosstalk-from-voltage-inversion.md
index d2785d3..0341d61 100644
--- a/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/2023-08-10-BlurBusters-very-interesting-crosstalk-from-voltage-inversion.md
+++ b/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/2023-08-10-BlurBusters-very-interesting-crosstalk-from-voltage-inversion.md
@@ -26,33 +26,33 @@ parent_post_id: "1688491417109196800"
## Branch
-**1/**
+**1/** @BlurBusters
@NOTimothyLottes Very interesting "crosstalk from voltage inversion" artifact. Some repeating patterns or flicker patterns can trigger crosstalk artifacts too. Behavior varies a lot between TN, IPS, and VA, but all of them have to alternate voltage polarity spatially and temporally.
-**2/**
+**2/** @BlurBusters
@NOTimothyLottes Related reads:
https://www.lagom.nl/lcd-test/inversion.php
https://forums.blurbusters.com/viewtopic.php?t=7539
http://www.techmind.org/lcd/#:~:text=Inversion
-**3/**
+**3/** @NOTimothyLottes
@BlurBusters I appreciate the links. Came to the same conclusion, for LCDs when doing low scaling like 1:2x2 'CRT' emulation, I'll have to do a stylized blue noise phosphor pattern instead.
-**4/**
+**4/** @Ak4115x
@NOTimothyLottes @BlurBusters "VCOM inversion" -if wasn't line2line but frame2frame that'd "flicker" instead at half the refresh rate so that's why it's preferred& there's also another peculiarity of this scheme. Worth looking into, spent a few hours afternoon,it's late evening now maybe share another time.
-**5/**
+**5/** @BlurBusters
@Ak4115x @NOTimothyLottes Inversion algorithm is both spatial and temporal on all of them, regardless of spatial pattern of voltage inversion. Line to line is also frame to frame. (lines swaps voltage polarity in next frame)
-**6/**
+**6/** @Ak4115x
@BlurBusters @NOTimothyLottes LCOS has singular VCOM there's no pattern to it and no such artifact.
diff --git a/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/index.md b/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/index.md
index 85598fa..3d45731 100644
--- a/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/index.md
+++ b/archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
CRT emulation on LCDs can be hard. For example it's often easy to generate a pattern that causes a LCD hardware bug. NOT joking. Here is an example on the Steam Deck. The pattern in the window affects the scan (Deck scan is rotated) outside the window.
@@ -34,22 +34,22 @@ CRT emulation on LCDs can be hard. For example it's often easy to generate a pat
Branches: [[archive/threads/NOTimothyLottes/2023-08-07-crt-emulation-on-lcds-can-be-hard/2023-08-10-BlurBusters-very-interesting-crosstalk-from-voltage-inversion]]
-**2/**
+**2/** @NOTimothyLottes
The actual pattern is this (it's a 2x1 pixel checker of {G,RB}).
-**3/**
+**3/** @NOTimothyLottes
The theory: Deck's 90deg scan results in {(bottom)R, G, B (top)} sub-pixel components. So could alternate {G,RB} only per pixel in a checker pattern to generate a new sub-pixel pattern at a different resolution. In this case trying for 640x400 virtual resolution.
-**4/**
+**4/** @NOTimothyLottes
For virtual pixel, shift energy into masked virtual phosphor. So 50% brightness red, would be {100%, 0%} for {in, out} of phosphor pixels. Over 50% one starts to increase non-phosphor pixels until some maximum so mask is still visible, but brightness isn't too compromised.
-**5/**
+**5/** @NOTimothyLottes
Of course this is done in linear, so it's energy conserving in theory. But when the panel fails, it breaks down and doesn't work. I see this problem on a bunch of different devices. My personal AMD laptop has the exact same fail case (but rotated differently).
diff --git a/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/2023-08-18-tomcr2100-i-am-not-quite-sure-what-do-you-mean-by-subpixel.md b/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/2023-08-18-tomcr2100-i-am-not-quite-sure-what-do-you-mean-by-subpixel.md
index 59b8c52..6e5c105 100644
--- a/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/2023-08-18-tomcr2100-i-am-not-quite-sure-what-do-you-mean-by-subpixel.md
+++ b/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/2023-08-18-tomcr2100-i-am-not-quite-sure-what-do-you-mean-by-subpixel.md
@@ -26,15 +26,15 @@ parent_post_id: "1692560907988029769"
## Branch
-**1/**
+**1/** @tomcr2100
@NOTimothyLottes i am not quite sure what do you mean by subpixel scan? do you override the normal (refresh) scanout process?
-**2/**
+**2/** @NOTimothyLottes
@tomcr2100 It's like "clear-type" font rendering where if you know the LCD sub-pixel configuration for the RGB components of a pixel, you can do a much better job of computing and outputing the value at the specific RGB sub-pixel element. So i'm doing this for CRT-like emulation on the Deck
-**3/**
+**3/** @tomcr2100
@NOTimothyLottes just curious, i started doing something similar, but this year i have focused more on rest&recover. i went with a trilinear style aperture grill approximation, and just allow prim components to leak into the two others.
diff --git a/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/index.md b/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/index.md
index 4ccf941..62e23b4 100644
--- a/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/index.md
+++ b/archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/index.md
@@ -25,14 +25,14 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
SPC: CRT shader on the Deck. This time not doing subpix render. Yet RGB vs BGR order matters still. One way it becomes possible to simulate even spaced aperture grill (removing scan fx), and the other more of the scan effect.
-**2/**
+**2/** @NOTimothyLottes
Comparing all methods (grille, bad convergence scan, subpix scan)
@@ -40,13 +40,13 @@ Comparing all methods (grille, bad convergence scan, subpix scan)
-**3/**
+**3/** @NOTimothyLottes
The non-subpix scan has 1-pixel separation of RGB (intentional bad convergence) to help hide scaling. The subpix scan uses 1/3-pixel separation (less visible misaligned convergence). Pixel as in output pixel.
Branches: [[archive/threads/NOTimothyLottes/2023-08-18-spc-crt-shader-on-the-deck/2023-08-18-tomcr2100-i-am-not-quite-sure-what-do-you-mean-by-subpixel]]
-**4/**
+**4/** @NOTimothyLottes
The subpix version is definitely better. Because of the almost 3x doubling of scanline width detail, it just perceptually feels a lot cleaner and easier to reconstruct in the mind.
diff --git a/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/2023-08-18-Karyuutensei-how-many-passes-do-you-need-to-produce-this-result.md b/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/2023-08-18-Karyuutensei-how-many-passes-do-you-need-to-produce-this-result.md
index 2bd718f..838adbd 100644
--- a/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/2023-08-18-Karyuutensei-how-many-passes-do-you-need-to-produce-this-result.md
+++ b/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/2023-08-18-Karyuutensei-how-many-passes-do-you-need-to-produce-this-result.md
@@ -26,11 +26,11 @@ parent_post_id: "1692397318471926054"
## Branch
-**1/**
+**1/** @Karyuutensei
@NOTimothyLottes How many passes do you need to produce this result?
-**2/**
+**2/** @NOTimothyLottes
@Karyuutensei 1 pass: 12 fetches/outpix, in 2 batches. I use 6 gather4's to grab a 4-wide(x)2-line region for the {R,G,B} channels. Then 6 more fetches to do energy conserving computation of output for each {nearest 2 lines}x{R,G,B} channel based {intensity, position vertically on scan}.
diff --git a/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/index.md b/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/index.md
index 7d4be21..d4b11dd 100644
--- a/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/index.md
+++ b/archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
SPC: Last CRT shader was broken. Corrected it. It's energy conserving now, and correctly doing sub-pixel line width raster using the individual channels. Cell camera shots below at different zooms.
@@ -33,16 +33,16 @@ SPC: Last CRT shader was broken. Corrected it. It's energy conserving now, and c
-**2/**
+**2/** @NOTimothyLottes
Each scan line is simulated with only 3 pixels. But you get 9 sub-pixels to play with, so that is where the quality comes from. It reaches 7/8th of the display peak brightness, this compromise was so there is always some amount of perceptual scan effect.
-**3/**
+**3/** @NOTimothyLottes
The scan line thickness is adaptive proportional to linear brightness. When the scan thins out it is energy conserving and increases the thin pixel brightness to compensate. When it needs to go bright, it blooms the line. Lines have some overlap in bloom.
Branches: [[archive/threads/NOTimothyLottes/2023-08-18-spc-last-crt-shader-was-broken/2023-08-18-Karyuutensei-how-many-passes-do-you-need-to-produce-this-result]]
-**4/**
+**4/** @NOTimothyLottes
One human perceptual reason CRTs feel like they have more contrast than they do, is because an individual scan line is super bright when in focus. So the black surround feels darker to the mind.
diff --git a/archive/threads/NOTimothyLottes/2023-12-15-long-thread/2023-12-15-SebAaltonen-they-design-one-api-for-each-separate-use-case.md b/archive/threads/NOTimothyLottes/2023-12-15-long-thread/2023-12-15-SebAaltonen-they-design-one-api-for-each-separate-use-case.md
index 4756361..9f7b688 100644
--- a/archive/threads/NOTimothyLottes/2023-12-15-long-thread/2023-12-15-SebAaltonen-they-design-one-api-for-each-separate-use-case.md
+++ b/archive/threads/NOTimothyLottes/2023-12-15-long-thread/2023-12-15-SebAaltonen-they-design-one-api-for-each-separate-use-case.md
@@ -26,11 +26,11 @@ parent_post_id: "1735631826427732305"
## Branch
-**1/**
+**1/** @SebAaltonen
@NOTimothyLottes They design one API for each separate use case instead of making general purpose flexible SIMD hardware and API for the developers to implement what ever algorithm they need. CPU side got this right. PS2 had correct design, but Nvidia choose hardware T&L for desktop :(
-**2/**
+**2/** @SebAaltonen
@NOTimothyLottes I kind of understand hardware T&L back then because it was a new field and programmable hardware didn't exist. But now we have massive amount of wide SIMDs and bandwidth and big caches too. We can do better!
diff --git a/archive/threads/NOTimothyLottes/2023-12-15-long-thread/index.md b/archive/threads/NOTimothyLottes/2023-12-15-long-thread/index.md
index 7e70e61..962bd74 100644
--- a/archive/threads/NOTimothyLottes/2023-12-15-long-thread/index.md
+++ b/archive/threads/NOTimothyLottes/2023-12-15-long-thread/index.md
@@ -25,106 +25,106 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Holiday GPU thoughts as a recovering pc/mobile/etc cross platform dev-holic ...
-**2/**
+**2/** @NOTimothyLottes
[0] Early STP prototypes: had standard-PC-practice multi-dispatch 32-bit version, and hyper-optimized packed-16-bit semi-persistent single-dispatch-ubershader that got L2 reuse. Optimized one was 40% faster in profiling (VK RNDA2 GPU)! Industry has huge untapped opt potential
-**3/**
+**3/** @NOTimothyLottes
[1] Even for PC, 16-bit is required for optimization because: almost double the amount of register state a shader can leverage. Holds true even when platform lacks double rate 16-bit. Top optimization is pass merging, PC went bandwidth starved. Mobile is actually ALU starved ...
-**4/**
+**4/** @NOTimothyLottes
[2] Double rate 16-bit done right, is typically good for the smaller of {30% perf, return to non-ALU bound}, can make a GPU feel at least one HW generation faster.
-**5/**
+**5/** @NOTimothyLottes
[3] For PC, I'd personally draw my compatibility line where platforms support 16-bit, and only ship explicit packed 16-bit shaders instead of a separate 32-bit/16-bit shader permutation. AMD it's Vega up, for NV note Maxwell/Pascal's HFMA2: https://docs.nvidia.com/cuda/cuda-binary-utilities/index.html#maxwell-and-pascal-instruction-set
-**6/**
+**6/** @NOTimothyLottes
[4] Suggest doing dev work on a platform with great packed 16-bit support: AMD PC Vulkan on RDNA2, and don't filter through the DXC deoptimizer, so it is actually possible to see the value. Then hammer on vendors who still have spotty compiler related issues.
-**7/**
+**7/** @NOTimothyLottes
[5] Gather4 is the hot optimization for packed 16-bit because data is returned in SoA form. Always explicitly pack 16-bit and alias to/from UINT32 when passing constants to shader (best to alias eight 16-bit values as uint4). Etc.
-**8/**
+**8/** @NOTimothyLottes
[6] Trick for good 16-bit is range management. Sometimes pre-scaling is needed to avoid overflow,
and make sure to bring max values out of denormal before using rcp.
-**9/**
+**9/** @NOTimothyLottes
[7] Power is a function of data movement. "Touch it Once" is the top optimization, all the "Split it into a Graph, Pipeline Stage it" people are walking themselves towards high-power.
-**10/**
+**10/** @NOTimothyLottes
[8] Majority of GPU workloads are whole-pass serially dependent, but in practice temporally independent with exception of small localized serial dependency. If you "stick it into a frame graph" you cut off your ability to optimize.
-**11/**
+**11/** @NOTimothyLottes
[9] Resolution growth is slowing. Mobile's high DPI is beyond good enough. 8k won't be successfull because of the extra 4x scaling TAA tax, or it won't matter because people will just integer scale on scanout.
-**12/**
+**12/** @NOTimothyLottes
[10] Scaling TAA will converge to consistent higher quality over time, thus PC is likely to locally converge to 720p|1080p rendering for 4k (for high|med FPS). This implies that the industry should hit a point where large L3 can hold full render targets ...
-**13/**
+**13/** @NOTimothyLottes
[11] TAA scaling, full render targets in L3: Maybe RDNA2 128 MiB L3 was spot on actually, and RNDA3's L3 drop in capacity, and the no L3 consoles had this wrong Tracing and big nets probably need that L3 too.
-**14/**
+**14/** @NOTimothyLottes
[12] Lots of value getting a good 8x area scale for 4K 120 Hz. Yet devs won't see value until they make the non-pixel costs scale well, and move post before scaling.
-**15/**
+**15/** @NOTimothyLottes
[13] Triangles are not needed any more. Hint 8x area scaling doesn't know any connectivity. Connectivity is inferred by likeness to accumulated feedback. Shaded samples from non-triangles -> scaling TAA still works. Hint 2: scaling TAA raster is mostly just tri culling.
-**16/**
+**16/** @NOTimothyLottes
[14] TAA gets quality limited at high scaling because it can only infer correct behavior from geometry similar to what is rendered. Geometric aliasing drops too much thin geo. Fix for that is to change the standard practice, which will obsolete all black boxes.
-**17/**
+**17/** @NOTimothyLottes
[15] Stratified sampling is good for at least 2x the geo density compared to regular grid ... frame viewport jitter is end-of-life for quality.
-**18/**
+**18/** @NOTimothyLottes
[16] TAA's ability to correctly infer reprojection validity on skinned objects is crippled by lack of correct forward projection. Fixing that will break the black boxes.
-**19/**
+**19/** @NOTimothyLottes
[17] Shading density will end up variable, TAA's disocclusion and convergence logic needs to be out of the black box, and deeply integrated into shading systems too (because it points where to shade more). This evolution will break all the black boxes.
-**20/**
+**20/** @NOTimothyLottes
[18] Per-pixel ML people have it wrong, your net is multi-pass, all the top optimizations require less passes. Don't matter if you optimize the matrix math, power is burned in the bandwidth, and you cannot reduce your bandwidth enough to compete with the better options.
-**21/**
+**21/** @NOTimothyLottes
[19] GI needs a surface shade cache, might as well object space shade at that point, which enables NUMA, which enables more HW scaling.
-**22/**
+**22/** @NOTimothyLottes
[20] HW RT people had it very wrong, top optimization is non-ray-traversal ordered access. Follows: occlusion testing is neighbor-coherent, no trace, just test shared occluders. GI reduces to high frequency occlusion of some lower frequency probe domain.
-**23/**
+**23/** @NOTimothyLottes
[21] HW RT's skin-all re-tree before trace won't scale ever. Only stratified visibility gets log scaling on animated geo. HW RT has no system for bounding costs, while stratified visibility does. Think out of the black box, GPU got programmability decade back now.
-**24/**
+**24/** @NOTimothyLottes
[22] Love HW people, but they opt for a $ train even as it is derailing: they need to build HW, make it faster, it's what they do. But leave a trail of back-compat debris TS/ROV/GS/etc after each gfx fad. Vote with your engineering, general purpose CS, just say no to black boxes.
Branches: [[archive/threads/NOTimothyLottes/2023-12-15-long-thread/2023-12-15-SebAaltonen-they-design-one-api-for-each-separate-use-case]]
-**25/**
+**25/** @NOTimothyLottes
[23] Scaling TAAs want sparse data each frame, more like a low-frequency pixel control cage displacing a high-frequency reprojected feedback. No pixel centers any more, no need to interpolate before shading. Rather want striped data, so the cachelines group spaced-out samples ...
diff --git a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-AgileJebrim-yep-put-the-whole-game-logic-in-a-game-glsl.md b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-AgileJebrim-yep-put-the-whole-game-logic-in-a-game-glsl.md
index e75ef93..7dcb24e 100644
--- a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-AgileJebrim-yep-put-the-whole-game-logic-in-a-game-glsl.md
+++ b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-AgileJebrim-yep-put-the-whole-game-logic-in-a-game-glsl.md
@@ -26,11 +26,11 @@ parent_post_id: "1736157335058300999"
## Branch
-**1/**
+**1/** @AgileJebrim
@NOTimothyLottes Yep put the whole game logic in a game.glsl compute shader.
-**2/**
+**2/** @AgileJebrim
If doing a large open world game, set up a paging system to stream data to the GPU in tiles, particularly static data. All dynamic data should be handled on the GPU. If leveraging server, you can pass along the network packets as they are. CPU shouldn’t really be doing much for a game client. It certainly shouldn’t be varying due to scene complexity.
diff --git a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-SheriefFYI-two-point-six-seconds-d3d12createdevice-on-my.md b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-SheriefFYI-two-point-six-seconds-d3d12createdevice-on-my.md
index 2e246bc..456209d 100644
--- a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-SheriefFYI-two-point-six-seconds-d3d12createdevice-on-my.md
+++ b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-SheriefFYI-two-point-six-seconds-d3d12createdevice-on-my.md
@@ -26,25 +26,25 @@ parent_post_id: "1736147815829565624"
## Branch
-**1/**
+**1/** @SheriefFYI
@NOTimothyLottes two point six seconds?!! D3D12CreateDevice() on my machine is ~300ms..
-**2/**
+**2/** @NOTimothyLottes
@SheriefFYI Yeah and that's a warm second run too. I dev on crippled laptops so when the handicaps are removed the stuff really flies.
-**3/**
+**3/** @SheriefFYI
@NOTimothyLottes still that sounds like a lot, what specs / driver? Any weird vk layers loading?
-**4/**
+**4/** @NOTimothyLottes
@SheriefFYI Ok, yeah just reprofiled, and it's down to 269 ms. Best part of the Win10 experience, never know what is actually happening in the background.
-**5/**
+**5/** @SheriefFYI
@NOTimothyLottes *whew* that sounds more normal
diff --git a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2025-08-08-VPCOMPRESSB-so-youre-preallocating-every-type-of-descriptor.md b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2025-08-08-VPCOMPRESSB-so-youre-preallocating-every-type-of-descriptor.md
index 90a4378..628053f 100644
--- a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2025-08-08-VPCOMPRESSB-so-youre-preallocating-every-type-of-descriptor.md
+++ b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2025-08-08-VPCOMPRESSB-so-youre-preallocating-every-type-of-descriptor.md
@@ -26,17 +26,17 @@ parent_post_id: "1736154923408953499"
## Branch
-**1/**
+**1/** @VPCOMPRESSB
@NOTimothyLottes so you're preallocating every type of descriptor to a max count and aliasing them with various qualifiers/attributes? all that in a single memory layout?
if this is the case, the program identifier makes sense. you can just swap out the code, leaving the data untouched.
-**2/**
+**2/** @NOTimothyLottes
@VPCOMPRESSB I use the layout aliasing to choose things like {read-only K$ reads, vs read-write texture cache access} for buffers, for making sure GLC=1 (write through to coherent cache domain) is enabled for stores (image and buffer), as well as selecting the texel format for image access :)
-**3/**
+**3/** @VPCOMPRESSB
i revisited last night.
@@ -48,27 +48,27 @@ i assume your code is laid in stages. each stage corresponds to a specific image
aliasing supports this even further, with explicit intentions for resources.
-**4/**
+**4/** @NOTimothyLottes
@VPCOMPRESSB On modern desktop GPUs it is very efficient to have everything bound all the time (bind everything once/frame). On AMD on use the descriptor is loaded into SGPRs. You only pay for what is used. And ideally group descriptors used together near so they share same cache lines.
-**5/**
+**5/** @NOTimothyLottes
@VPCOMPRESSB Merging independent shaders is then easy. Merging dependent shaders is more complex. You can both do it an unsafe way or a safe way (too long for one tweet)...
-**6/**
+**6/** @NOTimothyLottes
@VPCOMPRESSB The unsafe way: launch a N+M sized 1D dispatch. Bank on having enough work in N such that when the dependent M starts that enough of N is finished in practice. This can work when early M depends on only early N workgroups.
-**7/**
+**7/** @NOTimothyLottes
@VPCOMPRESSB There are various safe ways. For instance if the dependent work isn't done, one can conditionally duplicate the work. Or conditionally use a fallback. Or only use the pre task if it had finished to accelerate the second, for example hierarchical empty space skipping ...
-**8/**
+**8/** @NOTimothyLottes
@VPCOMPRESSB The challenge of course is that the obvious stuff like spin waiting isn't safe because of bad API and driver design : no forward progress guarantee (on preemption, etc)
-**9/**
+**9/** @NOTimothyLottes
@VPCOMPRESSB Quite literally they just need to put in a guarantee that workgroups with lower coords in scan order are launched first and restored first in a partial preemption restore. Then you could safely spin on work in a prior numbered workgroup
diff --git a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/index.md b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/index.md
index 15ecc7b..1e007c1 100644
--- a/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/index.md
+++ b/archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Inspecting my old VK engines. On start I would warm all the pages. Code pages get a read, and data pages got an atomic add of a non-compiler known zero. An attempt to improve initial load time. But in the end nothing helps the 2.6 seconds or so required to just open the VK device
@@ -33,25 +33,25 @@ Inspecting my old VK engines. On start I would warm all the pages. Code pages ge
Branches: [[archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-SheriefFYI-two-point-six-seconds-d3d12createdevice-on-my]]
-**2/**
+**2/** @NOTimothyLottes
Since I almost never get crashes I forgot about this, but had written a system to auto relaunch the app on crash or special case exit. No complex error handling, just bank on fast relaunch instead.
-**3/**
+**3/** @NOTimothyLottes
The hope of single PSO in VK was scrapped because IHV compile times explode. However I did maintain single SPIR-V file, and use spec constants to choose individual shaders. The threads doing compile dump compile times and disassembly in DEV mode.
-**4/**
+**4/** @NOTimothyLottes
I'm a fan of single file applications. So when not in DEV mode the one SPIR-V file gets pulled from the EXE. Compiling PSOs is always the critical path, the moment the "bind everything once" layout is done, PSO compile goes wide on the machine.
-**5/**
+**5/** @NOTimothyLottes
"Bind-Everything-Once" in Vulkan looks like this. Bindings {1}=CPU pushing to GPU, {2}=buffer (more on that next), {3}=as UAVs, {4}=as TEX ... No binding logic at runtime ever. Access anything in the most efficient way any time.
@@ -59,13 +59,13 @@ I'm a fan of single file applications. So when not in DEV mode the one SPIR-V fi
Branches: [[archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2025-08-08-VPCOMPRESSB-so-youre-preallocating-every-type-of-descriptor]]
-**6/**
+**6/** @NOTimothyLottes
Did something silly but fast for buffers. Here is an example from a dummy test app. The main SSBO gets aliased as 4 structures, each with the same data accessable with four types {uint, uint4, float, float4}. So same binding layout aliasing chooses load type and K$ or V$ access.
-**7/**
+**7/** @NOTimothyLottes
Literally the CPU does almost nothing. All game input gets pushed to the GPU for game logic. Some major advantages in input latency to do player logic on the GPU instead. And it's dead easy.
@@ -73,16 +73,16 @@ Literally the CPU does almost nothing. All game input gets pushed to the GPU for
Branches: [[archive/threads/NOTimothyLottes/2023-12-16-inspecting-my-old-vk-engines/2023-12-17-AgileJebrim-yep-put-the-whole-game-logic-in-a-game-glsl]]
-**8/**
+**8/** @NOTimothyLottes
This requires context, I build programs in a hardware style, fixed resources, fixed shaders, and all logic expressed in the data itself. No code or resource variation, no runtime issues period. So another dummy program example, I can just list my resources on load in a table ...
-**9/**
+**9/** @NOTimothyLottes
Radically simplicity is how I roll personally. Easy to confuse the idea that one needs complexity to express a complex system. It's more like one needs complexity to express a complex solution -> abstractions and hierachical meta feeds on itself until tech debt freezes progess.
-**10/**
+**10/** @NOTimothyLottes
If there is anything to learn for programming, it is to be more critical of your own ideas than all else, be ruthless, trim until what is left is only what is actually required, question everything constantly.
diff --git a/archive/threads/NOTimothyLottes/2023-12-19-working-towards-a-public-domain-release-of-a/index.md b/archive/threads/NOTimothyLottes/2023-12-19-working-towards-a-public-domain-release-of-a/index.md
index 380b6e9..0e9047d 100644
--- a/archive/threads/NOTimothyLottes/2023-12-19-working-towards-a-public-domain-release-of-a/index.md
+++ b/archive/threads/NOTimothyLottes/2023-12-19-working-towards-a-public-domain-release-of-a/index.md
@@ -25,17 +25,17 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Working towards a public-domain release of a cleaned version of my Win32 Vulkan NV+AMD compute graphics platform. What I used last for rapid prototyping (which is also IMO fine for releasable software). Won't call it an 'Engine' because it only provides tools to hang yourself ...
-**2/**
+**2/** @NOTimothyLottes
Simplified the error logger today. Memory mapped file is definitely the way to go, one atomic per message, log multiple sessions, fixed size file acts like a message ring buffer. Background thread keeps the last message updating the same line on the console (for easy debug).
-**3/**
+**3/** @NOTimothyLottes
Multi-session is nice, since the binary auto reloads in some cases (crash, etc), want to see why the reload happened, so don't want to clear the log. Yes, I still don't use debuggers, this logger + runtime shader recompile is all I use personally for dev work.
diff --git a/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/2024-01-05-kenpex-its-what-debuggers-should-be-debuggers-made-zero.md b/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/2024-01-05-kenpex-its-what-debuggers-should-be-debuggers-made-zero.md
index eb26a7d..e7e2c25 100644
--- a/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/2024-01-05-kenpex-its-what-debuggers-should-be-debuggers-made-zero.md
+++ b/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/2024-01-05-kenpex-its-what-debuggers-should-be-debuggers-made-zero.md
@@ -26,7 +26,7 @@ parent_post_id: "1742743018929557805"
## Branch
-**1/**
+**1/** @kenpex
@NOTimothyLottes It's what debuggers should be. Debuggers made zero progress in the last decade, but fundamentally they patch running code... just they are limited to patch an interrupt instead of allowing us to do... anything. Even tracepoints, while nice, are a castrated version of livecode.
diff --git a/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/index.md b/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/index.md
index 89ddeab..d6af5e9 100644
--- a/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/index.md
+++ b/archive/threads/NOTimothyLottes/2024-01-04-debug-for-majority-gpu-side-game-dev-run-time/index.md
@@ -25,13 +25,13 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Debug for majority-GPU-side game dev? Run-time recompile and hex viewer. If I want to see a value it is 'ramWI1.hxd[pos]=value;' (write to the memory that the hex dump reads from). Everything else is automatic, just save source and the results show up on screen. Zero's not drawn.
-**2/**
+**2/** @NOTimothyLottes
IMO this is preferred to a 'debugger'. I can fill values from all workgroups simply by placing them at different positions, etc. Can get timings via shader clock for profiling even. It is transformative in dev productivity.
diff --git a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-06-MartinJIFuller-a-worthwhile-project-knowledge-well-worth-sharing.md b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-06-MartinJIFuller-a-worthwhile-project-knowledge-well-worth-sharing.md
index a72dc12..ae06d96 100644
--- a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-06-MartinJIFuller-a-worthwhile-project-knowledge-well-worth-sharing.md
+++ b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-06-MartinJIFuller-a-worthwhile-project-knowledge-well-worth-sharing.md
@@ -26,7 +26,7 @@ parent_post_id: "1776597200073568623"
## Branch
-**1/**
+**1/** @MartinJIFuller
@NOTimothyLottes @SebAaltonen A worthwhile project, knowledge well worth sharing, but is a book the right format? Perhaps yes, just thinking out loud.
diff --git a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-08-RickyAH-ha-that-wont-save-you-from-my-follow.md b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-08-RickyAH-ha-that-wont-save-you-from-my-follow.md
index ddfc357..6739134 100644
--- a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-08-RickyAH-ha-that-wont-save-you-from-my-follow.md
+++ b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-08-RickyAH-ha-that-wont-save-you-from-my-follow.md
@@ -26,7 +26,7 @@ parent_post_id: "1776597200073568623"
## Branch
-**1/**
+**1/** @RickyAH
@NOTimothyLottes @SebAaltonen @MartinJIFuller Ha! That won’t save you from my follow
diff --git a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-09-BenSimsTech-oh-sick-im-deep-in-optimising-shaders-in-an-aaa.md b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-09-BenSimsTech-oh-sick-im-deep-in-optimising-shaders-in-an-aaa.md
index d1d2abb..a3c9d94 100644
--- a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-09-BenSimsTech-oh-sick-im-deep-in-optimising-shaders-in-an-aaa.md
+++ b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/2024-04-09-BenSimsTech-oh-sick-im-deep-in-optimising-shaders-in-an-aaa.md
@@ -26,7 +26,7 @@ parent_post_id: "1776597200073568623"
## Branch
-**1/**
+**1/** @BenSimsTech
@NOTimothyLottes @SebAaltonen @MartinJIFuller Oh sick, I'm deep in optimising shaders in an AAA game for GCN hardware right now (You can probably guess the platform(s)) so this is super relevant to me. 😅
Going to give it all a thorough read, I'm after all the GCN info I can find right now.
diff --git a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/index.md b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/index.md
index 88ef1aa..f3d701f 100644
--- a/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/index.md
+++ b/archive/threads/NOTimothyLottes/2024-04-06-on-https-mastodon-gamedev-place-notimothylottes/index.md
@@ -27,7 +27,7 @@ in_reply_to: "1776518700230721688"
## Thread
-**1/**
+**1/** @NOTimothyLottes
@MartinJIFuller @SebAaltonen On https://mastodon.gamedev.place/@NOTimothyLottes I'm collecting posts with AMD GPU disassembly dumps for a book on everything the shader compiler 'isn't doing'. Constant AMD GPU compiler perf bug SPAM is a key part of my online strategy to keep a low follower count.
diff --git a/archive/threads/NOTimothyLottes/2024-05-04-it-was-only-later-when-systems-forced-c-abi/index.md b/archive/threads/NOTimothyLottes/2024-05-04-it-was-only-later-when-systems-forced-c-abi/index.md
index 5dd57bb..c7e0b6f 100644
--- a/archive/threads/NOTimothyLottes/2024-05-04-it-was-only-later-when-systems-forced-c-abi/index.md
+++ b/archive/threads/NOTimothyLottes/2024-05-04-it-was-only-later-when-systems-forced-c-abi/index.md
@@ -25,6 +25,6 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
@Nerfoxingaround @SebAaltonen It was only later when systems forced C ABI library interfaces with it's stacks and junk that things got messy and only because of the C. Then C++ happened and things got much worse. Pure ASM is easy, its interfacing with the bloat world that got hard.
diff --git a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-bmcnett-so-each-line-is-63-spaces-followed-by-a-n-and.md b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-bmcnett-so-each-line-is-63-spaces-followed-by-a-n-and.md
index 500b627..99a8533 100644
--- a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-bmcnett-so-each-line-is-63-spaces-followed-by-a-n-and.md
+++ b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-bmcnett-so-each-line-is-63-spaces-followed-by-a-n-and.md
@@ -26,19 +26,19 @@ parent_post_id: "1857813028349128825"
## Branch
-**1/**
+**1/** @bmcnett
@NOTimothyLottes So each line is 63 spaces followed by a \n, and those 63 spaces get replaced by printable characters dynamically? I have long dreamed of a text format with a fixed 128 byte line width, and cache line size is gradually switching over from 64 to 128
-**2/**
+**2/** @NOTimothyLottes
@bmcnett Yes fixed character[63]='\n', string fills until then or spaces out. I did 128-char once, but still sometimes use small VGA resolutions. Also written a source editor a few times with this fixed line size, makes for a very simple implementation ...
-**3/**
+**3/** @bmcnett
@NOTimothyLottes Variable line width ASCII text files made a lot of sense when storage was 100KB or 100MB or 100GB, but now that it's in the terabytes, why even bother
-**4/**
+**4/** @NOTimothyLottes
@bmcnett That line of thinking is universal solution to most self-inflicted problems of the modern era.
diff --git a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-datenwolf-why-the-heck-do-you-care-about-cache-lines-if-you.md b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-datenwolf-why-the-heck-do-you-care-about-cache-lines-if-you.md
index 31fc776..244252d 100644
--- a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-datenwolf-why-the-heck-do-you-care-about-cache-lines-if-you.md
+++ b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-datenwolf-why-the-heck-do-you-care-about-cache-lines-if-you.md
@@ -26,32 +26,32 @@ parent_post_id: "1857805438151983120"
## Branch
-**1/**
+**1/** @datenwolf
@NOTimothyLottes Why the heck do you care about cache lines, if you write to a mmaped file? Of course there's overhead: TLBs aren't free. And TLBs matter… at lot in fact. When you map the file, initially the kernel marks some address space, but doesn't populate it with pages. 1/
-**2/**
+**2/** @datenwolf
@NOTimothyLottes On the first write to a non-faulted page, the kernel has to find a free page in memory, associate it in the page table, all the while keeping an eye on all threads process, since changes to a process virtual address space must appear atomic. 2/
-**3/**
+**3/** @datenwolf
@NOTimothyLottes Memory maps aren't free. Simple writes to a file will easily outperform and cause less overhead, than naively implemented mmaped I/O. 3/
-**4/**
+**4/** @NOTimothyLottes
@datenwolf BTW, I pre-fault my mapped files. Just like I pre-fault the binary and data segments too. But sure the pre-fault could go stale. And yes TLBs are a system perf issue, but atlas you need admin priv on Windows to play 2 MiB pages for data, so it's off the table
-**5/**
+**5/** @NOTimothyLottes
@datenwolf Why cacheline aligned and sized on the CPU? In theory store the entire line in a short enough timeframe and your Read-Modify-Write becomes just a Write! CPU doesn't have byte-write-mask (I think). If SW+HW is good. And threads keeping to isolated lines means no false sharing. Etc
-**6/**
+**6/** @datenwolf
@NOTimothyLottes (That cacheline remark was meant rhetorically; between cache misses and page faults, a page fault will largely overshadow a cache miss in performance overhead.
But yes, if you prefault, then that problem is mitigated.)
-**7/**
+**7/** @NOTimothyLottes
@datenwolf 'Smart' people keep trying to impose (aka force) their will on others through poor system APIs, like not being able to pre-pin pages. Good look buddy, I'll just run a background task that continuously touch walks the pages I want pinned anyway.
diff --git a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-static_assert_0-this-is-super-cool-but-why-map-a-file-and-not.md b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-static_assert_0-this-is-super-cool-but-why-map-a-file-and-not.md
index 245ea49..1965152 100644
--- a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-static_assert_0-this-is-super-cool-but-why-map-a-file-and-not.md
+++ b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-static_assert_0-this-is-super-cool-but-why-map-a-file-and-not.md
@@ -26,15 +26,15 @@ parent_post_id: "1857803914604618029"
## Branch
-**1/**
+**1/** @static_assert_0
@NOTimothyLottes This is super cool, but why map a file and not just stdout?
-**2/**
+**2/** @vodangkhoa873
@static_assert_0 @NOTimothyLottes The writes can be done concurrently from many threads?
-**3/**
+**3/** @NOTimothyLottes
@vodangkhoa873 @static_assert_0 Yes, one 'atomicAdd(atomAdr,1)&65535' to get the line number (window of 65536 max lines) then write the line individually. Only contention is on that atomicAdd CPU instruction which is as minimal as possible.
@@ -42,11 +42,11 @@ I do the atomic add instruction using simple inline ASM (below)
-**4/**
+**4/** @static_assert_0
@NOTimothyLottes @vodangkhoa873 I love this, but are you not able to get that codegen with intrinsics or just normal C?
-**5/**
+**5/** @NOTimothyLottes
@static_assert_0 @vodangkhoa873 I've been hand rolling intrinsics CPU-side in GCC with inline asm since the dawn of support for that. So haven't kept up with the high-level-lang mess fire since.
diff --git a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-17-HerrUppoHoppa-curious-why-you-memory-map-the-32-bit-counter-to.md b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-17-HerrUppoHoppa-curious-why-you-memory-map-the-32-bit-counter-to.md
index ab4b761..1785bbb 100644
--- a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-17-HerrUppoHoppa-curious-why-you-memory-map-the-32-bit-counter-to.md
+++ b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-17-HerrUppoHoppa-curious-why-you-memory-map-the-32-bit-counter-to.md
@@ -26,15 +26,15 @@ parent_post_id: "1857804669994565771"
## Branch
-**1/**
+**1/** @HerrUppoHoppa
@NOTimothyLottes Curious why you memory map the 32 bit counter to the file. Also why does it get half the file as opposed to just the end of the mapped region?
-**2/**
+**2/** @NOTimothyLottes
@HerrUppoHoppa It's pow2 message lines so fixing wrap is AND(cnt,lines-1). Counter after that and needs to take a page minimum. So yes I could make the size slightly smaller, but just lazy. Counter in file because then multiple runs accumulate in the file for comparison.
-**3/**
+**3/** @HerrUppoHoppa
@NOTimothyLottes Ah I see, interesting solution!
diff --git a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/index.md b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/index.md
index b7e97fb..2d7026f 100644
--- a/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/index.md
+++ b/archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
[0] What a horrible term 'printf-debugging'
If you are debugger-free might as well at least be libc-free
@@ -33,7 +33,7 @@ Here is how I work CPU C code without any debugger in my engines, and how it wor
Branches: [[archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-static_assert_0-this-is-super-cool-but-why-map-a-file-and-not]]
-**2/**
+**2/** @NOTimothyLottes
[1] First I map a '.log' file, so there is no other file IO
(a.) First half of this file (log2 sized file) contains lines of a fixed 64-character size (with the \n at the end)
@@ -41,17 +41,17 @@ Branches: [[archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-pr
Branches: [[archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-17-HerrUppoHoppa-curious-why-you-memory-map-the-32-bit-counter-to]]
-**3/**
+**3/** @NOTimothyLottes
[2] So writing a line to this log is 100% overhead-free and lock-free, one just increments the atomic counter, and dumps the comment line in the memory mapped file. Note the 64-byte line size matches a cacheline size, so no contention on the write of the line
Branches: [[archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-datenwolf-why-the-heck-do-you-care-about-cache-lines-if-you]]
-**4/**
+**4/** @NOTimothyLottes
[3] It's ideal for a multi-thread environment, you get correct temporal ordering captured in the log file without any real effect on the scheduling of threads.
-**5/**
+**5/** @NOTimothyLottes
[4] Lines are always in a fixed format
r|sc.milmic|line_|hex_____|0000000000-|string...
@@ -62,14 +62,14 @@ hex ... hex print of number
000 ... decimal print of the number
string ... user msg
-**6/**
+**6/** @NOTimothyLottes
[5] I write a line with a simple function call
Tlk(__LINE__,n,"msg");
Where 'n' is the number, "msg" is a string
Don't need printf, this is way better
-**7/**
+**7/** @NOTimothyLottes
[6] Here is an example with a very simple program, just a few first lines. It's nice to automatically see exact timing. Timing since start
0.005478 sec ... mapping of the cartridge file
@@ -79,19 +79,19 @@ etc
-**8/**
+**8/** @NOTimothyLottes
[7] Another simple example of a fully pipelined startup, can instantly know where the primary cost is,
"Instance begin" and "Instance end" wrap setup of the Vulkan instance, a process which took 2.4 seconds. The 4 PSOs hit in the shader cache at 3k microseconds each
-**9/**
+**9/** @NOTimothyLottes
[8] The log file keeps multiple runs, so it's easy to compare. Notepad2 it's F5 to reload the log file.
Branches: [[archive/threads/NOTimothyLottes/2024-11-16-0-what-a-horrible-term-printf-debugging/2024-11-16-bmcnett-so-each-line-is-63-spaces-followed-by-a-n-and]]
-**10/**
+**10/** @NOTimothyLottes
[9] The point: keep it minimal, keep it simple, and keep the number of required things that take human time to the smallest possible. If you don't fall off the 'compile-time' curve, and re-compile/re-start/re-load is 'key-press-time' this works amazingly well (interactive)
diff --git a/archive/threads/NOTimothyLottes/2024-11-19-working-towards-a-new-bring-up-of-front-buffering/index.md b/archive/threads/NOTimothyLottes/2024-11-19-working-towards-a-new-bring-up-of-front-buffering/index.md
index 669ff64..7a7b1c5 100644
--- a/archive/threads/NOTimothyLottes/2024-11-19-working-towards-a-new-bring-up-of-front-buffering/index.md
+++ b/archive/threads/NOTimothyLottes/2024-11-19-working-towards-a-new-bring-up-of-front-buffering/index.md
@@ -25,34 +25,34 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Working towards a new bring up of front-buffering on NV via VK. My last implementation had been tuned on AMD and didn't work on NV any more. NV does seem to accept a 1-deep swap with IMMEDIATE presentation at least on latest drivers, so that is a good start.
-**2/**
+**2/** @NOTimothyLottes
Since my image resources are static after init time, only swap images change when the driver kills the swap chain (which once upon a time seemed to happen on ALT+TAB maybe). So it's one descriptor set always bound.
-**3/**
+**3/** @NOTimothyLottes
Stopped using VK_DESCRIPTOR_SET_LAYOUT_CREATE_UPDATE_AFTER_BIND_POOL_BIT_EXT (god awful naming length people), because I think it could be a perf hit on NV due to extra indirection. NV driver is free to bake down the single set now before the command buffer is sent over.
-**4/**
+**4/** @NOTimothyLottes
At this stage, to the point of having everything loaded and swap chain created, it's 2700 lines of engine code. That includes embedding headers (no external includes), so it's a one file compile. People claim rolling your own engine is hard? Not really if you keep it focused.
-**5/**
+**5/** @NOTimothyLottes
So far it's a 0.25 sec hot load time on this NV dGPU laptop. Includes mapping a 4 MiB 'cart' file from pagecache, doing a 512 MiB buffer for GPU usage, hits on all PSOs, allocating some images, and kicking the command buffer that copies in the cart, and clears everything.
-**6/**
+**6/** @NOTimothyLottes
Everything at load-time is multi-threaded to try to minimize start to in-game time. This is in sharp contrast to runtime where the only multi-threading being used is to separate things that are blocking.
-**7/**
+**7/** @NOTimothyLottes
I get some utility on parallelizing {vulkan instance creation, mapping the cart file, warming the TLBs by walking all the pages, bringing up the window} it's about 0.08 seconds in at that point
-**8/**
+**8/** @NOTimothyLottes
After VK device is open, I signal a background thread to load the SPIR-V module, while building the descriptor set layout, which then unblocks PSO compile on background threads. And the rest of the VK setup runs in parallel. Working towards swap creation.
diff --git a/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/2024-11-20-AgileJebrim-how-reliable-in-your-experience-in-code-like-that.md b/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/2024-11-20-AgileJebrim-how-reliable-in-your-experience-in-code-like-that.md
index b39e2a0..dbb3396 100644
--- a/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/2024-11-20-AgileJebrim-how-reliable-in-your-experience-in-code-like-that.md
+++ b/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/2024-11-20-AgileJebrim-how-reliable-in-your-experience-in-code-like-that.md
@@ -26,35 +26,35 @@ parent_post_id: "1859369992355021246"
## Branch
-**1/**
+**1/** @AgileJebrim
@NOTimothyLottes How reliable in your experience in code like that is the compilation to avoid branches?
-**2/**
+**2/** @NOTimothyLottes
@AgileJebrim Lots of stuff can get mapped by the compiler to V_CNDMASK_B32 instead of branching by using mix(a,b,bool) syntax. I rarely use branching because of how horrible the code generation is. No way to express that the common path stay code linear either, etc.
-**3/**
+**3/** @AgileJebrim
@NOTimothyLottes I know in CUDA-land that it likes to create branches for ternaries if it contains more than 4 total instructions in a statement.
-**4/**
+**4/** @NOTimothyLottes
@AgileJebrim But the real problem is lacking of explicit controls, and lacking implicit branch hints (wave-uniform/non-uniform, expected branch hit rate, etc). Better if we could just do explicit ASM style branch instructions and labels.
-**5/**
+**5/** @AgileJebrim
@NOTimothyLottes Well I seek to ban branches entirely, so that’s the exact opposite of what I want.
-**6/**
+**6/** @NOTimothyLottes
@AgileJebrim If your shader I$ is say 32 KiB and your instructions average say 8-bytes. You have 4 K instructions before you are streaming the program not just the data. Code size is actually important. And while micro level unroll is needed, macro level duplication is a problem with tiny I$
-**7/**
+**7/** @AgileJebrim
@NOTimothyLottes I avoid the duplication of instruction patterns too. I feel it’s a failure to properly parallelize if you’re repeating the same instructions instead of data parallelizing further.
-**8/**
+**8/** @AgileJebrim
@NOTimothyLottes One more reason why I avoid functions.
diff --git a/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/index.md b/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/index.md
index 66599d6..ecf8c5d 100644
--- a/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/index.md
+++ b/archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/index.md
@@ -25,11 +25,11 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
[0] Been wanting to do this for a long time, a thread on hard-core shader development. Something that digs into what I've learned and applied over the years. Along with the evolution of the strange syntax I use when writing shaders ...
-**2/**
+**2/** @NOTimothyLottes
[1] Lets start at one of the early ones, FXAA 3.11. Someone is hosting that here: https://gist.github.com/kosua20/0c506b81b3812ac900048059d2383126 ... most lines, it's an easy map to NV's arch which has predicated instructions (red is the predicate). Many lines are 1:1 mappings with physical HW instructions.
@@ -37,150 +37,150 @@ in_reply_to: ""
Branches: [[archive/threads/NOTimothyLottes/2024-11-20-0-been-wanting-to-do-this-for-a-long-time-a/2024-11-20-AgileJebrim-how-reliable-in-your-experience-in-code-like-that]]
-**3/**
+**3/** @NOTimothyLottes
[2] Looking at FSR1: https://github.com/GPUOpen-Effects/FidelityFX-FSR/blob/master/ffx-fsr/ffx_fsr1.h - that had 3 permutations {32-bit, 16-bit unpacked, 16-bit packed}, where the packed one maps to how AMD's packed instructions work (everything explicitly packed)
-**4/**
+**4/** @NOTimothyLottes
[3] Onto STP: https://github.com/Unity-Technologies/Graphics/blob/27341ce4f5c8853d7f15e9420bff499f1087aceb/Packages/com.unity.render-pipelines.core/Runtime/STP/Stp.hlsl - A different set of permutations {32-bit, packed 16-bit} then {implicit mediump vs explicit} in the 32-bit (generic) permutation via types like StpMF4 which aim to allow a compiler on mobile to get some 16-bit register savings
-**5/**
+**5/** @NOTimothyLottes
[4] Notice for 16-bit path, everything again is explicitly packed (unlike the 32-bit path). And GLSL to SPIR-V would get explicit packing to the IHV driver since SPIR-V has explicit vector types (unlike DX, which was an insane problem). Example, the reprojection filtering below.
-**6/**
+**6/** @NOTimothyLottes
[5] Then STP had defines to work out differences in sampling capability (like supporting MIN/MAX sampling with UINT or not, or supporting immediate offsets or not). Example in the code doing {z,motion} UINT32 packed nearest dilation:
-**7/**
+**7/** @NOTimothyLottes
[6] The largest portability nightmare was mixing explicit FP16 with wave ops! So many compiler bugs across vendors = so many permutations in the code. The 32-bit path had to have a conversion from 'StpMF4' (possible implicit medium precision), to 'StpF4' explicit 32-bit.
-**8/**
+**8/** @NOTimothyLottes
[7] Some of perf death problems had been that DXIL didn't have bitfield ops (unlike SPIR-V), HLSL depends on IHV compilers somehow finding and pattern matching stuff like the crap below (which is MANY OPS to 1 OPCODE). So pre-processing through HLSL on non-Xbox platforms = fail!
-**9/**
+**9/** @NOTimothyLottes
[8] Go into the shader which is doing wave ops, and the true nightmare of platform workarounds becomes apparent https://github.com/Unity-Technologies/Graphics/blob/27341ce4f5c8853d7f15e9420bff499f1087aceb/Packages/com.unity.render-pipelines.core/Runtime/STP/StpSetup.compute - LSD/waveop permutations, 32-bit/16-bit in 16-bit path, etc
-**10/**
+**10/** @NOTimothyLottes
[9] So yeah, even in modern times you can hit paths in compilers and toolchains that well never got tested because no one had tried it and tried shipping with it. And I think this might hint that relatively few actually do this level of crazy
-**11/**
+**11/** @NOTimothyLottes
[10] Part of the formula for getting great gains with 16-bit is simply the register savings. It wouldn't be possible to do good 4x4 kernel lanczos inside a TAA without packed 16-bit support (it's 64 values on load without thinking about all the other mid-algorithm data) ...
-**12/**
+**12/** @NOTimothyLottes
[11] Looking at STP again, there is a dering, which works with the {min,max} of the near 2x2. If the HW has MIN/MAX sampling, it can fetch that, which means a lot more than 64 values, and if not they need intermediate ALU min/max, which is extra state ...
-**13/**
+**13/** @NOTimothyLottes
[12] Mobile hardware is so register starved (probably due to all that SRAM area going to tiles) that it wasn't possible to do good reprojection filtering PERIOD even with FP16. So STP had a crippled compromise that did bilinear in one direction, and lanczos in the other axis
-**14/**
+**14/** @NOTimothyLottes
[13] Huge wake up call to mobile HW vendors, if you don't match VGPR capacity of PCs, you can never take on where PC workloads will get to. Now given both NV and AMD have packed 16-bit, it is a great time to push pass merging and avoid DRAM traffic by doing more in one shader
-**15/**
+**15/** @NOTimothyLottes
[14] Another part of the 16-bit perf puzzle is to not use 16-bit FP16 in constants explicitly, but only package them up as aliased as UINT32 binary blobs. And for portable systems that still need 32-bit fallbacks, always build both a packed 16-bit and 32-bit set of constants.
-**16/**
+**16/** @NOTimothyLottes
[15] So many people tried to 16-bit permute things working from 32-bit float constants, and on PC that is instant perf death. Sure some mobile hardware can do the conversions for lower cost, and some mobile HW could pre-amble the conversions if not, but that isn't perf portable
-**17/**
+**17/** @NOTimothyLottes
[16] Switching gears. So STP didn't get the most hardcore way I like to write shaders, and I've had a bunch of different permutations of ideas tried over the years ... specifically how to make the code more like GPU assembly!
-**18/**
+**18/** @NOTimothyLottes
[17] Looking like assembly as in making it exactly clear what the lines map to in HW OPCODEs, and what the variable map to in REGISTERS. So you are designing to what the hardware could do, even if the compiler cannot keep up
-**19/**
+**19/** @NOTimothyLottes
[18] Now it's true that NV and AMD HW are quite different in some respects (NV is predicated, and has generic 3 op logic ops, etc), so ultimately one has to pick their shader language abstraction based on what they want to target the most https://docs.nvidia.com/cuda/cuda-binary-utilities/index.html#instruction-set-reference (NV ISA docs)
-**20/**
+**20/** @NOTimothyLottes
[19] Since AMD's docs are more complete, and I like to make sure a console port is possible and would be as fast as possible, I prefer to think through all my shaders as if they are getting direct mapped to AMD's RDNA2 these days: https://www.amd.com/content/dam/amd/en/documents/radeon-tech-docs/instruction-set-architectures/rdna2-shader-instruction-set-architecture.pdf
-**21/**
+**21/** @NOTimothyLottes
[20] So I usually do a define that maps logic directly to what the associated instruction would be. Some of these actually map to shading language intrinsics already like fma() or bitfieldExtract(). Then write all my shader code using these defines. Example below for the defines
-**22/**
+**22/** @NOTimothyLottes
[21] Like to use ASM like convention for {signed, unsigned}, that all integers are unsigned, and only get converted to signed when required inside the define for a specific opcode (like signed or unsigned bitfield extract). Bit casting (aliasing) is done via SI1_I1() style macros
-**23/**
+**23/** @NOTimothyLottes
[22] And I reduce all types to very simple 3 letter macros of which are described below. I use the same naming convention in CPU land as well. This helps keep code compact and easy to read IMO (highly subjective yes)
-**24/**
+**24/** @NOTimothyLottes
[23] One thing I struggle with to this day is compiler bitcast aliasing perf bugs. Meaning once I tried to always only use UINT4 types everywhere, and then wrap all OPCODE defines in bitcasting defines, that didn't go so well (looking at disassembly on AMD PC).
-**25/**
+**25/** @NOTimothyLottes
[24] Compilers depend a lot on pattern matching to NOP stuff, and well there are bugs, lots of bugs. So for the sake of portability, with the exception of {unsigned/signed} bitcasting, I use the native types when possible (no packed-16-bit/32-bit aliasing) exception of waveops
-**26/**
+**26/** @NOTimothyLottes
[25] Another aspect of compiler problems is argument passing to function calls causing SSA state explosions, because it's "copy semantics" as defined in the langs. Once I did inout uint4[16] (all VGPRs) as my only argument to all functions. Didn't end well!
-**27/**
+**27/** @NOTimothyLottes
[26] Someone on twitter (or was it bsky or mast?) had been doing a one shader game. And addressing these kinds of problems, and reminded us, YES the shader languages support global variables. No need to pass them into function! (bingo)
-**28/**
+**28/** @NOTimothyLottes
[27] We have been so seasoned to dislike globals in the past few decades due to well probably early mutli-window programming styles, that it is easy to forget you can just do globals, and they are fast at tool/compile time.
-**29/**
+**29/** @NOTimothyLottes
[28] I think the next level up of this design is to go to mostly global variables, but since the shader languages don't support global unions, then have different sets of globals when one needs to do type bitcast aliasing (which is very common with packed 16-bit and 64-bit logic)
-**30/**
+**30/** @NOTimothyLottes
[29] I still think the 'fix' for the shader compiler SSA state explosion mapping back to registers problem is to pass in explicit aliasing hints to the vendor compilers, so they have a better base guess at register allocation. But I doubt vendors would get on board with that
-**31/**
+**31/** @NOTimothyLottes
[30] My personal x86-64 languages typically worked with unions of structs on globals. Where each struct in the union was a different aliased meaning to the HW registers, and functions had been associated with a given struct in the union. So no stacks or argument passing.
-**32/**
+**32/** @NOTimothyLottes
[31] That kind of setup for the GPU is ideal IMO (at least for the type of stuff I do). You can link. Because the union struct for the registers is the calling ABI, and never moves (no stack). So code sharing works amazingly well. And avoiding register state explosion is built in
-**33/**
+**33/** @NOTimothyLottes
[32] oh damn [32], should probably stop now, until next time.
diff --git a/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/2024-11-22-AgileJebrim-shouldnt-uniform-be-a-scalar.md b/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/2024-11-22-AgileJebrim-shouldnt-uniform-be-a-scalar.md
index 3e6a4d1..96566be 100644
--- a/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/2024-11-22-AgileJebrim-shouldnt-uniform-be-a-scalar.md
+++ b/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/2024-11-22-AgileJebrim-shouldnt-uniform-be-a-scalar.md
@@ -26,45 +26,45 @@ parent_post_id: "1859791162091110754"
## Branch
-**1/**
+**1/** @AgileJebrim
@NOTimothyLottes Shouldn’t uniform be a scalar?
-**2/**
+**2/** @NOTimothyLottes
@AgileJebrim Well 'uniform' in GLSL is a storage qualifier, "Uniforms are so named because they DO NOT CHANGE from one shader invocation to the next within a particular rendering cal" so you probably want another term for SGPR to avoid aliasing qualifiers
-**3/**
+**3/** @AgileJebrim
@NOTimothyLottes Within ISPC, uniform means scalar and varying means vector.
-**4/**
+**4/** @AgileJebrim
@NOTimothyLottes Looking deeper into the definition of SGPRs. They’re uniform just across each wavefront, rather than the entire dispatch yeah?
-**5/**
+**5/** @NOTimothyLottes
@AgileJebrim Yes it's a separate register file and logic unit that is per-wave instead of per-lane. Since it's introduction in Turing, NV calls them "URX for uniform registers" while AMD calls them SGPRs (scalar general purpose registers)
-**6/**
+**6/** @AgileJebrim
@NOTimothyLottes Almost sounding like we need an alternative IR to SPIR-V. One with predicated instructions and these wavefront-uniform registers/instructions. Maybe a PTX -> RDNA backend compiler?
-**7/**
+**7/** @NOTimothyLottes
@AgileJebrim As history goes, most re-writes fall into nearly the same problem as before. I'd rather have the fixes be applied to the existing stuff first (fix SPIR-V and GLSL, etc)
-**8/**
+**8/** @AgileJebrim
@NOTimothyLottes Perhaps. That existing PTX Vulkan extension does come to mind though.
-**9/**
+**9/** @CodePotrick
@AgileJebrim @NOTimothyLottes Its kinda annoying to put sgpr like logic in an ir tho as they have very specific limitations on each platform.
Generalizing them in an ir might actually be a pessimisation.
-**10/**
+**10/** @CodePotrick
@AgileJebrim @NOTimothyLottes Amd for example can't do float ops on sgprs, so when you would allow float ops in the ir, amd has to move them to a vgpr, perform float op, move them back to sgpr for each ir-sgpr float op.
@@ -72,25 +72,25 @@ There are other examples for this.
And nvidias have even other constrains.
-**11/**
+**11/** @AgileJebrim
@CodePotrick @NOTimothyLottes And what’s the alternative right now? Just keep it all in a VGPR all the time?
-**12/**
+**12/** @CodePotrick
@AgileJebrim @NOTimothyLottes Ideally you'd avoid any float ops as long as you can to keep things in sgprs if you need to save registers/want the uniformity.
If you need float ops on that var its probably best to keep it in vgprs if the alternative would be to transfer between sgpr and vgpr a lot
-**13/**
+**13/** @AgileJebrim
@CodePotrick @NOTimothyLottes I wish I could work solely with integers all the time but if I did that on NV hardware, I’d be losing half the available ALUs.
-**14/**
+**14/** @AgileJebrim
@CodePotrick @NOTimothyLottes I haven’t looked closely at AMD hardware since I don’t work with it much.
-**15/**
+**15/** @CodePotrick
@AgileJebrim @NOTimothyLottes they have their actual isa public and inspectable which is really nice to know whats actually happening.
@@ -98,7 +98,7 @@ Rga is also really good. Feels like im more in control with amd compared to nvid
Maybe thats just the low level gremlin in my speaking tho ;).
-**16/**
+**16/** @AgileJebrim
@CodePotrick @NOTimothyLottes I do have access to some of NVIDIA’s NDA documentation and tools…
diff --git a/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/index.md b/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/index.md
index faceef9..00062d5 100644
--- a/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/index.md
+++ b/archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/index.md
@@ -25,50 +25,50 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Sometimes you only want to wave-coherent branch to something extremely rarely. There is no good way in GLSL to describe that. You always get one branch and one disruption of the linear path [RED]. What you want is [GREEN], common path is linear and branch-free. Gotos would enable
-**2/**
+**2/** @NOTimothyLottes
In theory wave-coherent branch hint and then providing say a 99% taken branch taken compile hint could enable a compiler to know how to do proper code gen here
-**3/**
+**3/** @NOTimothyLottes
The other thing, if you know a path is always taken by some of the lanes, and thus on AMD you want NO branches, and instead just EXEC changing, there is no way to express that either. Doing mix(,,bool) could add extra overhead vs simple EXEC masking
-**4/**
+**4/** @NOTimothyLottes
This second example is why you want to be able to mix 'always-lane-divergent' branch hint, with '50% probability' meaning the HW needs to always execute both paths, and thus use EXEC masking without physical branching (assuming a good compiler)
-**5/**
+**5/** @NOTimothyLottes
Also the lack of an explicit 'scalar' (aka SGPR) qualifier on variables. The compiler gets this wrong, a qualifier just fixes that problem. Non-SGPR platforms can just ignore the qualifier. And sgpr=readlane(maybeSgpr,0) can sometimes actually become a readlane (fail)
Branches: [[archive/threads/NOTimothyLottes/2024-11-22-sometimes-you-only-want-to-wave-coherent-branch/2024-11-22-AgileJebrim-shouldnt-uniform-be-a-scalar]]
-**6/**
+**6/** @NOTimothyLottes
Other big thing on AMD's PC side, the HW has all these nice SALU ops which set the SCC (scalar flags register), and there is no good way to trick the compiler to doing basic stuff like branch on SALU overflow ...
-**7/**
+**7/** @NOTimothyLottes
I tried using GLSL's uaddCarry() but it at the time pushed the whole operation from SALU back to VALU making the code extra horrible, and uaddCarry() and friends = basic fail, the carry is a bool in HW not an integer, silly lack of good pattern matching there applies
-**8/**
+**8/** @NOTimothyLottes
Anyway this stuff is easily fixable if people just actually cared about it. It's not like you need to scrap the API or invent a new language. Just fix what we have, and people like me will use it, and teach others how to use it well too.
-**9/**
+**9/** @NOTimothyLottes
Also for obvious reasons, at least provide a PRAGMA "not-stupid" that we can place in shaders to avoid all the overhead generating crap that deoptimizes code to check for junior programmer mistakes at runtime, this stuff is bloody hard (and sometimes) impossible to bypass today
-**10/**
+**10/** @NOTimothyLottes
Lets add another thing, if(subgroupElect()){} to try to make stuff SALU is broken. Because subgroupElect() will do all the overhead to find the lowest active lane (even in cases the compiler should know otherwise). And if(gl_SubgroupID==0) for that also isn't well optimized
-**11/**
+**11/** @NOTimothyLottes
Maybe another time we should dive into the problems with shading languages mixing branching with loads and killing all the latency hiding. But too much for this thread...
diff --git a/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/2024-12-16-axelgneiting-im-well-aware-its-really-curious-they-still-stick.md b/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/2024-12-16-axelgneiting-im-well-aware-its-really-curious-they-still-stick.md
index 6cb5160..005ef09 100644
--- a/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/2024-12-16-axelgneiting-im-well-aware-its-really-curious-they-still-stick.md
+++ b/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/2024-12-16-axelgneiting-im-well-aware-its-really-curious-they-still-stick.md
@@ -26,7 +26,7 @@ parent_post_id: "1868492851170205803"
## Branch
-**1/**
+**1/** @axelgneiting
@NOTimothyLottes @kechogarcia I'm well aware. It's really curious they still stick to this design after so many years.
diff --git a/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/index.md b/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/index.md
index 43e883c..05d6209 100644
--- a/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/index.md
+++ b/archive/threads/NOTimothyLottes/2024-12-15-buffer-zoo-is-more-about-the-silly-season-of/index.md
@@ -25,31 +25,31 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
"Buffer zoo" is more about the silly season of things needed on the Vulkan shader side to do what you actually want which is just get instruction intrinsics. Just the layout and SSBO aliasing (below) hints at brutal stupid API/shader design
-**2/**
+**2/** @kechogarcia
@NOTimothyLottes Dxc hlsl sm 6.5 lets you index into ResourceDescriptorHeap directly and cast to whatever resource type. That and mutable vulkan descriptors, you wouldn't need to go the buffer Zoo route.... But then dxc spirv ...
-**3/**
+**3/** @NOTimothyLottes
@kechogarcia Read<32,64,128>(uint64_t base, uint32_t offset, uint32_t immediate, uint32_t cacheControl, uint32_t format);
And be done with this stupid mess
-**4/**
+**4/** @axelgneiting
@NOTimothyLottes @kechogarcia NVidia can't just do random format conversions without it being a texture descriptor I thought?
-**5/**
+**5/** @NOTimothyLottes
@axelgneiting @kechogarcia Can get the non-conversion {signed/unsigned short/int/long and half/float/double, of {1-4} components}. Which is good enough to start the interface. Then yes for NV you'd need to alias via a storage_texel_buffer to get {10:11:11,10:10:10:2,norm*}
-**6/**
+**6/** @NOTimothyLottes
@axelgneiting @kechogarcia Then there are rough edges to TEXEL_BUFFER
diff --git a/archive/threads/NOTimothyLottes/2024-12-15-the-real-buffer-zoo-problem-with-vulkan-is/index.md b/archive/threads/NOTimothyLottes/2024-12-15-the-real-buffer-zoo-problem-with-vulkan-is/index.md
index bf5d3f5..085260c 100644
--- a/archive/threads/NOTimothyLottes/2024-12-15-the-real-buffer-zoo-problem-with-vulkan-is/index.md
+++ b/archive/threads/NOTimothyLottes/2024-12-15-the-real-buffer-zoo-problem-with-vulkan-is/index.md
@@ -25,10 +25,10 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
The real "buffer zoo" problem with Vulkan is needing to make your HW instruction emulation macros with overcomplete both {offset, and index} inputs so the emulation can choose the correct one based on whatever crap path is required {SSBO, TEXEL_BUFFER, future pointer}
-**2/**
+**2/** @NOTimothyLottes
TEXEL_BUFFER is needed for whatever formats one cannot load from SSBOs, and both of those require 'indexes', and whenever the IHVs actually correctly optimize the pointer extension, one needs the byte offsets instead. So deadcode removal nightmare land wins today :(
diff --git a/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/2024-12-16-AgileJebrim-fair-enough-current-compilers-are-a-bloated-mess.md b/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/2024-12-16-AgileJebrim-fair-enough-current-compilers-are-a-bloated-mess.md
index 2e5f6aa..ecc10e2 100644
--- a/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/2024-12-16-AgileJebrim-fair-enough-current-compilers-are-a-bloated-mess.md
+++ b/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/2024-12-16-AgileJebrim-fair-enough-current-compilers-are-a-bloated-mess.md
@@ -26,7 +26,7 @@ parent_post_id: "1868716773937414589"
## Branch
-**1/**
+**1/** @AgileJebrim
@NOTimothyLottes @GustavSterbrant Fair enough. Current compilers are a bloated mess anyways and you’d get much faster times with your own assembler.
diff --git a/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/index.md b/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/index.md
index 4ccd732..02c104a 100644
--- a/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/index.md
+++ b/archive/threads/NOTimothyLottes/2024-12-16-so-i-dont-know-that-spir-v-vs-optypeint-24/index.md
@@ -25,19 +25,19 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
@GustavSterbrant So I don't know that SPIR-V vs OpTypeInt 24 question, but if someone didn't write tests for that it's likely never been setup to be pattern matched. Most of the problems I see cannot be fixed just by bypassing GLSL and doing SPIR-V directly. So not yet tempted to write a new SL
-**2/**
+**2/** @AgileJebrim
@NOTimothyLottes @GustavSterbrant If you’re targeting a console with AMD hardware, why don’t you just rewrite the backend compiler? I assume you have the source for it too, so it’s more tweaking an existing compiler than anything else?
-**3/**
+**3/** @NOTimothyLottes
@AgileJebrim @GustavSterbrant At-home stuff (aka non-employer) targets Vulkan Windows mostly (unfortunately). No interface in AMD's Windows driver to load binary shaders into Vulkan. If SteamOS ever fully took over PC gaming, then certainly I'd just go direct to the AMD kernel driver and bypass user-mode VK
-**4/**
+**4/** @NOTimothyLottes
@AgileJebrim @GustavSterbrant Also I wouldn't just modify an existing compiler, I'd just write an assembler specific for GCN/RDNA/whateversNext family.
diff --git a/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/2024-12-21-AgileJebrim-have-you-tried-using-the-intel-cache-controls.md b/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/2024-12-21-AgileJebrim-have-you-tried-using-the-intel-cache-controls.md
index 6567dd9..56e59dc 100644
--- a/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/2024-12-21-AgileJebrim-have-you-tried-using-the-intel-cache-controls.md
+++ b/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/2024-12-21-AgileJebrim-have-you-tried-using-the-intel-cache-controls.md
@@ -26,15 +26,15 @@ parent_post_id: "1870343645926224197"
## Branch
-**1/**
+**1/** @AgileJebrim
@NOTimothyLottes Have you tried using the Intel cache controls extension I shared earlier to see if they work on AMD?
-**2/**
+**2/** @NOTimothyLottes
@AgileJebrim Not enough free time. Given that AMD's compiler has some serious correctness bugs ignoring memory qualifiers, I doubt they implemented the Intel extension.
-**3/**
+**3/** @NOTimothyLottes
@AgileJebrim Will say though that if they ever implement a WMMA access extension (I don't know if they did or didn't yet), and they don't have streaming memory qualifier support they are just shooting their own AI stock$$$ gold rush foot off.
diff --git a/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/index.md b/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/index.md
index cbf3d9f..60074bb 100644
--- a/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/index.md
+++ b/archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-atomic-workaround-im/index.md
@@ -25,17 +25,17 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Hopefully with this last atomic workaround I'm almost done with cleaning and fixing the 'bind-everything-once' style Vulkan engine design. Work in progress in the images that follow. Setting up the macros to get all the format aliasing is well quite ugly.
-**2/**
+**2/** @NOTimothyLottes
I end up doing a lot of duplication via macros since memory qualifiers are on the layout aliasing (instead of an argument to the operation like they should be) ...
-**3/**
+**3/** @NOTimothyLottes
Vulkan is missing the streaming qualifiers, but I write the code like they exist for future compat
W ... writeonly coherent (all writes)
@@ -52,67 +52,67 @@ Branches: [[archive/threads/NOTimothyLottes/2024-12-21-hopefully-with-this-last-
-**5/**
+**5/** @NOTimothyLottes
Texture layout aliasing is well the easy stuff since it's just readonly effectively
-**6/**
+**6/** @NOTimothyLottes
STORAGE_TEXEL_BUFFER is well complex for aliasing and how to best use. Here is what I'm doing for setup (macro heavy). I have a define for each format descriptor index if I want to reorder them by usage for better cache layout. I only keep 32/64/128 bit types
-**7/**
+**7/** @NOTimothyLottes
I didn't put in support for 16-bit NORM yet because it tends not to get used (bad match for FP16). Likewise no buffer access to 9E5 or sRGB due to HW portability support issues
-**8/**
+**8/** @NOTimothyLottes
So todays HW
(1.) At least for AMD buffer atomics get the signage from the OPCODE so in theory one can use a UINT32 typed TEXEL buffer with both aliased as r32ui and r32i
-**9/**
+**9/** @NOTimothyLottes
(2.) No buffer compression HW, so unlike images, there is no point in using separate types if the layout aliasing trick works. One could get by with just 32/64/128 bit type descriptors and extra ones for anything with format conversion
-**10/**
+**10/** @NOTimothyLottes
(3.) In cases like x<2,4> actually probably better to alias those at UINTx<1,2> because then one is sure the compiler doesn't screw up the implicit NOPing of the undo the the format conversion!
-**11/**
+**11/** @NOTimothyLottes
(4.) There is a strong desire to keep the number of descriptors down to avoid extra work in SMEM ops and extra SGPR pressure. So that also favors aliasing.
-**12/**
+**12/** @NOTimothyLottes
(5.) Ideally I'd want TBUFFER support with the HW grabbing the index width from the type in the opcode instead of the descriptor (but I don't think the HW does that, so probably would always need 3 descriptors minimum).
-**13/**
+**13/** @NOTimothyLottes
(6.) The future? Image compression relies on having the right type info in the descriptor to choose the right compression mode for decorrelation of the data. What happens if GPUs get buffer compression some day and everyone is just type aliasing all the time like SSBOs do?
-**14/**
+**14/** @NOTimothyLottes
(7.) What is the "right answer"? Even signed vs unsigned could be important for data decorrelation. Certainly float vs int is. But no one wants to burn perf today based on a guess of what is needed in an unknown future.
-**15/**
+**15/** @NOTimothyLottes
(8.) So my compromise is to have all the types, but write the code to use type aliasing (the fast path on todays HW) when I don't think data compression would help. And only use the right type (slower) if there is a prediction it might help some day if buffer compression shows up
-**16/**
+**16/** @NOTimothyLottes
(9.) In cases where I need compression today, then I use explicit 2D images (assuming 1D images don't get compression on some HWs). But note this is not great, because often I need that data back in SGPRs (expensive, SMEM doesn't to image loads)
-**17/**
+**17/** @NOTimothyLottes
Combining the STORAGE_TEXEL_BUFFER tricks (for something a good compiler could optimize from last week or so), I'm down to a few hundred macros for STB access. Showing a few here. It's ugly but the only way to actually implement well.
-**18/**
+**18/** @NOTimothyLottes
Not sure if this is the end of this story yet, but hopefully the holidays I get this back online and can get back to using it. Probably have it down to as optimal as it can get while being as portable and future looking as possible
diff --git a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-04-marc_b_reynolds-its-pretty-amazing-how-good-the-hastings.md b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-04-marc_b_reynolds-its-pretty-amazing-how-good-the-hastings.md
index 59ba1ed..8b8ee98 100644
--- a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-04-marc_b_reynolds-its-pretty-amazing-how-good-the-hastings.md
+++ b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-04-marc_b_reynolds-its-pretty-amazing-how-good-the-hastings.md
@@ -26,7 +26,7 @@ parent_post_id: "1875589737282679108"
## Branch
-**1/**
+**1/** @marc_b_reynolds
@NOTimothyLottes It's pretty amazing how good the Hastings approximations still are. I'd note that they are designed for minimizing absolute error which isn't what you'd want for general purpose usage but it's the right answer for "all angles are equally important" problems.
diff --git a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-JBrooksBSI-some-optimization-ideas-1-for-rdna2-simd-insn.md b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-JBrooksBSI-some-optimization-ideas-1-for-rdna2-simd-insn.md
index 7a37947..7e4b481 100644
--- a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-JBrooksBSI-some-optimization-ideas-1-for-rdna2-simd-insn.md
+++ b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-JBrooksBSI-some-optimization-ideas-1-for-rdna2-simd-insn.md
@@ -26,7 +26,7 @@ parent_post_id: "1875583660545732960"
## Branch
-**1/**
+**1/** @JBrooksBSI
@NOTimothyLottes Some optimization ideas:
@@ -36,11 +36,11 @@ parent_post_id: "1875583660545732960"
3) If FP16 range is ok, gives 2x VALU speed
-**2/**
+**2/** @NOTimothyLottes
@JBrooksBSI Lack of ABS modifiers on V_PK ops basically kills FP16 benefit here unfortunately. I do unroll when not VGPR limited (favorite optimization). Wary though of SALU/VALU crossings due to latency + scheduling behavior (loss of operand cache, etc). VCC probably has special forwarding
-**3/**
+**3/** @JBrooksBSI
@NOTimothyLottes I did an approx equal-area mapping to a 2D texture in 2018
diff --git a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-pixelmager-i-was-looking-at-a-very-similar-problem-for-hemi.md b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-pixelmager-i-was-looking-at-a-very-similar-problem-for-hemi.md
index 548c90b..096f1d3 100644
--- a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-pixelmager-i-was-looking-at-a-very-similar-problem-for-hemi.md
+++ b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-pixelmager-i-was-looking-at-a-very-similar-problem-for-hemi.md
@@ -26,7 +26,7 @@ parent_post_id: "1875589737282679108"
## Branch
-**1/**
+**1/** @pixelmager
@NOTimothyLottes I was looking at a very similar problem for hemi-octahedrons recently. I definitely need to revisit in the context of this EAM paper, I ended up with a pretty slow polar-coordinate-remapping instead to move precision to the horizon https://www.shadertoy.com/view/wsBXzD
diff --git a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/index.md b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/index.md
index b5386bc..ba243ce 100644
--- a/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/index.md
+++ b/archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
For the love of octahedrons: https://fileadmin.cs.lth.se/graphics/research/papers/2008/simdmapping/clarberg_simdmapping08_preprint.pdf
@@ -33,7 +33,7 @@ Mapping this well to the GPU follows ...
-**2/**
+**2/** @NOTimothyLottes
At some point the standard Octahedron mapping leaves a lot to be desired due to highly variable texel sizing, so have been using that paper's equal area mapping instead. Spent some time optimizing today, got to this which is in theory just 31ops for the 2D to 3D transform
@@ -41,29 +41,29 @@ At some point the standard Octahedron mapping leaves a lot to be desired due to
Branches: [[archive/threads/NOTimothyLottes/2025-01-04-for-the-love-of-octahedrons-https-fileadmin-cs/2025-01-06-JBrooksBSI-some-optimization-ideas-1-for-rdna2-simd-insn]]
-**3/**
+**3/** @NOTimothyLottes
AMD's latest driver actually does mostly a good job compiling that (32 op clocks compiled, just 1 more instruction somewhere). I'm surprised actually it's now picking up 'cos(x*2pi)' and pattern matching that to just V_COS_F32!
-**4/**
+**4/** @NOTimothyLottes
And the inverse which should also be around 32 op clk (VALU). This uses the Horner form for the papers atan approximation. Could perhaps make that less or more accurate if desired.
-**5/**
+**5/** @NOTimothyLottes
AMD's compiler also does a good job there.
-**6/**
+**6/** @NOTimothyLottes
If AMD evolved to a fused floating point compare and select instead of a separate V_CMP* and V_CNDMASK_B32, it would shave a few cycles. Also if they could push 2 results into a result cache in 1 clk, doing the MIN and MAX in one op would shave a cycle.
-**7/**
+**7/** @NOTimothyLottes
Related> Great ref for fast atan2: https://mazzo.li/posts/vectorized-atan2.html
I'm using the simplest form from the 1955 paper in horner form scaled by /pi for cylindrical view projection code
diff --git a/archive/threads/NOTimothyLottes/2025-01-06-one-of-the-downsides-of-v-cndmask-b32-on-amd-is/index.md b/archive/threads/NOTimothyLottes/2025-01-06-one-of-the-downsides-of-v-cndmask-b32-on-amd-is/index.md
index 011ea54..2b4c703 100644
--- a/archive/threads/NOTimothyLottes/2025-01-06-one-of-the-downsides-of-v-cndmask-b32-on-amd-is/index.md
+++ b/archive/threads/NOTimothyLottes/2025-01-06-one-of-the-downsides-of-v-cndmask-b32-on-amd-is/index.md
@@ -25,38 +25,38 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
One of the downsides of V_CNDMASK_B32 on AMD is that you burn the SGPRs on the VCC bool, so if you are selecting between constants, those require extra V_MOV_B32 ops. Would be much better to have fused cmp+mask so this limitation would be lifted!
-**2/**
+**2/** @NOTimothyLottes
Another night, another round of AMD compiler bugs. Sometimes AMD fails 'uint32_t packFloat2x16(f16vec2 v)' ... I'm seeing the 16-bit MSB cleared in this constant (yeah it's the slow V_CNDMASK_B32 case in the prior tweet)
-**3/**
+**3/** @NOTimothyLottes
Workaround is to use 'pack32(halfBitsToUint16(a))' instead (ie first convert the packed 16-bit float to packed 16-bit integer, then convert to 32-bit integer) ...
-**4/**
+**4/** @NOTimothyLottes
One of my favorite AMD instructions V_BFI_B32 is unfortunately one that no intrinsic exists for on PC, and one that the AMD compiler often messes up the pattern matching for, sometimes it reduces to {AND,ADD} instead
-**5/**
+**5/** @NOTimothyLottes
Just looking at the next 5 lines of disassembly shows another 2 perf bugs: the compiler transforms 3 operations into 5 operations because it cannot handle mixed packed and unpacked stuff. The 2 V_ANDs can be merged, and the LSHL and CVT should just be one op
-**6/**
+**6/** @NOTimothyLottes
No way to work around those problems. Looks like bitfieldExtract 'v4' back-propagates something where the compiler ignores the .y in the packed logic, and then makes a mess of things scalarizing it. BFE only uses the 5-bit LSB of 'v4', so it's safe to leave junk in the other bits
diff --git a/archive/threads/NOTimothyLottes/2025-01-09-just-for-fun-started-to-look-into-cardinal-cubic/index.md b/archive/threads/NOTimothyLottes/2025-01-09-just-for-fun-started-to-look-into-cardinal-cubic/index.md
index 03350a0..b84522d 100644
--- a/archive/threads/NOTimothyLottes/2025-01-09-just-for-fun-started-to-look-into-cardinal-cubic/index.md
+++ b/archive/threads/NOTimothyLottes/2025-01-09-just-for-fun-started-to-look-into-cardinal-cubic/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Just for Fun: Started to look into "Cardinal Cubic O-MOMS" for resampling, some refs:
https://hhoppe.com/proj/filtering/supp/
@@ -33,7 +33,7 @@ https://hhoppe.com/proj/filtering/supp/sample_code.cpp
The source paper is math salad:
https://www.ee.cuhk.edu.hk/~tblu/monsite/pdfs/blu0101.pdf
-**2/**
+**2/** @NOTimothyLottes
Results are quite nice in repeated reprojection:
https://w3.impa.br/~diego/publications/NehHop14.pdf
@@ -42,59 +42,59 @@ Lanczos is of course not stable (if you reproject enough with a fast lanczos app
-**3/**
+**3/** @NOTimothyLottes
However O-MOMS appears to need a pre-pass on the data before running the simple cubic filter. That simple cubic would otherwise blur bad (no negative lobes). So this is about where I stopped dissecting the math salad, and started looking at the code salad
-**4/**
+**4/** @NOTimothyLottes
That prepass seems to work with 9 coefs in 1 dimension. So this starts to look mighty expensive??? for GPU-side implementation (compared to the existing option of limiting lanczos to make it stable).
-**5/**
+**5/** @NOTimothyLottes
Anyway if anyone knows of a less salad-like example of cubic O-MOMS, please post
-**6/**
+**6/** @NOTimothyLottes
So if you reproject rotate in linear using a bilinear filter, after 16 reprojections you get this slop (very blurry), which is why the old simple TAA's started to look bad very fast
-**7/**
+**7/** @NOTimothyLottes
Compared to say this with a clamped approximate lanczos (same 16 reprojections, and linear filtering). The min/max for the clamp is of the inner 2x2 quad of the 4x4 filter window
-**8/**
+**8/** @NOTimothyLottes
So even after 16 frames, clamped lanczos approximation is already significantly less sharp than source (below). Thing most of the shader TAAs screw up is that even with great reprojection filtering, still need error-correction sharpening on the reprojection to keep it dialed in
-**9/**
+**9/** @NOTimothyLottes
Some don't limit the kernel approximation that has negative lobes, because it's not differentiable, leading to the classic trailing edge halo (dark outline typically seen in DLSS2 at least). After close to 64 frames of reprojection (rotation), easy to see that effect
-**10/**
+**10/** @NOTimothyLottes
Letting that go too long and well it converges to a high contrast black and white mess
-**11/**
+**11/** @NOTimothyLottes
The non-linear limiter (simple clamping) keeps it mostly stable in color, even if the detail still converged to noodles
-**12/**
+**12/** @NOTimothyLottes
Also if you overcook your negative lobes in the approximation (using the RED curve below), it speeds up the noodling process (that is the same 16 reprojections as prior)
diff --git a/archive/threads/NOTimothyLottes/2025-01-22-simple-napkin-analysis-of-that-high-end-crt/index.md b/archive/threads/NOTimothyLottes/2025-01-22-simple-napkin-analysis-of-that-high-end-crt/index.md
index b1137cf..70c67a0 100644
--- a/archive/threads/NOTimothyLottes/2025-01-22-simple-napkin-analysis-of-that-high-end-crt/index.md
+++ b/archive/threads/NOTimothyLottes/2025-01-22-simple-napkin-analysis-of-that-high-end-crt/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Simple napkin analysis of that high-end CRT scalar (monochome one) ... notes about cleaning up the code.
@@ -33,17 +33,17 @@ I track state usage throughout the code to ballpark expected max VGPR count. Thi
-**2/**
+**2/** @NOTimothyLottes
So yeah packed 16-bit is the reason complex shaders like this are possible on PC GPUs. It is the way to single pass and avoid multiple trips through DRAM.
-**3/**
+**3/** @NOTimothyLottes
This code does 2 parallel kernels, but also breaks the computation of each kernel into 4 weighted sums. This is done for 2 reasons: (a.) possibly higher precision, (b.) to enable parallel work to hide VALU latency (ILP)!
-**4/**
+**4/** @NOTimothyLottes
This shader needs roughly
410 VALU op clocks
@@ -51,30 +51,30 @@ And 253 of those (more than half)
are in the load latency window
So this shader will trivially hide a lot of latency without getting to high wave/CU counts
-**5/**
+**5/** @NOTimothyLottes
BUT
Traditionally this has been a curse, because AMD's oldest wave first scheduling breaks down when the oldest is ultra high VALU load without stalls! The other waves often cannot get forward progress to get loads out to debubble the memory sub-system
-**6/**
+**6/** @NOTimothyLottes
Worst case (no scaling, no compression) this would use 6-bytes/pixel of bandwidth (damn), and amortize closer to 4-bytes/pixel with scaling. And GPUs have capacity often for 32 VALU op clocks per byte. So this is certain to be VALU bound (410+ VALU clocks)
-**7/**
+**7/** @NOTimothyLottes
But things like Strix Halo (laptops) are quite a bit more bandwidth starved, so generally I try to stay VALU bound to be friendly towards scaling down
-**8/**
+**8/** @NOTimothyLottes
Estimation that something like a 7900 XT would be able to do over 10,000 of these passes at 4K per second, so this technique is good for 480 Hz! Of course I don't have a 7900 XT, and my only working AMD GPU laptop (the other has bad HDMI port) refuses to profile, so numbers later
-**9/**
+**9/** @NOTimothyLottes
Writing code (below, note FMA_MIX is the hot ticket for free FP32->FP16 conversion) with instruction intrinsic macros (that unfortunately map to high-level shader code). But it at least enables me to ballpark instruction counts. With one exception I count transcendentals as 4 ops
-**10/**
+**10/** @NOTimothyLottes
Can compare guesses with actuals on the disassembly/
@@ -82,17 +82,17 @@ Can compare guesses with actuals on the disassembly/
-**11/**
+**11/** @NOTimothyLottes
I use 13 transcendentals so adjusting my 410 count by -13*3 I get 371 VALU ops. The actual shader uses 438 (and is VALU bound) an extra 18% extra slop somewhere. Some of that is that I didn't count the CS swizzle logic (but that won't account for most of the extra 67 ops) ...
-**12/**
+**12/** @NOTimothyLottes
Some of the slop, it's not using NSA (this is GFX9), so lots of extra V_MOV_B32s. The gather offsets are packed in an extra VGPR so even if the base {v34,v35} are shared across all the gather4s, it's duplicating those VGPR pairs 8 extra times (no NSA here).
-**13/**
+**13/** @NOTimothyLottes
GFX9 is Vega, so no NSA here, and 1 SGPR read per operation. It was RDNA1 that introduced the good stuffs (NSA and 2 SGPRs/op).
@@ -102,7 +102,7 @@ Can see below cases where 2 SGPRs are needed Vega will introduce extra V_MOV_B32
-**14/**
+**14/** @NOTimothyLottes
Now some actual compiler bugs,
(1.) Vega has V_MAD_MIX, but the compiler won't use it, instead it wastes extra V_CVT_PKRTZ_F16_F32 ops
diff --git a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-bmcnett-my-take-is-similar-but-i-also-feel-that-a-lot-of.md b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-bmcnett-my-take-is-similar-but-i-also-feel-that-a-lot-of.md
index 30f5b92..ad55028 100644
--- a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-bmcnett-my-take-is-similar-but-i-also-feel-that-a-lot-of.md
+++ b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-bmcnett-my-take-is-similar-but-i-also-feel-that-a-lot-of.md
@@ -26,15 +26,15 @@ parent_post_id: "1883580512171942335"
## Branch
-**1/**
+**1/** @bmcnett
@NOTimothyLottes My take is similar, but I also feel that a lot of processing is best done predictively in parallel across multiple future frames, one SIMD lane per future frame
-**2/**
+**2/** @NOTimothyLottes
@bmcnett Don't necessarily want to store all predictions raw though. One of the advantages of say simple things like baked directional lightmaps is that one keeps the data for multiple "frames" (or views) in a compressed form until just right before usage, and it's mis-predict safe
-**3/**
+**3/** @bmcnett
@NOTimothyLottes Yeah, you need to store many prediction outputs in compressed form, with the time dimension being one over which you compress, in addition to whatever spatial dimensions are relevant
diff --git a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-noop_dev-i-thought-framegen-was-just-an-offspring-of-mpeg2.md b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-noop_dev-i-thought-framegen-was-just-an-offspring-of-mpeg2.md
index ccae505..434b8fd 100644
--- a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-noop_dev-i-thought-framegen-was-just-an-offspring-of-mpeg2.md
+++ b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-noop_dev-i-thought-framegen-was-just-an-offspring-of-mpeg2.md
@@ -26,7 +26,7 @@ parent_post_id: "1883591956598845661"
## Branch
-**1/**
+**1/** @noop_dev
@NOTimothyLottes I thought framegen was just an offspring of mpeg2 motion prediction, at least how it was in TVs for 15 years.
diff --git a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-27-Varaquilex-a-visualization-of-said-cold-caches-on-a-cs.md b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-27-Varaquilex-a-visualization-of-said-cold-caches-on-a-cs.md
index 93932e0..8256045 100644
--- a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-27-Varaquilex-a-visualization-of-said-cold-caches-on-a-cs.md
+++ b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-27-Varaquilex-a-visualization-of-said-cold-caches-on-a-cs.md
@@ -26,29 +26,29 @@ parent_post_id: "1883569959286313322"
## Branch
-**1/**
+**1/** @Varaquilex
@NOTimothyLottes A visualization of said cold caches on a CS workload from Timothy's GDC 2018 Engine Optimization Hot Lap slides: https://gpuopen.com/wp-content/uploads/2018/05/gdc_2018_sponsored_engine_optimization_hot_lap.pptx
-**2/**
+**2/** @NOTimothyLottes
@Varaquilex Amazingly unfortunate that AMD still doesn't release the tool that those instruction trace captures had been visualized on. It's the best and most useful tool period I've ever seen at any company in the industry.
-**3/**
+**3/** @NOTimothyLottes
@Varaquilex If they did choose to release it, I'd teach the world how to use it well, for free. For hardcore optimization it is close to ideal. RGP doesn't start to really show you what you need to know to make good hardcore engineering decisions on AMD hardware.
-**4/**
+**4/** @NOTimothyLottes
@Varaquilex This is a hint for someone like Valve who could take their RADV SQTT (https://www.phoronix.com/news/RADV-SQTT-Profiling-Support) interface and build something truly transformative for GPU shader engineering
-**5/**
+**5/** @NOTimothyLottes
@Varaquilex Mix that kind of visualization tool with a good shader compiler (and HW intrinsics) and basically it's the kind of crack a serious GPU shader dev cannot say no too
-**6/**
+**6/** @Varaquilex
@NOTimothyLottes That tool was one of the most insightful tools I have ever used. I do miss it. It would really be awesome to see it released to the public.
diff --git a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/index.md b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/index.md
index acf1611..e7249a8 100644
--- a/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/index.md
+++ b/archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Often overlooked aspect of GPU perf scaling
Shaders run at two rates
@@ -33,78 +33,78 @@ Shaders run at two rates
(2.) Warm I$ and K$ rate
You actually need jobs with small wave count to be sharing the same I$ and K$ across waves (cannot be latency sensitive)
-**2/**
+**2/** @NOTimothyLottes
Big problem with mass amounts of artist graph authored material shaders paired with raster,
(1.) More materials
(2.) GPU kicks work as wide as possible (due to limited ROP queue size)
Both amplify the amount of cold cache work
-**3/**
+**3/** @NOTimothyLottes
Very common to look even at full-screen passes and see quite long first waves/SIMD (cold caches), followed by later warm-cache steady state. As GPUs get huge, it pushes more and more waves into the cold-cache region. Scaling-TAAs do the same by reducing render resolution.
Branches: [[archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-27-Varaquilex-a-visualization-of-said-cold-caches-on-a-cs]]
-**4/**
+**4/** @NOTimothyLottes
So quite literally the smaller the GPU (aka mobile), the more possible benefits from scaling-TAAs getting reduced resolution, because the cold-cache effects are minimized, etc. But with say the 5090, scaling-TAAs can drop whole GPU efficiency by a substantial amount
-**5/**
+**5/** @NOTimothyLottes
NVIDIA has load prefetch hints (load more lines than required for the load), and AMD should ideally start including the same for both K$ and D$, so one can at least reduce worst case latency. This doesn't solve bandwidth duplication of wide work distribution though.
-**6/**
+**6/** @NOTimothyLottes
There are a few different perf wins from decoupling shading from raster, one is the reduction of cold cache effects. One can loop through waves of work in the same material shader, without exit, without reload of constants, etc.
-**7/**
+**7/** @NOTimothyLottes
Decoupled shading moves a subset of the shading data [material lookup] from interpolated (and thus distributed duplication) to non-temporal streaming (no duplication).
-**8/**
+**8/** @NOTimothyLottes
Likewise if it's same-material same-wave, aka one wave is looping through a local collection of surface, the remaining non-material sampling (that is interpolated) has a higher likely hood of hitting in the cache [less ultimate duplication of data across the chip]
-**9/**
+**9/** @NOTimothyLottes
In modern times with scaling-TAAs and maximum negative mip-bias, by reducing render resolution and maximizing frame rate, one is also minimizing cache reuse. So instead of say shading all the near samples at the same time, each are now divided across perhaps 32 frames
-**10/**
+**10/** @NOTimothyLottes
Thus a massive mismatch between data layout and data usage. The data is stored (and compressed) localized and layered (multiple textures/material), but is increasingly being used in an effectively random access. Both scaling-TAAs and RT are guilty here.
-**11/**
+**11/** @NOTimothyLottes
Games that rely on a mix of {heavy deferred shading, scaling-TAAs (reduced render res), RT noise reduction, and frame generation} are scaling poorly (bad engineering) and scale as a function of increased {latency, artifacts}
-**12/**
+**12/** @NOTimothyLottes
Meanwhile games that are still engineered more like vintage games {high res, low try density, simple baked lightmap textures mostly, MSAA} are scaling relatively well getting high FPS and low latency
-**13/**
+**13/** @NOTimothyLottes
Ultimately all of this hints that it would be better if the per-frame workloads are closer to the vintage games (no-TAA, no frame-gen), and instead one amortizes shading into something that "bakes" in realtime amortized across many frames into the vintage style engine data
Branches: [[archive/threads/NOTimothyLottes/2025-01-26-often-overlooked-aspect-of-gpu-perf-scaling/2025-01-26-bmcnett-my-take-is-similar-but-i-also-feel-that-a-lot-of]]
-**14/**
+**14/** @NOTimothyLottes
All these "AI" spatial-temporal denoise-scaling-TAAs are ultimately just doing really expensive logic to try to reconstruct the surface material properties at high res and local lighting from a blurry/noisy mess then apply the local conditions to the material
-**15/**
+**15/** @NOTimothyLottes
Which is perhaps stupid given the games already easily know the exact high-res material properties, why try to "infer" them burning TOps of logic and heating your office.
-**16/**
+**16/** @NOTimothyLottes
Scaling-denoise-TAAs do hint thought that perhaps the academic methods games use for BPR and shading are quite lacking in terms of amortization of costs.
-**17/**
+**17/** @NOTimothyLottes
Frame-gen when it "works" ok is just an alpha blend between two states. Clearly an engine could be doing that too instead of reshading everything every frame. And an engine could choose when to do that vs something else to avoid artifacts, something a frame-gen cannot do.
-**18/**
+**18/** @NOTimothyLottes
Ultimately the industry will choose if to devolve into AI generated slop-ware where IHVs black box more and more of your engine and you get more and more trapped and lazy. Or break out and do something better and control your own destiny.
diff --git a/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-just-raw-spatial-scaling-in-a-custom-resolve.md b/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-just-raw-spatial-scaling-in-a-custom-resolve.md
index 1e55963..13cfbd9 100644
--- a/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-just-raw-spatial-scaling-in-a-custom-resolve.md
+++ b/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-just-raw-spatial-scaling-in-a-custom-resolve.md
@@ -26,20 +26,20 @@ parent_post_id: "1884282476195110998"
## Branch
-**1/**
+**1/** @NOTimothyLottes
Just raw spatial scaling in a custom resolve/
4xMSAA at 2.25x area is 2.66xAA on edges
8xMSAA at 2.25x area scale is 5.33xAA on edges
8xMSAA at 4x area scale is 4xAA on edges <--- bingo
-**2/**
+**2/** @NOTimothyLottes
Take 8xMSAA with a view-port jitter pattern (or even PSL) which always maintains the same sample vs axis intersections! <--- double bingo
Sub-pixel detail is now mostly stable, will show up in all frames in the local neighborhood = stable temporally
-**3/**
+**3/** @NOTimothyLottes
Bottom line/
8xMSAA + smart jitter (or PSL)
@@ -49,25 +49,25 @@ ALL in one custom resolve pass
Something one could make temporally stable without ghosting and still maintain 4xAA (on edges at output resolution) on the worst case in disocclusions
-**4/**
+**4/** @NOTimothyLottes
It would destroy DLSS4 in terms of classic image quality
-**5/**
+**5/** @NOTimothyLottes
Note one can inline something like CAS/RCAS (what I did at AMD) into the custom MSAA resolve, by modulating a negative lobe based on a local min/max kernel's min distance to signal peak {0 or 1}. Meaning it's possible to get really sharp output from this combo.
-**6/**
+**6/** @dankbaker
@NOTimothyLottes Is there an example shader that does that custom resolve?
-**7/**
+**7/** @NOTimothyLottes
@dankbaker Probably not in the config you are interested in (I'm assuming spatial with no scaling?) Feel free to DM me. Most of these things need adaption specific to the config. Last one I did was huge spatial scaling for a CRT-styled scalar using this kernel,
-**8/**
+**8/** @NOTimothyLottes
@dankbaker My project is monochome so the kernel blending logic is single channel, and the content is designed to handle a huge amount of negative lobe well so I don't constrain ringing (BLUE, replace with 'm.y*RINGING'), and everything in linear of course ... but it should provide an idea
diff --git a/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-my-mindset-is-more-tuned-towards-rendering.md b/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-my-mindset-is-more-tuned-towards-rendering.md
index a0225e3..f8fdb02 100644
--- a/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-my-mindset-is-more-tuned-towards-rendering.md
+++ b/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-my-mindset-is-more-tuned-towards-rendering.md
@@ -26,11 +26,11 @@ parent_post_id: "1884360689093091618"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@MichalDrobot My mindset is more tuned towards rendering without minSampleShading and using the temporal component to get the shading resolution up since base frame rate will be high anyway. So no soft VRS in my line of thinking either (other than whatever falls out of 8xMSAA render)
-**2/**
+**2/** @MichalDrobot
@NOTimothyLottes That’s pretty much exactly the mindset and what ended up shipping in Killzone Shadow Fall (4xMSAA -> 2x scaling + TAA) and in FarCry4 8xMSAA FMask only + analytical resolve + TAA
Doing sub samples in FC4 was challenging due to all that AT foliage.
diff --git a/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/index.md b/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/index.md
index 59f86e8..ba99198 100644
--- a/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/index.md
+++ b/archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/index.md
@@ -25,65 +25,65 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
So we (the industry) really ever went back to the MSAA based TAA combinations and applied everything we learned in the past decade ...
Branches: [[archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-just-raw-spatial-scaling-in-a-custom-resolve]]
-**2/**
+**2/** @MichalDrobot
@NOTimothyLottes Hey that’s literally what our VRS is doing with all those tricks and more. We just don’t call it an upsampler ; )
On PC we resolve MSAA to texture2DArray to retain plane separation benefits for bandwidth and coherency
-**3/**
+**3/** @NOTimothyLottes
@MichalDrobot Larger differences are
(1.) Your VRS is PSL'ing to a regular grid? (need the actual 8x pattern for what I'm suggesting)
(2.) Sounds like you are getting benefit from FMASK due to the soft VRS, but for what I'm suggesting the NV flat+DCC layout is way better
-**4/**
+**4/** @MichalDrobot
@NOTimothyLottes 1) it’s 4xMSAA but we DRS only on X axis which is matching your case I believe. Similar how it was done it Killzone Shadowfall.
8xMSAA we could explore XY scaling
2) depends. On PC it’s flat /w DCC. On gen8 it’s fmask packed. Gen9 is FMask with DCC plane0/1
-**5/**
+**5/** @MichalDrobot
@NOTimothyLottes But sure I agree that 8x is the way to go for 4K. Our challenge is that we still have gen8 with 1k target and at those resolutions 8x scales really sub linear due to quad occupancy
-**6/**
+**6/** @NOTimothyLottes
@MichalDrobot I guess the question then is if you implement variable spatial scaling in the custom resolve, is the 8xMSAA loss something that can easily be covered by increased spatial scale on the low end HW? 8x area scaling at 8xMSAA is still likely good for 3xAA on edges at spatial-only
Branches: [[archive/threads/NOTimothyLottes/2025-01-28-so-we-the-industry-really-ever-went-back-to-the/2025-01-28-NOTimothyLottes-my-mindset-is-more-tuned-towards-rendering]]
-**7/**
+**7/** @MichalDrobot
@NOTimothyLottes If low end hw is decent with MSAA AND you can control triangle density effectively to combat quad occupancy loss (we can’t) - that’s the best there is imo.
FWIW that’s why we use stencil even for geo edges for MSAA - because we get too many interior edges that don’t do anything
-**8/**
+**8/** @NOTimothyLottes
@MichalDrobot I see, yes once authoring pushes tri/pix density then what makes sense changes. I was thinking more of the way things had been authored in the relief mapping era.
-**9/**
+**9/** @MichalDrobot
@NOTimothyLottes Then you need invest heavily into visbuffer for “simple draws” and pay setup price to compensate those deficiencies. involved pipeline that is not portable
I can totally see your plan working for specific art styles or more retro gaming. There is a huge Indy market for this
-**10/**
+**10/** @NOTimothyLottes
@MichalDrobot If tri/pix density is high, even if there are some huge triangles left, without substantially good multi-scale LOD (meaning cluster count scaling), I think soft culling alone falls off the !/$ curve for scaling - hints perhaps past the crossover for non-triangle rendering
-**11/**
+**11/** @NOTimothyLottes
@MichalDrobot At that stage I'd have transitioned to direct final view reconstruction from object space domain. Walking object space, atomicMin(MSB{z,ref}LSB) at some good enough density into the final projected space, then use a neighborhood of 'refs' to get back to object space neighborhoods
-**12/**
+**12/** @NOTimothyLottes
@MichalDrobot ... for the filtering. One can effectively cancel atomics per lane based on local projected screen-space density to deal with domain stretch (skinning), so it gets to be highly scalable.
-**13/**
+**13/** @NOTimothyLottes
@MichalDrobot The TAA reconstructions all crossed that threshold of cost where it's easy to swap in reconstruction from something other than screen-space. And with no disocclusion trouble, object space is much less of a challenge to go from.
diff --git a/archive/threads/NOTimothyLottes/2025-01-31-comparing-matrix-to-quaternion-code/index.md b/archive/threads/NOTimothyLottes/2025-01-31-comparing-matrix-to-quaternion-code/index.md
index 88b9a19..dd0fa53 100644
--- a/archive/threads/NOTimothyLottes/2025-01-31-comparing-matrix-to-quaternion-code/index.md
+++ b/archive/threads/NOTimothyLottes/2025-01-31-comparing-matrix-to-quaternion-code/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Comparing matrix to quaternion code:
(A.) https://d3cw3dd2w32x2b.cloudfront.net/wp-content/uploads/2015/01/matrix-to-quat.pdf
@@ -37,7 +37,7 @@ Anything better than those?
-**2/**
+**2/** @NOTimothyLottes
The (B.) alternative method might be just 32 VALU clocks on AMD, wrote up the code below (but warning didn't test it yet).
diff --git a/archive/threads/NOTimothyLottes/2025-02-04-gelatinous-pixel-soup/index.md b/archive/threads/NOTimothyLottes/2025-02-04-gelatinous-pixel-soup/index.md
index f32f410..b0ac1a0 100644
--- a/archive/threads/NOTimothyLottes/2025-02-04-gelatinous-pixel-soup/index.md
+++ b/archive/threads/NOTimothyLottes/2025-02-04-gelatinous-pixel-soup/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
__/ "GELATINOUS PIXEL SOUP!" \__
Another spicy Threat Interactive video
@@ -34,7 +34,7 @@ https://www.youtube.com/watch?v=KEtb0punTHk
Someone willing to challenge the status quo
Lets talk about some of his topics ...
-**2/**
+**2/** @NOTimothyLottes
Finally someone posting ms/frame breakdown!
Appears to be using an actual mid-range GPU
@@ -46,7 +46,7 @@ Even at 60Hz you'd be giving up the majority of your frame budget to AI
-**3/**
+**3/** @NOTimothyLottes
[ORANGE]
Transformer model being almost 2x the cost of the prior CNN model. Double the cost for less ghosting.
@@ -55,11 +55,11 @@ Note STP (non-ML) was targeting 1/3 to 1/2 of the cost of that old CNN model wit
-**4/**
+**4/** @NOTimothyLottes
It is certainly possible to engineer a bunch of very low cost and high quality human written shader solutions for scaling-TAAs that do better than the ML ones in !/$ for the non-ray-reconstruction cases
-**5/**
+**5/** @NOTimothyLottes
NV banking on poorly optimized PC titles though is NOT a new thing: lets rewind to 2012!
@@ -71,17 +71,17 @@ Yet NV wins because of game-ready drivers
-**6/**
+**6/** @NOTimothyLottes
NVIDIA was always about enabling dev laziness, the RT+AI+Fake era is just the ultimate form of that, where the lazy dev is marginalized to a few % of the total frame budget with AI taking the majority.
-**7/**
+**7/** @NOTimothyLottes
Others playing "follow-the-leader" unfortunately still didn't catch on to the most important point, that Jensen's plan forces consumers to buy into only high-end cards to fix all the PC game problems. Nothing about the AI future scales down!
-**8/**
+**8/** @NOTimothyLottes
Jensen's "Low-End" = 5070 is 1/3 the VALU of a 5090
@@ -90,7 +90,7 @@ is 1/19 the VALU and 1/7.6 the bandwidth
Already today, without scaling-TAAs on 5080, many "high-end" PC games either struggle to hit 60Hz at 4K or cannot make it to 120Hz ... ouch
-**9/**
+**9/** @NOTimothyLottes
So Jensen's AI future depends on big GPU$$$$
@@ -98,40 +98,40 @@ And all other non-NV IHVs and OEMs build substantially smaller GPUs (Apple) or f
Following Jensen's path is suicide, because they won't have the baseline GPU mass required to play
-**10/**
+**10/** @NOTimothyLottes
Should feel extra sorry for someone like Qualcomm who though they could just make an RT core and follow the baseline HW requirements, but completely missed the point that NV would just raise the ray-reconstruction cost to a place Qualcomm could never get to
-**11/**
+**11/** @NOTimothyLottes
AMD/others can easily extend out 1-fake frame to N-fake frames, and they all have timewarp for VR experience, so doing the fake latency thing is trivial too. And maybe FSR4/etc ML based non-RR scaling-TAAs hit DLSS parity soon
But NVIDIA has already pivoted to ray reconstruction
-**12/**
+**12/** @NOTimothyLottes
At the end of the day, it is actually unreasonable to expect IHVs to do anything other than follow NVIDIA if PC engines just eat up RT and get bottle-fed on AI. Even if AMD or anyone makes awesome divergent tech, if it isn't mass market engine adoption it will go no where
-**13/**
+**13/** @NOTimothyLottes
Likewise how can we expect major AAA engines to take on the uncertainty and insane R&D challenge of getting off their current NV evolution paths and do something radically different, it's just too high risk
-**14/**
+**14/** @NOTimothyLottes
So the industry is somewhat in a live lock condition where it won't make forward progress
-**15/**
+**15/** @NOTimothyLottes
Related story. So the reason I left AMD for Unity was because Unity was spinning up an R&D team for scalable high-end graphics. And our target was mobile through high-end PC. And left alone we would have got there. But the stock crashed and we got axed or forced out.
-**16/**
+**16/** @NOTimothyLottes
I think ultimately those in the industry who don't like the current status quo, it's on you to build the tech yourself and ship it in an game to prove it is possible. Because it isn't likely that anyone has the pockets deep enough to fund a new general purpose engine on risky R&D
-**17/**
+**17/** @0xpatrickhan
@NOTimothyLottes What are some problem areas you think need to be tackled? I’ve read some of what you’ve written in response to some of the gripes of modern day temporal supersampling/AA. What else? Anything that IHVs would be uniquely positioned to do?
-**18/**
+**18/** @NOTimothyLottes
@0xpatrickhan There is a laundry list of things IHVs dont expose or expose very poorly for basic compute shaders, making it quite difficult or impossible to get a compiler to do the right thing. Fix those and devs like myself could easily build better than AI tech options
diff --git a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-could-a-shader-compiler-not-do-this-i-e-detect.md b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-could-a-shader-compiler-not-do-this-i-e-detect.md
index 39d86fa..a60fad5 100644
--- a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-could-a-shader-compiler-not-do-this-i-e-detect.md
+++ b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-could-a-shader-compiler-not-do-this-i-e-detect.md
@@ -26,11 +26,11 @@ parent_post_id: "1912477061467304351"
## Branch
-**1/**
+**1/** @BoganBits
@NOTimothyLottes Could a shader compiler not do this? i.e. detect such inefficient code, and "re-vectorise" it, so to speak i.e. have each shader instance do 2 at once, interleaved
-**2/**
+**2/** @NOTimothyLottes
@BoganBits This is something to be done at the dispatch level, not something a compiler knows about
diff --git a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-i-would-be-interested-to-see-a-concrete-example.md b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-i-would-be-interested-to-see-a-concrete-example.md
index 3e1e24b..e7a7312 100644
--- a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-i-would-be-interested-to-see-a-concrete-example.md
+++ b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-i-would-be-interested-to-see-a-concrete-example.md
@@ -26,12 +26,12 @@ parent_post_id: "1912477061467304351"
## Branch
-**1/**
+**1/** @BoganBits
@NOTimothyLottes I would be interested to see a concrete example of this
ideally with a benchmark to show the improvement
-**2/**
+**2/** @NOTimothyLottes
@BoganBits Early STP had a mode to pipeline the dependent passes, that was back when it was being developed out of Unity. That mode was way faster. But later it was removed because Unity wouldn't allow resources bound for read+write at the same time = fail.
diff --git a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-DjMolehill-branching-cache-locality-and-memory-handling-are.md b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-DjMolehill-branching-cache-locality-and-memory-handling-are.md
index 789f862..eb8fa59 100644
--- a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-DjMolehill-branching-cache-locality-and-memory-handling-are.md
+++ b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-DjMolehill-branching-cache-locality-and-memory-handling-are.md
@@ -26,7 +26,7 @@ parent_post_id: "1912484261321392231"
## Branch
-**1/**
+**1/** @DjMolehill
@NOTimothyLottes branching, cache locality, and memory handling are key 🔥
diff --git a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-JBrooksBSI-id-add-standardized-documented-isa-that-enables.md b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-JBrooksBSI-id-add-standardized-documented-isa-that-enables.md
index c56239c..418e372 100644
--- a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-JBrooksBSI-id-add-standardized-documented-isa-that-enables.md
+++ b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-JBrooksBSI-id-add-standardized-documented-isa-that-enables.md
@@ -26,7 +26,7 @@ parent_post_id: "1912483968563269946"
## Branch
-**1/**
+**1/** @JBrooksBSI
@NOTimothyLottes I'd add:
@@ -34,25 +34,25 @@ Standardized, documented ISA that enables compatibility across multiple GPU gene
WGP (WorkGroup Processor) mode which doubles the # of SIMD units executing a single threadgroup, halving latency for bottleneck operations.
-**2/**
+**2/** @NOTimothyLottes
@JBrooksBSI Personally I still don't like the WGP+wave32 stuff. Limited dual issue instructions with less operand flexibility (wave64 back to back issue IMO is better, just HW dual pipe transcendentals). WGP's two L0 cache and related resource split issues.
-**3/**
+**3/** @JBrooksBSI
@NOTimothyLottes WGP mode and wave32 are separate features. WGP mode schedules waves within a threadgroup across both CUs (4x SIMDs) in each WGP instead of limiting waves to a single CU (2x SIMD).
-**4/**
+**4/** @NOTimothyLottes
@JBrooksBSI Yeah so it's more the wave32 that I don't like
-**5/**
+**5/** @JBrooksBSI
@NOTimothyLottes I'd like to discuss this in more detail, as I have found wave32 to be faster than wave64 for everything except some vertex shaders.
I think the reason wave64 can be faster for vertex shaders is that only half the VS waves get launched, so more occupancy for PS/CS waves per WGP.
-**6/**
+**6/** @JBrooksBSI
@NOTimothyLottes The reasons Wave64 has been slower for me:
1) More VGPR pressure = less occupancy
@@ -62,7 +62,7 @@ I think the reason wave64 can be faster for vertex shaders is that only half the
I spot-unroll 2x-4x for more intra-wave parallelism as needed.
-**7/**
+**7/** @NOTimothyLottes
@JBrooksBSI Re
1) With what I do, high occupancy is often slower
@@ -70,7 +70,7 @@ I spot-unroll 2x-4x for more intra-wave parallelism as needed.
3) It's half the K$ loads for wave64
4) I use DPP16 at most (no dynamic shuffle)
-**8/**
+**8/** @JBrooksBSI
@NOTimothyLottes Wow, that is wildly different from what I do.
diff --git a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/index.md b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/index.md
index 94a214a..476c4a9 100644
--- a/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/index.md
+++ b/archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/index.md
@@ -25,24 +25,24 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
__/ CS OPTIMIZATION BRAIN DUMPING \__
(1.) Sometimes branching can disrupt otherwise regular execution flow leading to a performance regression,
while it might be counter intuitive to always do more work, it can sometimes be faster too ->
-**2/**
+**2/** @NOTimothyLottes
WHY> Branching can cause: I$ misses, branch delays, wave switches that kill operand cache, poor register allocation, extra VALU overheads on the rejoin to move VGPRs, and most importantly poor VMEM behavior (not able to hoist out a speculative load earlier)
-**3/**
+**3/** @NOTimothyLottes
(2.) Time a shader in isolation, tend to see 3 regions of execution: {cold-start, warm-cache, drain} regions.
Early waves are missing through {I$,K$,L0$}, warm-cache waves have lower runtime.
For this reason it is very important to pipeline (overlap) workloads.
-**4/**
+**4/** @NOTimothyLottes
Serially dependent workloads should be broken up spatially and pipelined!
@@ -50,31 +50,31 @@ I've never seen a dev do this correctly (look at their serially dependent post p
Branches: [[archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-i-would-be-interested-to-see-a-concrete-example]], [[archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-BoganBits-could-a-shader-compiler-not-do-this-i-e-detect]]
-**5/**
+**5/** @NOTimothyLottes
(3.) If a shader is only going to run a small number of waves on say one CU (like a material used on a few pixels) then budget bandwidth for it's full {shader and constants} (which might be more costly than the textures themselves).
-**6/**
+**6/** @NOTimothyLottes
(4.) Back to {cold,warm,drain} -> for small workloads or large 'cold/drain-region' workloads, it is better to force that onto one CU and loop through work (semi or full) persistent waves, to ensure high cache locality and reuse.
-**7/**
+**7/** @NOTimothyLottes
... Note, might want to use large CU filling workgroups, because single-wave workgroups might get tossed on different low-level caches.
-**8/**
+**8/** @NOTimothyLottes
(5.) For what should be VALU bound stuff, usually the problem on AMD is locally clustered VMEM caused by oldest first scheduling, causing memory bubbles. What you really want is steady VMEM keeping memory working well in parallel with execution ...
-**9/**
+**9/** @NOTimothyLottes
... This can be very hard to fix. Sometimes you need to use more VALU to decode better compressed data to go faster (counter intuitive), or even reduce the waves running in parallel (for better cache/wave ratio) [also counter intuitive] ...
-**10/**
+**10/** @NOTimothyLottes
There are shader source level transforms which can help too. Meaning you might see a difference batching say by groups of 2x2 (part kernel) instead of say the full kernel size. Yes sometimes the shader compiler will radically re-order, other times not (depends on VGPR pressure)
-**11/**
+**11/** @NOTimothyLottes
(6.) The two most important things AMD ever did IMO to their architecture
(a.) Packed 16-bit (with double rate)
@@ -83,7 +83,7 @@ There are shader source level transforms which can help too. Meaning you might s
Branches: [[archive/threads/NOTimothyLottes/2025-04-16-cs-optimization-brain-dumping/2025-04-16-JBrooksBSI-id-add-standardized-documented-isa-that-enables]]
-**12/**
+**12/** @NOTimothyLottes
... The reasons being that it becomes possible to reduce round trips through memory by pass merging and other techniques -> resulting in shaders with massive state fitting in VGPRs without spilling
diff --git a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-holy-truthnuke-and-people-think-c-is-the-optimal.md b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-holy-truthnuke-and-people-think-c-is-the-optimal.md
index 8addbb9..509a0ba 100644
--- a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-holy-truthnuke-and-people-think-c-is-the-optimal.md
+++ b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-holy-truthnuke-and-people-think-c-is-the-optimal.md
@@ -26,17 +26,17 @@ parent_post_id: "1917652589358858332"
## Branch
-**1/**
+**1/** @onatt0
@NOTimothyLottes holy truthnuke - and people think C is the optimal state of possible runtimes when it's a very limited runtime to have state mixed call/data-stacks
not only you have to keep the whole stack around with replicated state, it limits to serialized execution instead of parallel
-**2/**
+**2/** @NOTimothyLottes
@onatt0 I laugh when people say C is like assembly, they are missing what we actually did in assembly back then, which was all registers and globals and gotos, no stacks. It's radically different than good assembly.
-**3/**
+**3/** @onatt0
@NOTimothyLottes when C became *the* execution model, it restricted all future hardware, HW gets built with how the C compiler will compile to it instead of what's ultimately a good design and a malleable macro-lang to map to HW
diff --git a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-imo-code-compilation-is-inherently-sequential.md b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-imo-code-compilation-is-inherently-sequential.md
index d784087..4f56386 100644
--- a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-imo-code-compilation-is-inherently-sequential.md
+++ b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-imo-code-compilation-is-inherently-sequential.md
@@ -26,17 +26,17 @@ parent_post_id: "1917646466417381426"
## Branch
-**1/**
+**1/** @onatt0
@NOTimothyLottes IMO code compilation is inherently sequential+ "execution contextual", dynamic logic execution to get the binary as the essence vs a static lang
codegen with execution on GPU could work as 2-items(vreg)/stack and 32K cells per lane for AI to map code to data instead of weights?
-**2/**
+**2/** @NOTimothyLottes
@onatt0 So for x86 I've many times written code gen with extra nop-prefix padding to fix all instructions to a multiple of known 32-bits. Which means you know in advance sizing of everything, then you can easily do parallel code generation. So need not necessarily all be serial
-**3/**
+**3/** @NOTimothyLottes
@onatt0 However I'm often building then instantly using code while generating a baked binary to use later, so that regard much is inherently serially dependent. This bootstrapping technique is perhaps one the great things to learn from things like color forth IMO.
diff --git a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-simply-brilliant.md b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-simply-brilliant.md
index b015888..7608ff6 100644
--- a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-simply-brilliant.md
+++ b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-simply-brilliant.md
@@ -26,7 +26,7 @@ parent_post_id: "1917653265329594372"
## Branch
-**1/**
+**1/** @onatt0
@NOTimothyLottes simply brilliant!
diff --git a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/index.md b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/index.md
index 5b915ab..258aa19 100644
--- a/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/index.md
+++ b/archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/index.md
@@ -25,17 +25,17 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
@onatt0 [3] I got side tracked by building a language that could be assembled from on the GPU in SIMD. However now I ask myself if that is just adding "complexity", because if programs are bounded in size, why not just focus on CPU non-parallel nested factoring (aka the forth-like way)
Branches: [[archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-imo-code-compilation-is-inherently-sequential]]
-**2/**
+**2/** @NOTimothyLottes
@onatt0 [4] 2-item data stack is an interesting compromise. Something I never considered. I left off ripping out the data stack completely.
-**3/**
+**3/** @NOTimothyLottes
@onatt0 [5] Can do this instead,
a. Track a "top" register (number)
@@ -43,21 +43,21 @@ b. Use symbols to override top register
c. Have push (store) just advance top to next reg (in circular queue)
Gets to easy unnamed arguments
-**4/**
+**4/** @NOTimothyLottes
@onatt0 [6] You mentioned VK is most "form filling" which I think is an accurate description. For most "C" like APIs I like to just lay out all the arguments in memory like a tape drive in the order that functions get called and source that tape at runtime for the calls ...
-**5/**
+**5/** @NOTimothyLottes
@onatt0 [7] They key concept here is that "common" arguments like the device are pushed onto the tape using store duplication when they are known (after device creation). So it's preemptive scatter, so later at call time there is no argument gather.
-**6/**
+**6/** @NOTimothyLottes
@onatt0 [8] Likely the majority of C/C++/OOP/bloatware is just shuffling data around in argument gather to support the concept of data stacks on HW that has no physical data stack.
Branches: [[archive/threads/NOTimothyLottes/2025-04-30-3-i-got-side-tracked-by-building-a-language-that/2025-04-30-onatt0-holy-truthnuke-and-people-think-c-is-the-optimal]]
-**7/**
+**7/** @NOTimothyLottes
@onatt0 [9] Could just pre-layout call arguments in order of usage, leverage data compression at init-time to unpack into memory before run-time. No more code to shuffle arguments, or set registers to immediates, etc. Just a common (cached) pre-call to consume args from the "tape"
diff --git a/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/2025-04-30-NOTimothyLottes-related-thoughts-0-having-a-low-upper-bound-on.md b/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/2025-04-30-NOTimothyLottes-related-thoughts-0-having-a-low-upper-bound-on.md
index 66135f1..ff7a460 100644
--- a/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/2025-04-30-NOTimothyLottes-related-thoughts-0-having-a-low-upper-bound-on.md
+++ b/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/2025-04-30-NOTimothyLottes-related-thoughts-0-having-a-low-upper-bound-on.md
@@ -26,28 +26,28 @@ parent_post_id: "1917613300902146419"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@onatt0 Related thoughts/
[0] Having a low upper bound on the maximum complexity allowed in a program enables so much simplification. One can always move complexity into data, while keeping tight codebases.
-**2/**
+**2/** @NOTimothyLottes
@onatt0 [1] Seems like you group symbols into pages where each page can have a string (shared with all symbols in the page), which when pared with limited fixed maximum symbol string size, is an elegant way of effectively supporting larger naming [I'll probably steal that idea next time]
-**3/**
+**3/** @NOTimothyLottes
@onatt0 [2] I'm also a big fan of how you used 16:9 aspect to auto render all the debug info, symbol tables, disassembly, etc, alongside the source. I think many people are probably lost in the speed at which you can manipulate and test ideas while working on the source
-**4/**
+**4/** @NOTimothyLottes
@onatt0 [3] I got side tracked by building a language that could be assembled from on the GPU in SIMD. However now I ask myself if that is just adding "complexity", because if programs are bounded in size, why not just focus on CPU non-parallel nested factoring (aka the forth-like way)
-**5/**
+**5/** @NOTimothyLottes
@onatt0 [4] 2-item data stack is an interesting compromise. Something I never considered. I left off ripping out the data stack completely.
-**6/**
+**6/** @NOTimothyLottes
@onatt0 [5] Can do this instead,
a. Track a "top" register (number)
@@ -55,15 +55,15 @@ b. Use symbols to override top register
c. Have push (store) just advance top to next reg (in circular queue)
Gets to easy unnamed arguments
-**7/**
+**7/** @NOTimothyLottes
@onatt0 [6] You mentioned VK is most "form filling" which I think is an accurate description. For most "C" like APIs I like to just lay out all the arguments in memory like a tape drive in the order that functions get called and source that tape at runtime for the calls ...
-**8/**
+**8/** @NOTimothyLottes
@onatt0 [7] They key concept here is that "common" arguments like the device are pushed onto the tape using store duplication when they are known (after device creation). So it's preemptive scatter, so later at call time there is no argument gather.
-**9/**
+**9/** @NOTimothyLottes
@onatt0 [8] Likely the majority of C/C++/OOP/bloatware is just shuffling data around in argument gather to support the concept of data stacks on HW that has no physical data stack.
diff --git a/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/index.md b/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/index.md
index cb50327..e0dd334 100644
--- a/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/index.md
+++ b/archive/threads/NOTimothyLottes/2025-04-30-i-laugh-when-people-say-c-is-like-assembly-they/index.md
@@ -25,6 +25,6 @@ in_reply_to: "1917653631651729876"
## Thread
-**1/**
+**1/** @NOTimothyLottes
@onatt0 I laugh when people say C is like assembly, they are missing what we actually did in assembly back then, which was all registers and globals and gotos, no stacks. It's radically different than good assembly.
diff --git a/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/2025-07-23-Karyuutensei-where-does-the-restart-number-come-from-i-assume.md b/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/2025-07-23-Karyuutensei-where-does-the-restart-number-come-from-i-assume.md
index aac97bd..1dc4ebb 100644
--- a/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/2025-07-23-Karyuutensei-where-does-the-restart-number-come-from-i-assume.md
+++ b/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/2025-07-23-Karyuutensei-where-does-the-restart-number-come-from-i-assume.md
@@ -26,7 +26,7 @@ parent_post_id: "1948009807161721332"
## Branch
-**1/**
+**1/** @Karyuutensei
@NOTimothyLottes Where does the restart number come from? I assume this is how many times you exited the code and started again automatically using your batch script?
diff --git a/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/index.md b/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/index.md
index 75517ab..93963ad 100644
--- a/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/index.md
+++ b/archive/threads/NOTimothyLottes/2025-07-23-nobody-self-includes-with-defines-to-reorder-c/index.md
@@ -25,51 +25,51 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
"nobody self includes with defines to reorder C code" ... Haha, apparently I'm not the only one, the File Pilot guy does it too :)
-**2/**
+**2/** @Karyuutensei
@NOTimothyLottes Do you also automatically generate the include files or do you just write them yourself?
-**3/**
+**3/** @NOTimothyLottes
@Karyuutensei I only include __FILE__ (self). For WIN32 and VK even, I recreate the parts of external headers I need (use) inside the 'one source file', typically with structural type changes to switch back to simple types like 64 bit intergers instead of pointers. Trying to get to C--
-**4/**
+**4/** @NOTimothyLottes
@Karyuutensei One side effect, even with C code the compilation is perceptually instant for the whole program. The other thing I do is mix the GLSL and C all in the same file, so I share defines. I do have one external include for the compiled SPIR-V ...
-**5/**
+**5/** @NOTimothyLottes
@Karyuutensei For the SPIR-V, I also have one program, but I use specialization constants set at PSO generation to select the code path for a specific 'shader'. This requires spriv opt as a pre-processor else the IHV compilers tend to be 10x or more slower.
-**6/**
+**6/** @NOTimothyLottes
@Karyuutensei During dev time I use 2 terminals each with their own shell scripts. The first is to just loop and keep regenerating the SPIR-V if anything in the 'one file' changes. This is unfortunately a mess to do in a batch file (below)
-**7/**
+**7/** @NOTimothyLottes
@Karyuutensei The second does the same for the C program, loops recompiling and running the program. So when I'm editing source I can just fast exit the program and it restarts [with instant restart/reload it is quite fast to restart]
-**8/**
+**8/** @NOTimothyLottes
@Karyuutensei I'm using GCC on Windows, because why bother with having to install Visual Studio or it's compiler tool chain mess. I just do MINGW64 and be done with it. My debugger is the instant restart for C code, and shader reload for GLSL
-**9/**
+**9/** @NOTimothyLottes
@Karyuutensei I don't use standard C libs or anything like that. I just write my own stuff. For 'printf' style debugging I have macros that write to a memory mapped log file. They give {[restartNumber]|[msSinceLaunch]|[sourceLine]|[hex]|[dec]|[comment]}. Keeping multiple restarts in same log
-**10/**
+**10/** @NOTimothyLottes
@Karyuutensei That log example is a simple test program, it starts in 0.3 ms for that run. The log tells all about how it pipelines start up {doing memory page warming, kart load, window setup, VK setup in parallel, getting to PSO gen as fast as possible [get layout done first]}
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-07-31-AgileJebrim-spir-v-ive-given-up-on-trying-to-massage-frontend.md b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-07-31-AgileJebrim-spir-v-ive-given-up-on-trying-to-massage-frontend.md
index 3bb185f..7da6aa4 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-07-31-AgileJebrim-spir-v-ive-given-up-on-trying-to-massage-frontend.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-07-31-AgileJebrim-spir-v-ive-given-up-on-trying-to-massage-frontend.md
@@ -26,35 +26,35 @@ parent_post_id: "1950935464149483683"
## Branch
-**1/**
+**1/** @AgileJebrim
@NOTimothyLottes SPIR-V. I’ve given up on trying to massage frontend compilers to do exactly what I want. I’m just letting others write in whatever shader language they want and then taking the SPIR-V it generates and reoptimizing it the way I want it.
-**2/**
+**2/** @AgileJebrim
@NOTimothyLottes One of the motivating factors is the fact that people already have a bunch of existing code, so the less work needed on their part to rewrite it, the better.
-**3/**
+**3/** @NOTimothyLottes
@AgileJebrim If IHV compilers all handled well the case where the SPIR-V skips most SSA and leverages OpLoad/Store to global shader data (as in registers not memory), it might be a lot more tractable to go direct to SPIR-V.
-**4/**
+**4/** @AgileJebrim
@NOTimothyLottes I’m forcing the case where each invocation has access to a full 256 registers, which should hopefully limit the whole SSA/register spill problem. I haven’t tried intentionally breaking SSA though. Even if I did, there’s no way such UB would ever be certifiable.
-**5/**
+**5/** @NOTimothyLottes
@AgileJebrim I don't know of any case where 256 registers had acceptable performance. And that includes IHV hand assembly. Full unrolling on GCN needed at least 2 waves/SIMD (128 regs max). And I personally target around 64 for anything going through a compiler.
-**6/**
+**6/** @NOTimothyLottes
@AgileJebrim Note on some newer AMD GPUs they increased the regfile by 50% I think, which would be a 96 max reg target
-**7/**
+**7/** @NOTimothyLottes
@AgileJebrim Some of the larger problems with compilers is common sub-expression elimination. Meaning they will take out intentional recoputation or reloads and add register pressure. Often one has to fake a different value by ORing to a dynamic loaded zero (not known at compiler time)
-**8/**
+**8/** @NOTimothyLottes
@AgileJebrim Meaning at medium levels of complexity the compilers are always going way over the register budget you'd target with hand written ASM. SSA ensures this. There are no aliasing hints in the IR.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-01-olson_dan-whats-the-top-something-else-ive-been-out-of-the.md b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-01-olson_dan-whats-the-top-something-else-ive-been-out-of-the.md
index d8e12fb..be30fa8 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-01-olson_dan-whats-the-top-something-else-ive-been-out-of-the.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-01-olson_dan-whats-the-top-something-else-ive-been-out-of-the.md
@@ -26,23 +26,23 @@ parent_post_id: "1950935464149483683"
## Branch
-**1/**
+**1/** @olson_dan
@NOTimothyLottes What's the top "something else"? I've been out of the space for a while.
-**2/**
+**2/** @NOTimothyLottes
@olson_dan Wanting to build something that effectively loads/stores a 'cart' file which contains all the 'code+data' of the game in a restartable package. The code cannot be GLSL because I'm not going to link in a huge compiler. Leaves something that generates SPIR-V on the fly. New lang
-**3/**
+**3/** @EskilSteenberg
@NOTimothyLottes @olson_dan For a long time i have contemplated writing a small GLSL->SPIR-V compiler. I think you could get away with something very simple, if you are conservative with your language use.
-**4/**
+**4/** @NOTimothyLottes
@EskilSteenberg @olson_dan Have a crazy idea for GPU shader dev inspired by a C64 SID tracker where you have a 'pattern' for the 'instrument' which shows SID fx changing over time, along with the standard multi-channel pattern nestily using the instrument ...
-**5/**
+**5/** @NOTimothyLottes
@EskilSteenberg @olson_dan ... Effectively a macro assembly language style thing where defines can be played back interleaved for things like ILP or loop unrolling etc. But programmer controlling interleaving, and register offsets, etc. Then ultimately output to SPIR-V direct (no GLSL step).
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-02-NOTimothyLottes-so-far-the-plan-is-to-have-the-data-read-write.md b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-02-NOTimothyLottes-so-far-the-plan-is-to-have-the-data-read-write.md
index 75331bd..e906523 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-02-NOTimothyLottes-so-far-the-plan-is-to-have-the-data-read-write.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-02-NOTimothyLottes-so-far-the-plan-is-to-have-the-data-read-write.md
@@ -26,7 +26,7 @@ parent_post_id: "1951591243328135279"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@onatt0 @EskilSteenberg @olson_dan So far the plan is to have the data read/write from the GPU, but still use the CPU to do the SPIR-V generation from said data.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/index.md b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/index.md
index 23cae65..d36535a 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/index.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/index.md
@@ -25,25 +25,25 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Been on the fence on writing shader interfaces in GLSL vs something else that translates to SPIR-V. Most GLSL mixed with defines can just direct port to other platforms. However these days I have hundreds of lines of macros to transform GLSL closer to assembly.
Branches: [[archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-07-31-AgileJebrim-spir-v-ive-given-up-on-trying-to-massage-frontend]], [[archive/threads/NOTimothyLottes/2025-07-31-been-on-the-fence-on-writing-shader-interfaces-in/2025-08-01-olson_dan-whats-the-top-something-else-ive-been-out-of-the]]
-**2/**
+**2/** @NOTimothyLottes
Meaning I write using macros that are mostly a 1:1 mapping to AMDs GCN/RDNA ISA. With workarounds for missing stuff. SPIR-V output is an intimidating level of complex verbosity. More so when navigating frequent type bit aliasing (float, int, packed 16-bit float and int).
-**3/**
+**3/** @JBrooksBSI
@NOTimothyLottes Sounds like an RDNA->SPIRV asm converter tool would be the way to go
-**4/**
+**4/** @NOTimothyLottes
@JBrooksBSI I part tried to GLSL once. Using a global uint4 array as registers. But the wrapping of bit aliasing typecasts around operations is loaded with compiler perf bugs. Esp with packed 16-bit. So making it usable in practice is quite hard.
-**5/**
+**5/** @JBrooksBSI
@NOTimothyLottes What I do for console dev is write RDNA2 asm on PS5 (via wrapped shader intrinsics).
@@ -53,6 +53,6 @@ This is a technique I have been using since 2006, for PS3 SPU coding:
-**6/**
+**6/** @NOTimothyLottes
@JBrooksBSI Eventually I ended up the same way (writing via instruction defines). Originally when I did FXAA it was a 1:1 line mapping to NV ISA. But without factoring through a define. But it's really the custom register allocation that I wish was universally expressible today.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-0x44_-assembly-isnt-hard-its-just-platform-specific.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-0x44_-assembly-isnt-hard-its-just-platform-specific.md
index 34be43c..e9fbd26 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-0x44_-assembly-isnt-hard-its-just-platform-specific.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-0x44_-assembly-isnt-hard-its-just-platform-specific.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @0x44_
@NOTimothyLottes Assembly isn't hard, it's just platform specific, which makes it tedious.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-2Sexy4MyGPU-it-was-never-hard-just-tedious.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-2Sexy4MyGPU-it-was-never-hard-just-tedious.md
index b866079..0b21596 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-2Sexy4MyGPU-it-was-never-hard-just-tedious.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-2Sexy4MyGPU-it-was-never-hard-just-tedious.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @2Sexy4MyGPU
@NOTimothyLottes It was never hard, just tedious.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-CUDAHandbook-i-have-been-writing-assembly-for-almost-40-years.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-CUDAHandbook-i-have-been-writing-assembly-for-almost-40-years.md
index b343ebe..d272512 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-CUDAHandbook-i-have-been-writing-assembly-for-almost-40-years.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-CUDAHandbook-i-have-been-writing-assembly-for-almost-40-years.md
@@ -26,15 +26,15 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @CUDAHandbook
@NOTimothyLottes I have been writing assembly for almost 40 years. The reason we say it is hard, is because it takes more effort to write than higher-level languages like C. Of course it’s doable, but portability between CPU architecture alone makes assembly only worth doing when warranted.
-**2/**
+**2/** @NOTimothyLottes
@CUDAHandbook I'm hoping to show how to make it less tedious than C
-**3/**
+**3/** @Alleycatsphinx
@NOTimothyLottes @CUDAHandbook My major problem with programming is the tedium.
@@ -42,7 +42,7 @@ GLSL Sandbox is still the best IDE I've ever used...
Live code with instant update, simple automatic version control, cross platform web deployment, basic stripped down math language...
-**4/**
+**4/** @NOTimothyLottes
@Alleycatsphinx @CUDAHandbook I love live systems as "the IDE". This time probably with function keys as a pallet of 'save/restore' points (snapshot the entire project, as one file).
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Karyuutensei-unrelated-but-i-would-also-love-a-look-at-your.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Karyuutensei-unrelated-but-i-would-also-love-a-look-at-your.md
index 56a391e..5bf7526 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Karyuutensei-unrelated-but-i-would-also-love-a-look-at-your.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Karyuutensei-unrelated-but-i-would-also-love-a-look-at-your.md
@@ -26,11 +26,11 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @Karyuutensei
@NOTimothyLottes Unrelated, but I would also love a look at your CRTs and how you use them in everyday stuff.
-**2/**
+**2/** @NOTimothyLottes
@Karyuutensei Showing that setup would be fun. Most of my active CRTs are hooked up to vintage consoles though.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-NickDrisc0ll-im-sure-it-would-be-invaluable.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-NickDrisc0ll-im-sure-it-would-be-invaluable.md
index f78f015..a93d443 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-NickDrisc0ll-im-sure-it-would-be-invaluable.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-NickDrisc0ll-im-sure-it-would-be-invaluable.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @NickDrisc0ll
@NOTimothyLottes I'm sure it would be invaluable
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-PunteroCrudo-i-would-and-i-think-more-people-would-be.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-PunteroCrudo-i-would-and-i-think-more-people-would-be.md
index 73bf191..1eb23b5 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-PunteroCrudo-i-would-and-i-think-more-people-would-be.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-PunteroCrudo-i-would-and-i-think-more-people-would-be.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @PunteroCrudo
@NOTimothyLottes I would, and I think more people would be interested.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-SquaredApe-given-ive-only-done-asm-on-amiga-with-devpac-i.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-SquaredApe-given-ive-only-done-asm-on-amiga-with-devpac-i.md
index 39d1c18..52e22ac 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-SquaredApe-given-ive-only-done-asm-on-amiga-with-devpac-i.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-SquaredApe-given-ive-only-done-asm-on-amiga-with-devpac-i.md
@@ -26,11 +26,11 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @SquaredApe
@NOTimothyLottes Given I've only done ASM on Amiga with Devpac, I guess it's probably a limited take, but I enjoyed it and didn't find it harder than say something like C, mostly because the problems I solved back then were 2D domain and the hardware was pretty simple... but not too hard?
-**2/**
+**2/** @NOTimothyLottes
@SquaredApe ASM could be a pain when mixing with high level languages due to the constant manual register and stack shuffling, but with what I have in mind will factor that out.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Stererence-ive-been-doing-assembly-a-bit-in-d-with-the.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Stererence-ive-been-doing-assembly-a-bit-in-d-with-the.md
index 487e25d..3a2283e 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Stererence-ive-been-doing-assembly-a-bit-in-d-with-the.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Stererence-ive-been-doing-assembly-a-bit-in-d-with-the.md
@@ -26,11 +26,11 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @Stererence
@NOTimothyLottes I've been doing assembly a bit in D with the inline assembler and it's very fun to the point where it's too distracting for me, I don't really get why people are so averse to it generally.
-**2/**
+**2/** @NOTimothyLottes
@Stererence Inline assembly in GCC has been a cornerstone of my C code for a long time.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-VicThorDev6-a-lot-of-people-who-claim-assembly-is-hard-just.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-VicThorDev6-a-lot-of-people-who-claim-assembly-is-hard-just.md
index 1f30867..d2e375a 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-VicThorDev6-a-lot-of-people-who-claim-assembly-is-hard-just.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-VicThorDev6-a-lot-of-people-who-claim-assembly-is-hard-just.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @VicThorDev6
@NOTimothyLottes A lot of people who claim assembly is hard just never did any themselves. In my opinion reading or even programming things in assembly isn't very hard but actually doing some of the optimizations compilers might do seems a lot harder
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-_naf_90-im-learning-assembly-in-my-spare-time.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-_naf_90-im-learning-assembly-in-my-spare-time.md
index 8c408f8..65c9163 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-_naf_90-im-learning-assembly-in-my-spare-time.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-_naf_90-im-learning-assembly-in-my-spare-time.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @_naf_90
@NOTimothyLottes I’m learning assembly in my spare time
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-biovf-i-would-definitely-watch-that.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-biovf-i-would-definitely-watch-that.md
index 42c5609..9bcaf54 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-biovf-i-would-definitely-watch-that.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-biovf-i-would-definitely-watch-that.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @biovf
@NOTimothyLottes I would definitely watch that 🙂
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-cyberbemon-id-love-to-watch-that.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-cyberbemon-id-love-to-watch-that.md
index 9d7fa42..f9e9aa2 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-cyberbemon-id-love-to-watch-that.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-cyberbemon-id-love-to-watch-that.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @cyberbemon
@NOTimothyLottes I'd love to watch that.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-there-are-a-lot-of-watch-me-write-this-app-in.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-there-are-a-lot-of-watch-me-write-this-app-in.md
index 39d3b46..0131ae4 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-there-are-a-lot-of-watch-me-write-this-app-in.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-there-are-a-lot-of-watch-me-write-this-app-in.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @furan
@NOTimothyLottes There are a lot of "watch me write this app in assembly" yt videos
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-would-watch-though.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-would-watch-though.md
index 6784b12..86960b0 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-would-watch-though.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-would-watch-though.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @furan
@NOTimothyLottes would watch though
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-konigssohne-if-youre-got-a-blank-canvas-go-for-it-interfacing.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-konigssohne-if-youre-got-a-blank-canvas-go-for-it-interfacing.md
index e53f7f9..ebb8072 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-konigssohne-if-youre-got-a-blank-canvas-go-for-it-interfacing.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-konigssohne-if-youre-got-a-blank-canvas-go-for-it-interfacing.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @konigssohne
@NOTimothyLottes If you're got a blank `canvas` go for it.
Interfacing to a kernel interrupt is one thing, hooking up to a toolkit ui is another I haven't ever seen, in asm.
@@ -34,7 +34,7 @@ Interfacing to a kernel interrupt is one thing, hooking up to a toolkit ui is an
That leaves it all to command lines.
And meh.
-**2/**
+**2/** @NOTimothyLottes
@konigssohne Look at the older music trackers. All ASM and quite good UIs from a workflow efficiency perspective. They don't emulate a 'windowing system UI' for good reason, it wouldn't ever be as good as what they did do.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-leonard_coder-im-still-doing-assembly-as-hobby-68k-assembly-x64.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-leonard_coder-im-still-doing-assembly-as-hobby-68k-assembly-x64.md
index fd7033b..e9ec6af 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-leonard_coder-im-still-doing-assembly-as-hobby-68k-assembly-x64.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-leonard_coder-im-still-doing-assembly-as-hobby-68k-assembly-x64.md
@@ -26,25 +26,25 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @leonard_coder
@NOTimothyLottes I'm still doing assembly as hobby :) ( 68k assembly, x64 assembly is not as fun to write).
I'm interested to see such a tutorial, but please change a bit your font size and coding style :)
-**2/**
+**2/** @NOTimothyLottes
@leonard_coder I think people get confused with my screen gabs because they are on 4k panels and I run low res CRTs (so the bitmap fonts are not small for me). Also I think most of my strange C syntax is to make it more assembly like, so won't all be there in ASM
-**3/**
+**3/** @leonard_coder
@NOTimothyLottes oh you're on low res CRT? that explain a lot, I was always really surprised by your 3x5 pixels look-alike font :)
But yeah Vulkan triangle setup code in assembly is something, I'm in!
-**4/**
+**4/** @NOTimothyLottes
@leonard_coder Oh, yeah, I should disclose, no triangles will be harmed or even used in this project, it's PS-free, or CS-only. All gfx generated the vintage PC way, just on compute GPUs, in human crafted logic instead of fixed function HW.
-**5/**
+**5/** @leonard_coder
@NOTimothyLottes it's even better! (at least to me)
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-m6502-i-would-enjoy-watching-that.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-m6502-i-would-enjoy-watching-that.md
index 572a0f9..70ce0a9 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-m6502-i-would-enjoy-watching-that.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-m6502-i-would-enjoy-watching-that.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @m6502
@NOTimothyLottes I would enjoy watching that.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mmalex-i-agree-if-one-is-ok-with-bottom-up-thinking-99.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mmalex-i-agree-if-one-is-ok-with-bottom-up-thinking-99.md
index d52510c..fb18931 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mmalex-i-agree-if-one-is-ok-with-bottom-up-thinking-99.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mmalex-i-agree-if-one-is-ok-with-bottom-up-thinking-99.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @mmalex
@NOTimothyLottes i agree, if one is ok with 'bottom up' thinking. 99% of my self taught early programming was asm, from demos to music editors (trackers) & it was a joy to work so directly with the machine. im convinced it still underlies my preference/prejudice for straightforward style of code
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mu_chrinovic-definitely-interested-in-anything-you-put-out.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mu_chrinovic-definitely-interested-in-anything-you-put-out.md
index 9af9aad..e667b89 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mu_chrinovic-definitely-interested-in-anything-you-put-out.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mu_chrinovic-definitely-interested-in-anything-you-put-out.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @mu_chrinovic
@NOTimothyLottes definitely interested in anything you put out
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-nullspector-i-would-so-love-that.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-nullspector-i-would-so-love-that.md
index 8aba520..3484400 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-nullspector-i-would-so-love-that.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-nullspector-i-would-so-love-that.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @nullspector
@NOTimothyLottes I would so love that!
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-o__boga-im-staying-maybe-for-vulkan-depending-on-how.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-o__boga-im-staying-maybe-for-vulkan-depending-on-how.md
index afbbab9..895eed8 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-o__boga-im-staying-maybe-for-vulkan-depending-on-how.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-o__boga-im-staying-maybe-for-vulkan-depending-on-how.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @o__boga
@NOTimothyLottes I'm staying maybe for Vulkan, depending on how manageable it gets to me. (Assembly or not)
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-opdroid1234-i-would.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-opdroid1234-i-would.md
index 9366b65..6ccc870 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-opdroid1234-i-would.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-opdroid1234-i-would.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @opdroid1234
@NOTimothyLottes i would!
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-philthistweet-i-just-wish-the-win32-api-was-better-designed-it.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-philthistweet-i-just-wish-the-win32-api-was-better-designed-it.md
index cd35f5f..2dbcafd 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-philthistweet-i-just-wish-the-win32-api-was-better-designed-it.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-philthistweet-i-just-wish-the-win32-api-was-better-designed-it.md
@@ -26,15 +26,15 @@ parent_post_id: "1950866703342088407"
## Branch
-**1/**
+**1/** @philthistweet
@NOTimothyLottes I just wish the win32 API was better designed. It would essentially be perfect for cross dev then.
-**2/**
+**2/** @NOTimothyLottes
@philthistweet Certainly it could be, but as is, it's easy to use and not strictly limiting. Id be curious what people don't like about it. Maybe the winproc interface?
-**3/**
+**3/** @philthistweet
Just a few examples:
1) thread/process creation and management
@@ -47,7 +47,7 @@ Whoever sat down to create it probably said: "How can I create the most annoying
Honestly, I may start a wrapper project though, because it's the only stable API that works
-**4/**
+**4/** @NOTimothyLottes
@philthistweet Clone is nicer and having ability to own cores should be great. But at least you get affinity and schedule priority. Yeah agree the file interface is poor, but I just memmap and manually page warm to bypass most of that.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-plasmabitcoin-very-interested.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-plasmabitcoin-very-interested.md
index 2031d37..38a17cd 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-plasmabitcoin-very-interested.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-plasmabitcoin-very-interested.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @plasmabitcoin
@NOTimothyLottes Very interested!
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-pranksterware-thatd-rock.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-pranksterware-thatd-rock.md
index e2e457d..8379085 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-pranksterware-thatd-rock.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-pranksterware-thatd-rock.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @pranksterware
@NOTimothyLottes That'd rock!
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-roasted6read-i-am-interested.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-roasted6read-i-am-interested.md
index 10964fa..791ec39 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-roasted6read-i-am-interested.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-roasted6read-i-am-interested.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @roasted6read
@NOTimothyLottes I am interested
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ruben_cabaco-would-be-very-interested-in-it-also-on-your-forth.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ruben_cabaco-would-be-very-interested-in-it-also-on-your-forth.md
index bd0be4a..bb38417 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ruben_cabaco-would-be-very-interested-in-it-also-on-your-forth.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ruben_cabaco-would-be-very-interested-in-it-also-on-your-forth.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @ruben_cabaco
@NOTimothyLottes Would be very interested in it! Also on your Forth inspired languages and the whole mental approach to simplify problem solving with efficiency in mind. Hard to find materials on this, and from what I gather your old projects/thoughts are no longer online.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-simplex_fx-is-it-already-aprils-fools-again.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-simplex_fx-is-it-already-aprils-fools-again.md
index f705649..57a6796 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-simplex_fx-is-it-already-aprils-fools-again.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-simplex_fx-is-it-already-aprils-fools-again.md
@@ -26,23 +26,23 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @simplex_fx
@NOTimothyLottes Is it already april’s fools again?
-**2/**
+**2/** @NOTimothyLottes
@simplex_fx Would it be interesting any other way
-**3/**
+**3/** @simplex_fx
@NOTimothyLottes Worst part of this is not even the asm, but the choice of Vulkan 🤣
-**4/**
+**4/** @NOTimothyLottes
@simplex_fx Vulkan for compute is a lot better than say DX12. Because VK has a working pipelinable API construct: VkEvents, where in contrast DX12's pipeline barriers are serializing in the drivers. Also GL has no pipelining. So VK wins by virtue of no other option.
-**5/**
+**5/** @simplex_fx
@NOTimothyLottes Highly depends on one’s goals.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ssh4net-please.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ssh4net-please.md
index 070e664..18e4c17 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ssh4net-please.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ssh4net-please.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @ssh4net
@NOTimothyLottes Please!
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-thecolemanthe-assembly-isnt-hard-its-tedious-no-abstractions.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-thecolemanthe-assembly-isnt-hard-its-tedious-no-abstractions.md
index e2e015d..232d62e 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-thecolemanthe-assembly-isnt-hard-its-tedious-no-abstractions.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-thecolemanthe-assembly-isnt-hard-its-tedious-no-abstractions.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @thecolemanthe
@NOTimothyLottes Assembly isn't hard, it's tedious. No abstractions, only the raw building blocks of computing. A lot of people just aren't ready or willing to deal with what the reality of an if or string concatenation much less the horrors of what their overly abstract oop code actually is.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-totalwert-thread.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-totalwert-thread.md
index 88d703e..1478783 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-totalwert-thread.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-totalwert-thread.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @totalwert
@NOTimothyLottes
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-im-gonna-start-pretending-i-understood-everything.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-im-gonna-start-pretending-i-understood-everything.md
index 28b59c3..fd8428b 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-im-gonna-start-pretending-i-understood-everything.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-im-gonna-start-pretending-i-understood-everything.md
@@ -26,7 +26,7 @@ parent_post_id: "1950868863836410096"
## Branch
-**1/**
+**1/** @AnshumanKhanna5
@NOTimothyLottes I'm gonna start pretending I understood everything you said
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-video-link-now.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-video-link-now.md
index 74f10fd..f60582a 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-video-link-now.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-video-link-now.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @AnshumanKhanna5
@NOTimothyLottes VIDEO LINK NOW
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-John31625320803-it-doesnt-really-matter-what-language-you-call.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-John31625320803-it-doesnt-really-matter-what-language-you-call.md
index 94d0b2c..7968859 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-John31625320803-it-doesnt-really-matter-what-language-you-call.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-John31625320803-it-doesnt-really-matter-what-language-you-call.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @John31625320803
@NOTimothyLottes It doesn't really matter what language you call Vulkan from, the pain is all in the API...
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-_vkaku-i-know-someone-whod-be-excited-opdroid1234.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-_vkaku-i-know-someone-whod-be-excited-opdroid1234.md
index 5995e33..448ce22 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-_vkaku-i-know-someone-whod-be-excited-opdroid1234.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-_vkaku-i-know-someone-whod-be-excited-opdroid1234.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @_vkaku
@NOTimothyLottes I know someone who'd be excited @opdroid1234
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-schulzb589-i-would-watch-that-so-count-me-in.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-schulzb589-i-would-watch-that-so-count-me-in.md
index 6d1785b..e6c0bd1 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-schulzb589-i-would-watch-that-so-count-me-in.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-schulzb589-i-would-watch-that-so-count-me-in.md
@@ -26,7 +26,7 @@ parent_post_id: "1950860870818439202"
## Branch
-**1/**
+**1/** @schulzb589
@NOTimothyLottes I would watch that. So, count me in.
diff --git a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/index.md b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/index.md
index 7b29066..d51238b 100644
--- a/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/index.md
+++ b/archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/index.md
@@ -25,31 +25,31 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
People claim assembly is hard. A good counter to that would be showing how to build a x86-64 WIN32 Vulkan based engine from scratch in ASM. Not sure how many people would find that worth watching though.
Branches: [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-biovf-i-would-definitely-watch-that]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mu_chrinovic-definitely-interested-in-anything-you-put-out]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-nullspector-i-would-so-love-that]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ssh4net-please]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-pranksterware-thatd-rock]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-mmalex-i-agree-if-one-is-ok-with-bottom-up-thinking-99]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-leonard_coder-im-still-doing-assembly-as-hobby-68k-assembly-x64]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-ruben_cabaco-would-be-very-interested-in-it-also-on-your-forth]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-NickDrisc0ll-im-sure-it-would-be-invaluable]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-totalwert-thread]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-opdroid1234-i-would]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Karyuutensei-unrelated-but-i-would-also-love-a-look-at-your]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-m6502-i-would-enjoy-watching-that]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-roasted6read-i-am-interested]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-SquaredApe-given-ive-only-done-asm-on-amiga-with-devpac-i]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-VicThorDev6-a-lot-of-people-who-claim-assembly-is-hard-just]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-PunteroCrudo-i-would-and-i-think-more-people-would-be]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-2Sexy4MyGPU-it-was-never-hard-just-tedious]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-o__boga-im-staying-maybe-for-vulkan-depending-on-how]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-cyberbemon-id-love-to-watch-that]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-_naf_90-im-learning-assembly-in-my-spare-time]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-there-are-a-lot-of-watch-me-write-this-app-in]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-furan-would-watch-though]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-thecolemanthe-assembly-isnt-hard-its-tedious-no-abstractions]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-konigssohne-if-youre-got-a-blank-canvas-go-for-it-interfacing]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-plasmabitcoin-very-interested]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-Stererence-ive-been-doing-assembly-a-bit-in-d-with-the]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-simplex_fx-is-it-already-aprils-fools-again]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-CUDAHandbook-i-have-been-writing-assembly-for-almost-40-years]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-0x44_-assembly-isnt-hard-its-just-platform-specific]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-schulzb589-i-would-watch-that-so-count-me-in]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-AnshumanKhanna5-video-link-now]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-_vkaku-i-know-someone-whod-be-excited-opdroid1234]], [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-08-01-John31625320803-it-doesnt-really-matter-what-language-you-call]]
-**2/**
+**2/** @NOTimothyLottes
If game logic is GPU side there is little point in NOT doing assembly, since the CPU side stuff would always be platform specific.
-**3/**
+**3/** @NOTimothyLottes
ASM provides a good opportunity to show how to convert typical function argument gather into store multicast with linear prefetch for arguments to API calls. Effectively re-arch for cold cache efficiency. And other radically cool stuff that nobody does.
-**4/**
+**4/** @NOTimothyLottes
Linux has been all down hill over the years. OSS was fantastic, easy portable Linux system call interface. Also it's easy to do direct X11 with just syscalls. Now with Wayland you are stuck with linking to a garbage library. So might as well do WIN32 for Linux and depend on Wine.
Branches: [[archive/threads/NOTimothyLottes/2025-07-31-people-claim-assembly-is-hard/2025-07-31-philthistweet-i-just-wish-the-win32-api-was-better-designed-it]]
-**5/**
+**5/** @NOTimothyLottes
So Valve standardizing on Proton saves a lot of trouble with porting across ABIs/etc, just do WIN32 as it's way easier to interface with than Wayland and whatever horrible userland audio interface Linux monkeys switch to this era.
-**6/**
+**6/** @NOTimothyLottes
Few probably remember the old Unix before pthreads and ELF. It was better then. Much easier to use fork and shm to do platform audio than today. And that holds for all the vintage workstations (which I did implement back in the day)
diff --git a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-VPCOMPRESSB-elaborate-on-the-cart-style-memory-model-i-assume.md b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-VPCOMPRESSB-elaborate-on-the-cart-style-memory-model-i-assume.md
index 7ad8db1..5c9593b 100644
--- a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-VPCOMPRESSB-elaborate-on-the-cart-style-memory-model-i-assume.md
+++ b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-VPCOMPRESSB-elaborate-on-the-cart-style-memory-model-i-assume.md
@@ -26,7 +26,7 @@ parent_post_id: "1951346857017250014"
## Branch
-**1/**
+**1/** @VPCOMPRESSB
elaborate on the "CART"-style memory model?
@@ -34,29 +34,29 @@ i assume you initialize with the default start-up state that's maybe loaded from
saving the game would then just be copying a region to disk contiguously—zero fragmentation. which means you can stream-in data linearly, provided that the layout of the CART maps to the ordering of the transformation stages. you can also compress the data in the CART quiet well i imagine. you can implement this as a double buffering system? the CART used strictly for rendering, and the pool strictly for transformations?
-**2/**
+**2/** @NOTimothyLottes
@VPCOMPRESSB There is a Vulkan extension on PC that enables one to take a mapped file (aka the page cache) and access it from the GPU directly.
-**3/**
+**3/** @AgileJebrim
@NOTimothyLottes @VPCOMPRESSB @VPCOMPRESSB I believe the benefit here is that it avoids an extra copy.
https://registry.khronos.org/vulkan/specs/latest/man/html/VK_EXT_external_memory_host.html
-**4/**
+**4/** @VPCOMPRESSB
@AgileJebrim @NOTimothyLottes that API seems very opaque. how can a person tell/preset the size and behavior of the page cache? would i just need to manage it similar to managing the CPU's cache?
-**5/**
+**5/** @AgileJebrim
@VPCOMPRESSB @NOTimothyLottes There’s a win32 version too but yeah I would just generally assume that pages are 4096 bytes unless I have reason to believe otherwise. Apparently the intent that Timothy had is to use CreateFileMappingA() as well.
-**6/**
+**6/** @NOTimothyLottes
@AgileJebrim @VPCOMPRESSB In an ideal world the OS would allow pinning the file's pages. Since there is no guarantee, I can walk (read) the first cache line of the 4 kb pages periodically to try to force pinned behavior.
-**7/**
+**7/** @AgileJebrim
@NOTimothyLottes @VPCOMPRESSB VirtualLock()?
diff --git a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-joeyazf-sounds-super-interesting.md b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-joeyazf-sounds-super-interesting.md
index 4add07f..b6c979d 100644
--- a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-joeyazf-sounds-super-interesting.md
+++ b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-joeyazf-sounds-super-interesting.md
@@ -26,7 +26,7 @@ parent_post_id: "1951347512088088657"
## Branch
-**1/**
+**1/** @joeyazf
@NOTimothyLottes Sounds super interesting!
diff --git a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-snk_xed-looking-forward-to-it-what-do-i-bookmark.md b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-snk_xed-looking-forward-to-it-what-do-i-bookmark.md
index 8e4b4a3..e3ec2d1 100644
--- a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-snk_xed-looking-forward-to-it-what-do-i-bookmark.md
+++ b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-snk_xed-looking-forward-to-it-what-do-i-bookmark.md
@@ -26,7 +26,7 @@ parent_post_id: "1951347512088088657"
## Branch
-**1/**
+**1/** @snk_xed
@NOTimothyLottes Looking forward to it, what do I bookmark?
diff --git a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-02-whereisratman-really-hope-you-do-this-find-your-posts-so.md b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-02-whereisratman-really-hope-you-do-this-find-your-posts-so.md
index 2517f10..28375e5 100644
--- a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-02-whereisratman-really-hope-you-do-this-find-your-posts-so.md
+++ b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-02-whereisratman-really-hope-you-do-this-find-your-posts-so.md
@@ -26,7 +26,7 @@ parent_post_id: "1951345967795675161"
## Branch
-**1/**
+**1/** @whereisratman
@NOTimothyLottes Really hope you do this! Find your posts so interesting but usually fly over my head.
diff --git a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/index.md b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/index.md
index 001ed2a..bde1c82 100644
--- a/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/index.md
+++ b/archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/index.md
@@ -25,19 +25,19 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
At least for my next at home project, I think the right answer is a building it from assembly scratch series on video with a public domain release of the 'engine' which will be a live edit toy for hardcore GPU-side PC game dev in certain constraints [which keep it simple]
Branches: [[archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-02-whereisratman-really-hope-you-do-this-find-your-posts-so]]
-**2/**
+**2/** @NOTimothyLottes
It won't require RT, but it also won't run on Intel iGPUs [to low binding limits, etc]. Memory model will be 'CART' style where you get the a RAM CART [buffer] in memory which gets state snapshot, followed by dynamic GPU memory which is not snapshotted
Branches: [[archive/threads/NOTimothyLottes/2025-08-01-at-least-for-my-next-at-home-project-i-think-the/2025-08-01-VPCOMPRESSB-elaborate-on-the-cart-style-memory-model-i-assume]]
-**3/**
+**3/** @NOTimothyLottes
Also run-from GPU-side editing tools for shader source and bind everything tables. And build-the-editors-in-it style. Which load/store to the CART. So it won't be for people who want TBs of giant team gen content, but rather sized for what a single person could pull off
diff --git a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-10-AgileJebrim-thats-what-i-do-one-pinned-thread-per-core-sched.md b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-10-AgileJebrim-thats-what-i-do-one-pinned-thread-per-core-sched.md
index 2532568..445b1f8 100644
--- a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-10-AgileJebrim-thats-what-i-do-one-pinned-thread-per-core-sched.md
+++ b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-10-AgileJebrim-thats-what-i-do-one-pinned-thread-per-core-sched.md
@@ -26,7 +26,7 @@ parent_post_id: "1976637149387587994"
## Branch
-**1/**
+**1/** @AgileJebrim
@NOTimothyLottes That’s what I do. One pinned thread per core. SCHED_FIFO, highest priority, and reconfigure various settings within the OS to avoid preemptions/interrupts/hyperthreading.
diff --git a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-lectem-pinning-works-well-only-if-your-program-is-the.md b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-lectem-pinning-works-well-only-if-your-program-is-the.md
index 89c194e..3984f5e 100644
--- a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-lectem-pinning-works-well-only-if-your-program-is-the.md
+++ b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-lectem-pinning-works-well-only-if-your-program-is-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1976637149387587994"
## Branch
-**1/**
+**1/** @lectem
@NOTimothyLottes Pinning works well only if your program is the only one working. Any modern computer most likely have things running in the background. If any thread gets preempted in the middle of an execution block (that happens even with job stealing) you're screwed.
diff --git a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-techno_bog-do-you-have-a-source-from-which-one-could-learn.md b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-techno_bog-do-you-have-a-source-from-which-one-could-learn.md
index d4671bc..e1a1f10 100644
--- a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-techno_bog-do-you-have-a-source-from-which-one-could-learn.md
+++ b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/2025-10-11-techno_bog-do-you-have-a-source-from-which-one-could-learn.md
@@ -26,31 +26,31 @@ parent_post_id: "1976637149387587994"
## Branch
-**1/**
+**1/** @techno_bog
@NOTimothyLottes Do you have a source from which one could learn how to achieve the equivalent flexibility by following this approach? Sometimes on gaming devices you only have a handful of threads to deal with unlike on PCs.
-**2/**
+**2/** @NOTimothyLottes
@techno_bog Oh my conclusion was to abandon using the CPU for anything other than program init-time work and some IO processing, move everything else to the GPU where one has access to a good parallel programming model. Also enable CPU to power down so GPU gets {power,thermal,bandwidth}
-**3/**
+**3/** @techno_bog
@NOTimothyLottes That’s not what you say in the post? Regardless, re the GPU, I struggle to understand how I’d do that within reasonable time. Ryan’s approach seems to be ergonomic enough to apply generically.
-**4/**
+**4/** @NOTimothyLottes
@techno_bog Oh Ryan's approach isn't bad per say, it's way better than what most people do, it just wasn't something that yielded guaranteed quality of service that I was looking for. Nothing on the CPU running Windows can do that..
-**5/**
+**5/** @techno_bog
@NOTimothyLottes Then it must be going completely over my head. What are you criticizing exactly? Programming using the CPU in general? Why pick Ryan's post specifically then?
-**6/**
+**6/** @NOTimothyLottes
@techno_bog Criticizing the Windows lack of allowing pined exclusive core use for the foreground application. If I play a PC game, as the user, I don't want background garbage to preempt what I'm playing. Ryan's post because it is a smart way to approach the best one can do on Windows today
-**7/**
+**7/** @techno_bog
@NOTimothyLottes OK, I definitely had a reading comprehension issue here. Very new to this, thanks for clarifying.
diff --git a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/index.md b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/index.md
index 31be7b4..0c78a66 100644
--- a/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/index.md
+++ b/archive/threads/NOTimothyLottes/2025-10-10-thread-about-this-from-rfleury-https-www-rfleury/index.md
@@ -25,35 +25,35 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Thread about this from @rfleury - https://www.rfleury.com/p/multi-core-by-default - because I used to do that too on the CPU ...
-**2/**
+**2/** @NOTimothyLottes
Same basic idea, all CPU threads ran the same program, each thread entry point gets an index of which thread they are. Same style as GPU programming but on the CPU! Also did runtime C code editing by exiting all threads and re-entering via new DLL ...
-**3/**
+**3/** @NOTimothyLottes
There are some obvious problems though: CPU "random" preemptions -> if any thread grabs work through an atomic or even by just dividing up work according to thread index, if that thread gets preempted, the future sync will stall introducing bubbles ...
-**4/**
+**4/** @NOTimothyLottes
Some CPU schedulers will preempt long running CPU threads at times of which one has no control. About the only way to try to improve this situation is to have a pair of threads instead of one, where they round robin execution using system context switches ...
-**5/**
+**5/** @NOTimothyLottes
Meaning giving the OS places that it becomes better to context switch a thread (at the point the thread has no ownership of a work item). This of course introduces overhead and complexity and breaks the manual threadIndex approach to work carving
-**6/**
+**6/** @NOTimothyLottes
Meaning patching the problem by speculative context switches doesn't guarantee the OS won't preempt during a bad time, it just decreases the probability
-**7/**
+**7/** @NOTimothyLottes
There are other options though: allow work duplication, meaning make the work such that if 2 or more threads all compute the data, they get the same answer ... then if a thread gets to a dependency, it can start to finish work that gets stalled due to preemption
-**8/**
+**8/** @NOTimothyLottes
This unfortunately also adds complexity and overhead, but at least one can continue to make forward progress. The RIGHT solution is pinned explicit CPU cores, an in modern times with huge thread count CPUs, there is no real excuse not to do this other than stupidity
diff --git a/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-13-questorInter-no-floats-ever-logged-or-some-agreement-that-its.md b/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-13-questorInter-no-floats-ever-logged-or-some-agreement-that-its.md
index cb1d8ef..d70acf3 100644
--- a/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-13-questorInter-no-floats-ever-logged-or-some-agreement-that-its.md
+++ b/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-13-questorInter-no-floats-ever-logged-or-some-agreement-that-its.md
@@ -26,11 +26,11 @@ parent_post_id: "1977570893309321268"
## Branch
-**1/**
+**1/** @questorInter
@NOTimothyLottes no floats ever logged? or some "agreement" that it's always multiplied by 100000 or something like that? besides, interesting (low-level) ideas I really like :)
-**2/**
+**2/** @NOTimothyLottes
@questorInter If I need to see a float, I scale it, then convert to an interger and print that. If it is the exact value, I just bit alias as 32-bit int and print that. Problem solved :) Similar if I need to see a 64-bit pointer, I write the hi and lo as two lines, etc.
diff --git a/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-17-Karyuutensei-i-watched-the-video-and-one-thing-that-was-not.md b/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-17-Karyuutensei-i-watched-the-video-and-one-thing-that-was-not.md
index 5707b78..f663dd8 100644
--- a/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-17-Karyuutensei-i-watched-the-video-and-one-thing-that-was-not.md
+++ b/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-17-Karyuutensei-i-watched-the-video-and-one-thing-that-was-not.md
@@ -26,11 +26,11 @@ parent_post_id: "1977570893309321268"
## Branch
-**1/**
+**1/** @Karyuutensei
@NOTimothyLottes I watched the video and one thing that was not clear to me is why is half of the file wasted. Aren’t you using all upper 16 bits of the counter for the lines? Also, what do you mean with “no retries”?
-**2/**
+**2/** @NOTimothyLottes
@Karyuutensei Could have just used pow2 pages + 1 page for counter, but I got lazy. Yes could use more than 16-bits for line counter too. Reload counter could be 4-bits. Lock-free typically implies a retry-loop (non-wait-free). This however is wait-free (no retry-loop).
diff --git a/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/index.md b/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/index.md
index 446b6c7..ffd4e22 100644
--- a/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/index.md
+++ b/archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/index.md
@@ -25,16 +25,16 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Short talk on how I do CPU-side debugging without a debugger using a simple memory mapped file message logging system with lock-free atomic and file-io-free message store: https://www.youtube.com/watch?v=EaUSAVcXwEc ... contains the implementation as well
Branches: [[archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-13-questorInter-no-floats-ever-logged-or-some-agreement-that-its]], [[archive/threads/NOTimothyLottes/2025-10-13-short-talk-on-how-i-do-cpu-side-debugging-without/2025-10-17-Karyuutensei-i-watched-the-video-and-one-thing-that-was-not]]
-**2/**
+**2/** @AgileJebrim
@NOTimothyLottes No retries - you should call it wait-free too.
-**3/**
+**3/** @NOTimothyLottes
@AgileJebrim Good point, I'm going to adopt that 'wait-free' term moving forward :)
diff --git a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-AgileJebrim-reversed-is-a-significant-improvement-but-it.md b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-AgileJebrim-reversed-is-a-significant-improvement-but-it.md
index b0d80ca..b05e6e5 100644
--- a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-AgileJebrim-reversed-is-a-significant-improvement-but-it.md
+++ b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-AgileJebrim-reversed-is-a-significant-improvement-but-it.md
@@ -26,15 +26,15 @@ parent_post_id: "1990260050485797063"
## Branch
-**1/**
+**1/** @AgileJebrim
Reversed is a significant improvement but it still has its limitations when doing planetary-scale rendering that needs good precision up both close and far away. Your options there are either a logarithmic depth buffer to linearize things (albeit losing early z), your own integer-based depth test system in compute shaders, or a stack of multiple frustums layered on top of one another.
-**2/**
+**2/** @NOTimothyLottes
@AgileJebrim Yes for my non-tri stuff I'm log depth already. This is just for games, not simulation.
-**3/**
+**3/** @AgileJebrim
Simulation can usually localize enough that reverse Z is good enough. Google Earth style geospatial visualization is where things get trickier.
diff --git a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-bgolus-many-are-still-on-opengles-and-webgl-which-dont.md b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-bgolus-many-are-still-on-opengles-and-webgl-which-dont.md
index fab06a3..a64acad 100644
--- a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-bgolus-many-are-still-on-opengles-and-webgl-which-dont.md
+++ b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-bgolus-many-are-still-on-opengles-and-webgl-which-dont.md
@@ -26,7 +26,7 @@ parent_post_id: "1990260050485797063"
## Branch
-**1/**
+**1/** @bgolus
@NOTimothyLottes Many are still on OpenGLES and WebGL, which don’t properly support inverse depth due to still using a -1 to 1 clip space. Not really a problem for inverse depth in its own, but does cause problems for infinite far depth.
diff --git a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-terekhov_de-ive-never-had-real-depth-precision-issues-in-our.md b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-terekhov_de-ive-never-had-real-depth-precision-issues-in-our.md
index bf8f32d..160fc0e 100644
--- a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-terekhov_de-ive-never-had-real-depth-precision-issues-in-our.md
+++ b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-terekhov_de-ive-never-had-real-depth-precision-issues-in-our.md
@@ -26,7 +26,7 @@ parent_post_id: "1990260050485797063"
## Branch
-**1/**
+**1/** @terekhov_de
@NOTimothyLottes I've never had real depth precision issues in our game ports but I guess I'd better just adopt and get used to reversed infinite projection cause it's objectively better. Promise to try it for our next project :)
diff --git a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-18-Alecazam123-infinite-far-doesnt-apply-to-ortho-and-many-of.md b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-18-Alecazam123-infinite-far-doesnt-apply-to-ortho-and-many-of.md
index 6cd8b52..2438717 100644
--- a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-18-Alecazam123-infinite-far-doesnt-apply-to-ortho-and-many-of.md
+++ b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-18-Alecazam123-infinite-far-doesnt-apply-to-ortho-and-many-of.md
@@ -26,7 +26,7 @@ parent_post_id: "1990260050485797063"
## Branch
-**1/**
+**1/** @Alecazam123
@NOTimothyLottes Infinite far doesn’t apply to ortho, and many of editors/engines need to switch camera viewports. But it’s great for persp. Also too much code handing modeInv for normals, which is wrong and unneeded.
diff --git a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-19-stainless_code-i-havent-really-done-graphics-in-a-while-but-ive.md b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-19-stainless_code-i-havent-really-done-graphics-in-a-while-but-ive.md
index 49cc0d4..58e3a81 100644
--- a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-19-stainless_code-i-havent-really-done-graphics-in-a-while-but-ive.md
+++ b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-19-stainless_code-i-havent-really-done-graphics-in-a-while-but-ive.md
@@ -26,12 +26,12 @@ parent_post_id: "1990260050485797063"
## Branch
-**1/**
+**1/** @stainless_code
@NOTimothyLottes I haven't really done graphics in a while, but I've never heard about infinite far nor reversed z, where can I read up on it more?
Some cursory googling didn't return anything useful on this topic.
-**2/**
+**2/** @NOTimothyLottes
@stainless_code I put some docs (based on an old blog post) on projection matrix stuff inside STP source: https://github.com/Unity-Technologies/Graphics/blob/master/Packages/com.unity.render-pipelines.core/Runtime/STP/Stp.hlsl - Documents the maths to take depth and 2 projections and get a static reprojection vector for example.
diff --git a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/index.md b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/index.md
index 92eba1e..809242f 100644
--- a/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/index.md
+++ b/archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
I wish everyone would just adopt "reversed with infinite far" projection matrixes so I could only optimize for the fastest and highest precision option, but I'm guessing people haven't all migrated over :(
@@ -33,15 +33,15 @@ I wish everyone would just adopt "reversed with infinite far" projection matrixe
Branches: [[archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-terekhov_de-ive-never-had-real-depth-precision-issues-in-our]], [[archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-17-bgolus-many-are-still-on-opengles-and-webgl-which-dont]], [[archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-18-Alecazam123-infinite-far-doesnt-apply-to-ortho-and-many-of]], [[archive/threads/NOTimothyLottes/2025-11-17-i-wish-everyone-would-just-adopt-reversed-with/2025-11-19-stainless_code-i-havent-really-done-graphics-in-a-while-but-ive]]
-**2/**
+**2/** @AgileJebrim
Reversed is a significant improvement but it still has its limitations when doing planetary-scale rendering that needs good precision up both close and far away. Your options there are either a logarithmic depth buffer to linearize things (albeit losing early z), your own integer-based depth test system in compute shaders, or a stack of multiple frustums layered on top of one another.
-**3/**
+**3/** @NOTimothyLottes
@AgileJebrim Yes for my non-tri stuff I'm log depth already. This is just for games, not simulation.
-**4/**
+**4/** @AgileJebrim
Simulation can usually localize enough that reverse Z is good enough. Google Earth style geospatial visualization is where things get trickier.
diff --git a/archive/threads/NOTimothyLottes/2026-01-14-can-do-that/index.md b/archive/threads/NOTimothyLottes/2026-01-14-can-do-that/index.md
index 6934bad..70718e2 100644
--- a/archive/threads/NOTimothyLottes/2026-01-14-can-do-that/index.md
+++ b/archive/threads/NOTimothyLottes/2026-01-14-can-do-that/index.md
@@ -29,6 +29,6 @@ in_reply_to: "2011353617102741593"
## Thread
-**1/**
+**1/** @NOTimothyLottes
@VPCOMPRESSB Can do that. But at least these kinds of systems are already faster than human response time (excluding when they have external dependencies on say on some other kernel like Linux). I'll be able to recompile all binary code (including GPU-side) in a tiny fraction of frame time.
diff --git a/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/2026-03-08-gindi4711-did-they-not-just-use-more-historical-frames-to.md b/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/2026-03-08-gindi4711-did-they-not-just-use-more-historical-frames-to.md
index b82c311..818a332 100644
--- a/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/2026-03-08-gindi4711-did-they-not-just-use-more-historical-frames-to.md
+++ b/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/2026-03-08-gindi4711-did-they-not-just-use-more-historical-frames-to.md
@@ -26,11 +26,11 @@ parent_post_id: "2030722033286328426"
## Branch
-**1/**
+**1/** @gindi4711
@NOTimothyLottes Did they not just use more historical frames to get their samples and have a better model to compensate for the side effects?
-**2/**
+**2/** @NOTimothyLottes
@gindi4711 Costs went up a lot so maybe. But cannot really add frames of context without getting costly. Secondary option is to store extra data in feedback sideband.
diff --git a/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/index.md b/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/index.md
index 804d535..9c2ee28 100644
--- a/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/index.md
+++ b/archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/index.md
@@ -25,36 +25,36 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
I'll add one conspiracy theory for everyone listening: After STP's source was out there, DLSS4 'transformer' magically gained 'sharpness' but I don't believe it was from the ML model change at all, instead I think they just introduced the same error feedback mechanism in STP ...
Branches: [[archive/threads/NOTimothyLottes/2026-03-08-ill-add-one-conspiracy-theory-for-everyone/2026-03-08-gindi4711-did-they-not-just-use-more-historical-frames-to]]
-**2/**
+**2/** @NOTimothyLottes
Specifically STP samples feedback at the position of the input pixels, and uses that difference as an error term estimating the amount of blur introduced, one can subtract out some amount of that 'error' to sharpen ...
-**3/**
+**3/** @NOTimothyLottes
Of course that idea isn't strictly new either, fluid sims with advection use similar logic to sharpen. So I'm just another human building on the masters of the past. One can start to go beyond sharpening with this technique and get into local contrast adaption too ...
-**4/**
+**4/** @NOTimothyLottes
One of the marketing points of DLSS4 was 'sharpness' but it didn't actually resolve details to a higher frequency than prior, instead it just gets to a higher contrast, and then they con the consumer with that ...
-**5/**
+**5/** @NOTimothyLottes
Another trick one can employ, and something I used often as a pro photographer, was to deliberately thin or thicken features with sub-pixel precision during enlargement. Meaning you can take a 'feature' and thin it below source nyquist. And people go 'wow' it's detailed ...
-**6/**
+**6/** @NOTimothyLottes
So for instance one can take a input (lower-resolution) feature and simultaneously increase it's contrast while reducing it's thickness (when enlarged) in an energy preserving way. Can use signal bounds to estimate how much contrast and thus thin-ness one can push the feature ...
-**7/**
+**7/** @NOTimothyLottes
This gets easier with color signals because you can take the minimum bounds of the three channels, this is actually exactly what CAS does (just applied in a context without enlargement) ...
-**8/**
+**8/** @NOTimothyLottes
Anyway all this stuff is easy to artistically shape analytically in shader code, and never needed any kind of ML to be implemented (in fact ML would be slow, because it cannot do max/min style logic!!!).
diff --git a/archive/threads/NOTimothyLottes/2026-05-23-another-memorial-weekend-thought-for-either/index.md b/archive/threads/NOTimothyLottes/2026-05-23-another-memorial-weekend-thought-for-either/index.md
index 2b47e9b..729eb5d 100644
--- a/archive/threads/NOTimothyLottes/2026-05-23-another-memorial-weekend-thought-for-either/index.md
+++ b/archive/threads/NOTimothyLottes/2026-05-23-another-memorial-weekend-thought-for-either/index.md
@@ -25,33 +25,33 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Another memorial weekend thought: for either
(a.) single use code - [majority of slopware]
(b.) cold cache code - [also typical of slopware]
the CPU loading the code is a significant amount of the burned memory bandwidth ...
-**2/**
+**2/** @NOTimothyLottes
Meaning in C/C++ land where "programmers" (or rather slop-rammers) mostly sniff argument sloshing glue, moving to a scatter instead of gather based language with a single common "call" that just overreads all the register args, would likely be significantly faster ...
-**3/**
+**3/** @NOTimothyLottes
The analog for the syscall side is to work from a 'tape' pointer read the 7 registers (syscall number in rax, and the 6 max args) always from a linear stream, but advance the read pointer by the number of actual registers used. So the overfetch is just a linear prefetch ...
-**4/**
+**4/** @NOTimothyLottes
If working with only 32-bit args (see the MAP_32BIT comment), it would be efficient. Add a post-syscall address to call in the common syscall loop, the part that does post-syscall logic like scattering data to future argument read slots (aka the scatter part) ...
-**5/**
+**5/** @NOTimothyLottes
Now if it was possible to uber-op the post call logic, meaning a fixed logic block that is just data configurable, that call goes away, and it's all probably executing instructions out of the cache (at some level) ...
-**6/**
+**6/** @NOTimothyLottes
Effectively you'd have an 'initialization language' which is designed to workaround cold execution paths, but with linear CPU prefetch friendly data access for reads, and random scatter for stores (where latency don't matter) ...
-**7/**
+**7/** @NOTimothyLottes
Most crap-o-grammers today in the user-space C++ bloat-ware domain have not really optimized for performance, rather they optimized for maximum bloat generation. Just add up how much the installed libraries weigh in MiB on a clean OS install.
diff --git a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-29-the_geeko1-this-doesnt-have-to-be-like-this-but-the-new-dma.md b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-29-the_geeko1-this-doesnt-have-to-be-like-this-but-the-new-dma.md
index 092a9d4..1a18f2b 100644
--- a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-29-the_geeko1-this-doesnt-have-to-be-like-this-but-the-new-dma.md
+++ b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-29-the_geeko1-this-doesnt-have-to-be-like-this-but-the-new-dma.md
@@ -26,35 +26,35 @@ parent_post_id: "2060198133905199300"
## Branch
-**1/**
+**1/** @the_geeko1
@NOTimothyLottes this doesn't have to be like this .. but the new DMA-buf changes are not upstreamed yet on linux .. if that's done I would love to upstream my changes to the AMD KMD so u can have actual physical addresses of VRAM exported.
-**2/**
+**2/** @the_geeko1
@NOTimothyLottes on the other side u could assign vfio-pci driver to the other device and write the drivers on user-space on both CPU/GPU and cut out the kernel drivers out the picture which is quite nice.
-**3/**
+**3/** @NOTimothyLottes
@the_geeko1 This reminds me, I don't actually know how GPU audio (HDMI out) works, but I've always assumed it was a private onboard memory where regular shader load/store doesn't have access. The bandwidth though is tiny, so that round trip through the CPU is mostly just a latency concern
-**4/**
+**4/** @NOTimothyLottes
@the_geeko1 And by latency, it's mostly a question of how to get a consistent small workload through the GPU at a periodic schedule (feed the data to the CPU right before it's needed for the copy back to the GPU)
-**5/**
+**5/** @NOTimothyLottes
@the_geeko1 Networking is interesting, in that one could do a SALU/SMEM approach to processing packets, or one could do something like work with only fixed size UDP packets and process them using VALU/VMEM, in which case the CPU could interleave/deinterleave the dwords for good GPU access
-**6/**
+**6/** @NOTimothyLottes
@the_geeko1 With the SALU/SMEM approach, having direct communication with the network card could be nice, but I doubt the linux folks want to allow raw UDP header/payload DMA scatter/gather bypassing all the OS layers
-**7/**
+**7/** @the_geeko1
@NOTimothyLottes It's always an option to drop the kernel driver and assign the vfio-pci driver and write a custom driver on user space .. also there some NICs with a programmable chip on them .. they could be programmed to DMA some packets into CPU memory like normal and some into the GPU
-**8/**
+**8/** @the_geeko1
@NOTimothyLottes Nvidia calls them DPU I think ? those are also useful for GPUs to share data if on the same network .. and I think that is the main driver behind Nvidia's work on restructuring how the DMA-bufs work on linux.
diff --git a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-30-nicbarkeragain-very-keen-to-see-how-the-gpu-side-audio-turns-out.md b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-30-nicbarkeragain-very-keen-to-see-how-the-gpu-side-audio-turns-out.md
index 76db116..042974e 100644
--- a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-30-nicbarkeragain-very-keen-to-see-how-the-gpu-side-audio-turns-out.md
+++ b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-30-nicbarkeragain-very-keen-to-see-how-the-gpu-side-audio-turns-out.md
@@ -26,11 +26,11 @@ parent_post_id: "2060186437820010850"
## Branch
-**1/**
+**1/** @nicbarkeragain
@NOTimothyLottes Very keen to see how the GPU side audio turns out!
-**2/**
+**2/** @NOTimothyLottes
@nicbarkeragain To get the low latency Im looking for will require chunking up all work on the GPU and interleaving slots for audio processing. Lower bound on processing granularity is 32 stereo samples in a 64 wave, so less than a millisecond of representative time
diff --git a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-06-27-mrsteyk1-its-seemingly-incorrect-due-to-its-use-for.md b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-06-27-mrsteyk1-its-seemingly-incorrect-due-to-its-use-for.md
index 1a30e14..dfec17e 100644
--- a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-06-27-mrsteyk1-its-seemingly-incorrect-due-to-its-use-for.md
+++ b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-06-27-mrsteyk1-its-seemingly-incorrect-due-to-its-use-for.md
@@ -26,7 +26,7 @@ parent_post_id: "2060190230838223346"
## Branch
-**1/**
+**1/** @mrsteyk1
@NOTimothyLottes It's seemingly incorrect due to it's use for NtWaitForAlertByThreadId. Internal implementation is a hash table [128] indexed by (a1>>5)&0x7f inside PEB. Default spin value (v4) for my build is 10240 shared for similar type of functions (SRWLocks etc).
diff --git a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/index.md b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/index.md
index 2101697..4c9f52d 100644
--- a/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/index.md
+++ b/archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/index.md
@@ -25,56 +25,56 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Took perhaps a 5 month vacation from at home programming, but getting back in the grove with 1hr/day. Polishing up my WIN32 and Linux system call interfaces. Perhaps working towards a demo of GPU-side audio and network processing.
Branches: [[archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-30-nicbarkeragain-very-keen-to-see-how-the-gpu-side-audio-turns-out]]
-**2/**
+**2/** @NOTimothyLottes
Today's topic was Sleep [crap] vs NtDelayExecution [good], does seem useful to be able to NtAlertThread while a thread is sleeping (an analog to signaling while nanosleeping on Linux).
-**3/**
+**3/** @NOTimothyLottes
Futex users, there is the WakeByAddressAll and WaitOnAddress in Windows. But why use those when you can just directly call https://ntdoc.m417z.com/rtlwaitonaddress - but haven't tried that yet, and are the docs correct, why PLARGE_INTEGER for ms, when NtDelayExecution does the 100ns unit thing?
Branches: [[archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-06-27-mrsteyk1-its-seemingly-incorrect-due-to-its-use-for]]
-**4/**
+**4/** @NOTimothyLottes
https://trickybitsblog.github.io/2024/02/25/timestamps.html is a nice related read, also I'm a little late to the https://ntdoc.m417z.com/system_hypervisor_user_shared_data party, but will have that sorted soon as well
-**5/**
+**5/** @NOTimothyLottes
Other thought, I typically mmap an extra LOG file, and write via atomic to grab a fixed width line. No stdout. The log wraps around and exists for multiple executions or even parallel processes. It's the way to do it ... BUT ...
-**6/**
+**6/** @NOTimothyLottes
... I think I'm going to just move the LOG file into the first N KiB of the CART file. So mmap'ed on CPU and GPU, and I can just bank on how "less" doesn't actually load the entire file while printing, so I can still see output on a console if needed for debug.
-**7/**
+**7/** @NOTimothyLottes
And another random thought, can you force de-power the CPU by abusing the https://www.felixcloutier.com/x86/pause instruction for things that are not spin-loops :) Going to have to try this one at some point.
-**8/**
+**8/** @NOTimothyLottes
Pushing data to GPU is really a no-brainer (write-combined stores), minus possibility of non-atomic write visibility, so I do simple stuff like always having a ring buffer of packets available where the GPU can validate each entry with a HASH, taking the latest valid one to use
-**9/**
+**9/** @NOTimothyLottes
Also AMD exports non-cached memory in VK, so it's possible to poll on data the CPU pushes (via write combined stores to VRAM) on AMD a few times per frame even.
-**10/**
+**10/** @NOTimothyLottes
The workaround for NVIDIA is if one wants to read N times per frame, then the CPU needs to duplicate the packet ring to N separate lines. Then the GPU is free to poll, but using separate cachelines each time.
-**11/**
+**11/** @NOTimothyLottes
The route back for IO that needs to be routed through the CPU {audio out, network out} is a lot more unfun. AMD again has the nice uncached memory support, so that part is easy. NVIDIA well, would have to take the crappy mid-frame L2 writeback (likely) making CPU-read available
Branches: [[archive/threads/NOTimothyLottes/2026-05-29-took-perhaps-a-5-month-vacation-from-at-home/2026-05-29-the_geeko1-this-doesnt-have-to-be-like-this-but-the-new-dma]]
-**12/**
+**12/** @NOTimothyLottes
Those who have tread here before with driver side logic (DMA transfers/etc) got screwed, Win+Linux driver idiots and their CPU interrupt based scheduling = completely useless. So getting the driver out of the picture is the way to go
diff --git a/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/2026-05-31-FUZxxl-if-you-do-the-multiply-in-uint128-t-and-then.md b/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/2026-05-31-FUZxxl-if-you-do-the-multiply-in-uint128-t-and-then.md
index 79286b8..eb1908c 100644
--- a/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/2026-05-31-FUZxxl-if-you-do-the-multiply-in-uint128-t-and-then.md
+++ b/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/2026-05-31-FUZxxl-if-you-do-the-multiply-in-uint128-t-and-then.md
@@ -26,15 +26,15 @@ parent_post_id: "2060730425929080874"
## Branch
-**1/**
+**1/** @FUZxxl
@NOTimothyLottes If you do the multiply in uint128_t and then right-shift by 64 places, the compiler should do the right thing.
-**2/**
+**2/** @NOTimothyLottes
@FUZxxl “Should” is exactly why I prefer the actual instruction instrinsics or just inline asm (which is what I use on C CPU land)
-**3/**
+**3/** @FUZxxl
@NOTimothyLottes Have fun with a solution that the compiler optimises worse and that is not portable.
diff --git a/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/index.md b/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/index.md
index 9e01480..6ef3610 100644
--- a/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/index.md
+++ b/archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Renovating CPU clock code. I'm assuming x86-64 TSC is always >= 1 GHz so that conversion of clock counter diff to nanoseconds is simply a MUL instruction fetching the RDX high 64-bit result (of the 128-bit computed). But figuring out how to do the inline asm was a pain.
@@ -33,10 +33,10 @@ Renovating CPU clock code. I'm assuming x86-64 TSC is always >= 1 GHz so that co
Branches: [[archive/threads/NOTimothyLottes/2026-05-30-renovating-cpu-clock-code/2026-05-31-FUZxxl-if-you-do-the-multiply-in-uint128-t-and-then]]
-**2/**
+**2/** @NOTimothyLottes
Looks like NtQuerySystemInformation() with SystemHypervisorSharedPageInformation (aka 0xc5) gives 64-bit scalar for TSC that converts time to units of 10 MHz. So the smart way is to work in units of TSC, then do a subtraction of TSC terms, then MULHI to get {ms, us, or ns} time
-**3/**
+**3/** @NOTimothyLottes
https://gist.github.com/pmttavara/6f06fc5c7679c07375483b06bb77430c - A great reference for getting TSC scaling multipliers on Linux and Windows
diff --git a/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/2026-05-31-retrotink2-here-i-am-still-debugging-by-looking-at-if-a.md b/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/2026-05-31-retrotink2-here-i-am-still-debugging-by-looking-at-if-a.md
index c0a263f..5e02497 100644
--- a/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/2026-05-31-retrotink2-here-i-am-still-debugging-by-looking-at-if-a.md
+++ b/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/2026-05-31-retrotink2-here-i-am-still-debugging-by-looking-at-if-a.md
@@ -26,11 +26,11 @@ parent_post_id: "2061123768429211767"
## Branch
-**1/**
+**1/** @retrotink2
@NOTimothyLottes Here I am still debugging by looking at if a single LED turns on.
-**2/**
+**2/** @NOTimothyLottes
@retrotink2 That plus an oscilloscope … this is the way
diff --git a/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/index.md b/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/index.md
index 71d2c5b..0352985 100644
--- a/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/index.md
+++ b/archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/index.md
@@ -25,16 +25,16 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
no-debugger-debug / console / printf-style - prior evolved to one mmapped fixed-width-height log file with an atomic for multi-thread|process messages - but even that seems too complexy ...
Branches: [[archive/threads/NOTimothyLottes/2026-05-31-no-debugger-debug-console-printf-style-prior/2026-05-31-retrotink2-here-i-am-still-debugging-by-looking-at-if-a]]
-**2/**
+**2/** @NOTimothyLottes
moving to this >>> CART file is mmapped on CPU with mapped GPU access (no file IO) - background page walker to ensure OS won't page it out - beginning of CART file is a grid of 32-bit unsigned values - hex dumping that as my 'log file' - either to term or GPU render
-**3/**
+**3/** @NOTimothyLottes
hits the easy to debug CPU or GPU stuff in the same framework (simply write and it just appears) - it's always a HEX dump, but can show decimal by pretending it's a 4-bit/character terminal with a hex font :)
diff --git a/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/2026-06-02-iamwhosiam-i-dont-think-your-even-suppose-to-change-your.md b/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/2026-06-02-iamwhosiam-i-dont-think-your-even-suppose-to-change-your.md
index c1e1b0b..c0b6039 100644
--- a/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/2026-06-02-iamwhosiam-i-dont-think-your-even-suppose-to-change-your.md
+++ b/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/2026-06-02-iamwhosiam-i-dont-think-your-even-suppose-to-change-your.md
@@ -26,11 +26,11 @@ parent_post_id: "2061416116694442141"
## Branch
-**1/**
+**1/** @iamwhosiam
@NOTimothyLottes I don’t think your even suppose to change your thread’s priority in general anymore, it just messes with scheduling.
-**2/**
+**2/** @NOTimothyLottes
@iamwhosiam Try using low latency pro audio tools and disabling the app’s authorization for high priority scheduling
diff --git a/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/index.md b/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/index.md
index 0a6287c..b2d3cf9 100644
--- a/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/index.md
@@ -25,12 +25,12 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Windows thread priority. SeIncreaseBasePriorityPrivilege required to play in the (fake)"Realtime" class -BUT- apparently there is AvSetMmThreadCharacteristics() for "Pro Audio" and AvSetMmThreadPriority() which can bring up priority into realtime. Curious if games using today?
Branches: [[archive/threads/NOTimothyLottes/2026-06-01-windows-thread-priority/2026-06-02-iamwhosiam-i-dont-think-your-even-suppose-to-change-your]]
-**2/**
+**2/** @NOTimothyLottes
Either way NtSetInformationThread() seems to be the way to just set {1-15} (non-realtime class) priority directly without the silly clamp(priorityClassBase+threadPriority,1,15) business
diff --git a/archive/threads/NOTimothyLottes/2026-06-02-for-windows-trying-to-standardize-on-highest/index.md b/archive/threads/NOTimothyLottes/2026-06-02-for-windows-trying-to-standardize-on-highest/index.md
index c4968df..52fc9dd 100644
--- a/archive/threads/NOTimothyLottes/2026-06-02-for-windows-trying-to-standardize-on-highest/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-02-for-windows-trying-to-standardize-on-highest/index.md
@@ -25,10 +25,10 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
For Windows trying to standardize on HIGHEST_PRIORITY_CLASS, mixed with THREAD_PRIORITY_{IDLE,NORMAL,TIME_CRITICAL}. Which maps to {1, 13, 15} respectively. Then trying "Pro Audio" hack with AVRT to get whatever that gives in the 16-31 fake "realtime" bracket for highest.
-**2/**
+**2/** @NOTimothyLottes
Linux mapping will be {SCHED_IDLE, SCHED_OTHER with 2 settings of nice} to match. Unfortunately SCHED_FIFO is locked out by default, but if the user blesses the right permissions will get better audio latency. Maybe pause/unpause will trigger auto latency re-adaption.
diff --git a/archive/threads/NOTimothyLottes/2026-06-02-its-unfortunate-there-isnt-an-easy-way-to-map-the/index.md b/archive/threads/NOTimothyLottes/2026-06-02-its-unfortunate-there-isnt-an-easy-way-to-map-the/index.md
index 7a4efda..8310191 100644
--- a/archive/threads/NOTimothyLottes/2026-06-02-its-unfortunate-there-isnt-an-easy-way-to-map-the/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-02-its-unfortunate-there-isnt-an-easy-way-to-map-the/index.md
@@ -25,6 +25,6 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
It's unfortunate there isn't an easy way to map the page file so that writes don't automagically post to storage, meaning map then turn off flush until a time desired by the programmer.
diff --git a/archive/threads/NOTimothyLottes/2026-06-03-back-running-640x480-on-my-vga-crts-to-prep-for/index.md b/archive/threads/NOTimothyLottes/2026-06-03-back-running-640x480-on-my-vga-crts-to-prep-for/index.md
index 9670d2f..f301b6f 100644
--- a/archive/threads/NOTimothyLottes/2026-06-03-back-running-640x480-on-my-vga-crts-to-prep-for/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-03-back-running-640x480-on-my-vga-crts-to-prep-for/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Back running 640x480 on my VGA CRTs to prep for workflow that ports down to 480i60 for NTSC. Using my 'right' font. Fully decoupling from all system calls for time is working out great. And yes I'm using all the stuff I talked about in my Advanced Aliasing talk too (joy to code).
diff --git a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-dinit-is-out-no-c-for-me-so-runit-wins-by-default.md b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-dinit-is-out-no-c-for-me-so-runit-wins-by-default.md
index 91c2465..5d63fce 100644
--- a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-dinit-is-out-no-c-for-me-so-runit-wins-by-default.md
+++ b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-dinit-is-out-no-c-for-me-so-runit-wins-by-default.md
@@ -26,7 +26,7 @@ parent_post_id: "2064858927829745887"
## Branch
-**1/**
+**1/** @NOTimothyLottes
'dinit' is out (no C++ for me) - so runit wins by default [also future desire to run busybox, so it's the natural choice]
diff --git a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-going-to-give-artix-lxqt-runit-variation-a-try.md b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-going-to-give-artix-lxqt-runit-variation-a-try.md
index 151148b..b7bb690 100644
--- a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-going-to-give-artix-lxqt-runit-variation-a-try.md
+++ b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-going-to-give-artix-lxqt-runit-variation-a-try.md
@@ -26,15 +26,15 @@ parent_post_id: "2064858927829745887"
## Branch
-**1/**
+**1/** @NOTimothyLottes
Going to give artix-lxqt-runit variation a try. Mostly just a stop gap to see if I can actually get a bloated Linux system installed before a more serious effort with BuildRoot. First de-windows victim computer will be an AMD powered APU.
-**2/**
+**2/** @NOTimothyLottes
Looks like the workaround for my locked UEFI secure boot Enabled on the second machine was to "Set Supervisor Password", afterwords I could disable secure boot and APM, but still no way to enable legacy BIOS "Boot Mode".
-**3/**
+**3/** @NOTimothyLottes
Somewhat surprised, Artix using the graphical install just worked out of the box (AMD APU). Got confused post install when 'top' shows 'Xorg' instead of 'XLibre' but the package manager says XLibre is installed.
diff --git a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-RouaniJihad-my-patience-is-this-thin-with-win11-right-now-but.md b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-RouaniJihad-my-patience-is-this-thin-with-win11-right-now-but.md
index 20302c9..ed61570 100644
--- a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-RouaniJihad-my-patience-is-this-thin-with-win11-right-now-but.md
+++ b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-RouaniJihad-my-patience-is-this-thin-with-win11-right-now-but.md
@@ -26,7 +26,7 @@ parent_post_id: "2064858927829745887"
## Branch
-**1/**
+**1/** @RouaniJihad
@NOTimothyLottes My patience is this 🤏 thin with win11 right now, but Linux sounds like too much work, Mac is probably easier with more native software
diff --git a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-mcnabbd-fascinating-to-me-how-this-challenge-would-have.md b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-mcnabbd-fascinating-to-me-how-this-challenge-would-have.md
index 03f5f65..d0b90cb 100644
--- a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-mcnabbd-fascinating-to-me-how-this-challenge-would-have.md
+++ b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-mcnabbd-fascinating-to-me-how-this-challenge-would-have.md
@@ -26,11 +26,11 @@ parent_post_id: "2064858927829745887"
## Branch
-**1/**
+**1/** @mcnabbd
@NOTimothyLottes fascinating to me how this challenge would have captivated me a couple decades ago but now i just wanna run away
-**2/**
+**2/** @NOTimothyLottes
@mcnabbd Similar feelings. Used to build linux from scratch in the BIOS era, also ran FreeBSD/etc, just for fun. But things had been easier then. Now years of technical debt later, all my tolerance for complexity has been fully exhausted.
diff --git a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/index.md b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/index.md
index d1141a1..83b171a 100644
--- a/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/index.md
@@ -25,20 +25,20 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
So I'm on Linux now, but obviously I cheated, because this is a SteamOS machine (pre-installed). Need to re-learn enough to be able to make responsible choices on a new install. First up what init system to do? {openrc, runit, s6, or dinit}.
Branches: [[archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-RouaniJihad-my-patience-is-this-thin-with-win11-right-now-but]], [[archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-NOTimothyLottes-dinit-is-out-no-c-for-me-so-runit-wins-by-default]], [[archive/threads/NOTimothyLottes/2026-06-10-so-im-on-linux-now-but-obviously-i-cheated/2026-06-11-mcnabbd-fascinating-to-me-how-this-challenge-would-have]]
-**2/**
+**2/** @NOTimothyLottes
Going to give artix-lxqt-runit variation a try. Mostly just a stop gap to see if I can actually get a bloated Linux system installed before a more serious effort with BuildRoot. First de-windows victim computer will be an AMD powered APU.
-**3/**
+**3/** @NOTimothyLottes
Looks like the workaround for my locked UEFI secure boot Enabled on the second machine was to "Set Supervisor Password", afterwords I could disable secure boot and APM, but still no way to enable legacy BIOS "Boot Mode".
-**4/**
+**4/** @NOTimothyLottes
Somewhat surprised, Artix using the graphical install just worked out of the box (AMD APU). Got confused post install when 'top' shows 'Xorg' instead of 'XLibre' but the package manager says XLibre is installed.
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/2026-06-13-tomcr2100-interesting-font-does-it-have-a-name.md b/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/2026-06-13-tomcr2100-interesting-font-does-it-have-a-name.md
index a727d93..7943483 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/2026-06-13-tomcr2100-interesting-font-does-it-have-a-name.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/2026-06-13-tomcr2100-interesting-font-does-it-have-a-name.md
@@ -26,7 +26,7 @@ parent_post_id: "2065832746757341482"
## Branch
-**1/**
+**1/** @tomcr2100
@NOTimothyLottes Interesting font, does it have a name?
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/index.md b/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/index.md
index d9b6400..d2f8dd0 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Cross compilation is up. Just like on windows with GCC I have to disable all warnings because there is no way to turn off “function called through a non-compatible type”. They obviously should have had warning IDs and an ID based disable.
@@ -34,11 +34,11 @@ Cross compilation is up. Just like on windows with GCC I have to disable all war
Branches: [[archive/threads/NOTimothyLottes/2026-06-13-cross-compilation-is-up/2026-06-13-tomcr2100-interesting-font-does-it-have-a-name]]
-**2/**
+**2/** @NOTimothyLottes
Found my first of perhaps many Wine “fix me”s looks like they didn’t emulate NtQuerySystemInformation() for use to get the TSC time scalar. Also implies all PC devs do this wrong, else Valve would have had this implemented already.
-**3/**
+**3/** @never_released
@NOTimothyLottes Intriguingly Microsoft documentation has this bit
@@ -48,6 +48,6 @@ https://learn.microsoft.com/en-us/windows/win32/sysinfo/acquiring-high-resolutio
-**4/**
+**4/** @NOTimothyLottes
@never_released It will be a sad day when we have to be concerned about VM migration while playing a game on a local machine
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-BonbliStar-most-futex-impls-ive-seen-check-for-that-and.md b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-BonbliStar-most-futex-impls-ive-seen-check-for-that-and.md
index 0863e60..5399599 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-BonbliStar-most-futex-impls-ive-seen-check-for-that-and.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-BonbliStar-most-futex-impls-ive-seen-check-for-that-and.md
@@ -26,11 +26,11 @@ parent_post_id: "2065840191340707905"
## Branch
-**1/**
+**1/** @BonbliStar
@NOTimothyLottes most futex impls i've seen check for that and early return before the syscall, but you likely already knew that
-**2/**
+**2/** @NOTimothyLottes
@BonbliStar Yes, the comment was more the point of designing for the worst case, the limit of possibly blocking calls that interact with the scheduling.
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-NOTimothyLottes-the-glibc-implementation-would-do-that-i-bypass.md b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-NOTimothyLottes-the-glibc-implementation-would-do-that-i-bypass.md
index b47f322..2deb516 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-NOTimothyLottes-the-glibc-implementation-would-do-that-i-bypass.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-NOTimothyLottes-the-glibc-implementation-would-do-that-i-bypass.md
@@ -26,7 +26,7 @@ parent_post_id: "2065851939917906296"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@axelgneiting The glibc implementation would do that. I bypass libc and just do it manually with perf_event_open syscall and mmap.
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-raggi-nanosleep-0-will-sleep-for-the-timer-slack-mm.md b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-raggi-nanosleep-0-will-sleep-for-the-timer-slack-mm.md
index f763bec..770a05a 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-raggi-nanosleep-0-will-sleep-for-the-timer-slack-mm.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-raggi-nanosleep-0-will-sleep-for-the-timer-slack-mm.md
@@ -26,13 +26,13 @@ parent_post_id: "2065840191340707905"
## Branch
-**1/**
+**1/** @raggi
@NOTimothyLottes nanosleep(0) will sleep for the timer slack
_mm_pause() if you want to avoid a context switch and keep your scheduler quantum
-**2/**
+**2/** @NOTimothyLottes
@raggi I do that via inline asm to save power. This was more a comment on the cost of actually using the futex system call, need to be careful about the call frequency
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-rflaherty71-seems-like-people-trying-to-push-high-frame-rates.md b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-rflaherty71-seems-like-people-trying-to-push-high-frame-rates.md
index 2db5271..dd01197 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-rflaherty71-seems-like-people-trying-to-push-high-frame-rates.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-rflaherty71-seems-like-people-trying-to-push-high-frame-rates.md
@@ -26,19 +26,19 @@ parent_post_id: "2065840191340707905"
## Branch
-**1/**
+**1/** @rflaherty71
@NOTimothyLottes Seems like people trying to push high frame rates would be perfectly fine with just busy spinning at that point
-**2/**
+**2/** @NOTimothyLottes
@rflaherty71 Not exactly true, the larger problem is getting context switched at a bad time, so getting non-blocking bound comes with another set of dangers (higher bad preemption risk)
-**3/**
+**3/** @AgileJebrim
@NOTimothyLottes @rflaherty71 All the more reason to go GPU-side where that can’t occur.
-**4/**
+**4/** @NOTimothyLottes
@AgileJebrim @rflaherty71 Consumer GPU side is littered with junk these days, starting with multi display compositors.
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-winning_tactic-why-not-do-a-gradual-sleeping-start-with-while.md b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-winning_tactic-why-not-do-a-gradual-sleeping-start-with-while.md
index f9e679f..0b987b7 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-winning_tactic-why-not-do-a-gradual-sleeping-start-with-while.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-winning_tactic-why-not-do-a-gradual-sleeping-start-with-while.md
@@ -26,7 +26,7 @@ parent_post_id: "2065840191340707905"
## Branch
-**1/**
+**1/** @winning_tactic
Why not do a gradual sleeping? Start with
while (spin--) {
@@ -39,21 +39,21 @@ You can have power modes that sets a lower threshhold to always yield and not sp
But I've never considered a write to a dummy file as a legitimate yield/wait trigger. I wonder how that would fit in to my solution...
-**2/**
+**2/** @NOTimothyLottes
@winning_tactic I don’t design around waiting for a specific point in time, I do other things, but talk about them when I can easily show the results
-**3/**
+**3/** @winning_tactic
Correct. But that's the point of gradually backoff, active spinlocking, then green thread yielding (cooperative other tasks, maybe even the one contesting) then kernel_poke (I guess that's what I would call that writing to file its a return from kernel-land immediately) then timer fired, the idea isn't to wait on a time, it's wait on an increasing value that changes tactics from the previous waits so that you don't really have to keep track of when what happens.
https://gitlab.com/qsrc.net/Lampyr/-/blob/dev/rt/time.c?ref_type=heads#L78
But I've got to work on the power stuff and steal your idea of course.
-**4/**
+**4/** @NOTimothyLottes
@winning_tactic Ahh the illusion of nonblocking execution on consumer devices. The moment the os decides to preempt your thread, there no longer exists a non blocking interface. A single thread never gets a guarantee of execution, so waiting for some exact point in time is failed design
-**5/**
+**5/** @winning_tactic
@NOTimothyLottes It's green threads multiplexed on pinned threads both cooperatively and preemptively. I beg your pardon!~
https://gitlab.com/qsrc.net/Lampyr/-/blob/dev/rt/task.c?ref_type=heads
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/index.md b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/index.md
index e807834..7e80cd0 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/index.md
@@ -25,12 +25,12 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Interesting how on this Linux box, scheduling NOPs like nanosleep of 0 and futex waiting on an already set memory location … both take around 60 microseconds, cannot afford to do many of those per millisecond. Food for thought for high fps targets
Branches: [[archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-rflaherty71-seems-like-people-trying-to-push-high-frame-rates]], [[archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-raggi-nanosleep-0-will-sleep-for-the-timer-slack-mm]], [[archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-winning_tactic-why-not-do-a-gradual-sleeping-start-with-while]], [[archive/threads/NOTimothyLottes/2026-06-13-interesting-how-on-this-linux-box-scheduling-nops/2026-06-13-BonbliStar-most-futex-impls-ive-seen-check-for-that-and]]
-**2/**
+**2/** @NOTimothyLottes
A write of zero bytes is closer to say 6 microseconds in contrast, so just the user/kernel transition is expensive but 10x faster
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-eternalclassic_-you-can-use-camac-free-to-take-raw-photos-on.md b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-eternalclassic_-you-can-use-camac-free-to-take-raw-photos-on.md
index 7a58502..2f2ef35 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-eternalclassic_-you-can-use-camac-free-to-take-raw-photos-on.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-eternalclassic_-you-can-use-camac-free-to-take-raw-photos-on.md
@@ -26,11 +26,11 @@ parent_post_id: "2065804972378243476"
## Branch
-**1/**
+**1/** @eternalclassic_
@NOTimothyLottes you can use camac (free) to take raw photos on iphone without post-processing shit
-**2/**
+**2/** @NOTimothyLottes
@eternalclassic_ Will have to try that thanks
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-quiveron_x-why-are-you-using-crt.md b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-quiveron_x-why-are-you-using-crt.md
index 8788650..b9f5204 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-quiveron_x-why-are-you-using-crt.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-quiveron_x-why-are-you-using-crt.md
@@ -26,15 +26,15 @@ parent_post_id: "2065804972378243476"
## Branch
-**1/**
+**1/** @quiveron_x
@NOTimothyLottes Why are you using CRT
-**2/**
+**2/** @NOTimothyLottes
@quiveron_x Still the best display technology IMO. Low persistence, analog, variable resolution, smooth continuous blended signal, deep blacks, great contrast, etc.
-**3/**
+**3/** @quiveron_x
I completely agree, I asked because I was wondering if you were planning on doing something specific.
I think we gave up on them too early, they felt good to use, pleasant to look at, only negative side is they were too heavy. People obsessing over resolution don't realize if image is shit it doesn't matter if it's 4k or 8k
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-winning_tactic-hz-sharing-i-wonder-if-crts-can-be-changed-like.md b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-winning_tactic-hz-sharing-i-wonder-if-crts-can-be-changed-like.md
index a0f5f17..921b18f 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-winning_tactic-hz-sharing-i-wonder-if-crts-can-be-changed-like.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-winning_tactic-hz-sharing-i-wonder-if-crts-can-be-changed-like.md
@@ -26,7 +26,7 @@ parent_post_id: "2065804972378243476"
## Branch
-**1/**
+**1/** @winning_tactic
@NOTimothyLottes Hz sharing? I wonder if CRTs can be changed like 60 -> 59 Hz, and if that would correct it? I do not know whether any is correct, but I'd betcha there's some kinda thing there about that. Why would the iphone has .. no it's not mechanical, so I have no clue but that is a puzzle
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-14-mayemayey-ohh-what-is-that-a-2070sb.md b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-14-mayemayey-ohh-what-is-that-a-2070sb.md
index 36534f8..01d1c33 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-14-mayemayey-ohh-what-is-that-a-2070sb.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-14-mayemayey-ohh-what-is-that-a-2070sb.md
@@ -26,27 +26,27 @@ parent_post_id: "2065804972378243476"
## Branch
-**1/**
+**1/** @mayemayey
@NOTimothyLottes ohh what is that? a 2070SB?
-**2/**
+**2/** @NOTimothyLottes
@mayemayey FP2141SB
-**3/**
+**3/** @mayemayey
@NOTimothyLottes yep. that's a rebranded 2070sb haha. there's an hsync/vsync (~152khz, 254hz) overclocking tutorial if you ever feel daring enough to. 😉
-**4/**
+**4/** @NOTimothyLottes
@mayemayey Those crazy refresh rates are long past diminishing returns though due to the fixed phosphor decay. Great display, only big flaw is the vertical nonlinearity at the extreme top and bottom.
-**5/**
+**5/** @mayemayey
@NOTimothyLottes do you have any blurriness in the corners?
-**6/**
+**6/** @NOTimothyLottes
@mayemayey It might if I ran it at peak resolutions but I mostly stick to higher refresh rates instead, so wouldn’t notice.
diff --git a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/index.md b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/index.md
index 5cc9b8b..777e11d 100644
--- a/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/index.md
@@ -25,19 +25,19 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Nanorc done and back to actual programming with the new font. The iPhone cannot seem to correctly capture a CRT anymore … and yes my _ is … and my ; is a 5 dot vertical line (prefer that for C/GLSL coding)
Branches: [[archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-quiveron_x-why-are-you-using-crt]], [[archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-eternalclassic_-you-can-use-camac-free-to-take-raw-photos-on]], [[archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-13-winning_tactic-hz-sharing-i-wonder-if-crts-can-be-changed-like]], [[archive/threads/NOTimothyLottes/2026-06-13-nanorc-done-and-back-to-actual-programming-with/2026-06-14-mayemayey-ohh-what-is-that-a-2070sb]]
-**2/**
+**2/** @NOTimothyLottes
Thankfully I can still dedecorate the term window to focus lines for useful content. Practically speaking I almost have a new language implemented in C via typedefs and macros … back to building and testing the native Linux system level interface
-**3/**
+**3/** @NOTimothyLottes
Lubbers are invading my screen
diff --git a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-14-Social_Vulture-running-in-crt-or-are-you-emulating-scanlines-in.md b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-14-Social_Vulture-running-in-crt-or-are-you-emulating-scanlines-in.md
index 1c2a66e..1b3ddaf 100644
--- a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-14-Social_Vulture-running-in-crt-or-are-you-emulating-scanlines-in.md
+++ b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-14-Social_Vulture-running-in-crt-or-are-you-emulating-scanlines-in.md
@@ -26,7 +26,7 @@ parent_post_id: "2066184005632786736"
## Branch
-**1/**
+**1/** @Social_Vulture
@NOTimothyLottes Running in CRT or are you emulating scanlines in your editor?
diff --git a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-GrowlerEnjooyer-there-is-0-chance-you-actually-use-this-font-its.md b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-GrowlerEnjooyer-there-is-0-chance-you-actually-use-this-font-its.md
index 8e04708..b2b0e17 100644
--- a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-GrowlerEnjooyer-there-is-0-chance-you-actually-use-this-font-its.md
+++ b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-GrowlerEnjooyer-there-is-0-chance-you-actually-use-this-font-its.md
@@ -26,19 +26,19 @@ parent_post_id: "2066184005632786736"
## Branch
-**1/**
+**1/** @GrowlerEnjooyer
@NOTimothyLottes There is 0 chance you actually use this font. It's for the meme, right?
-**2/**
+**2/** @NOTimothyLottes
@GrowlerEnjooyer Oh I definitely use this font, was designed to be extremely easy to visually parse for code.
-**3/**
+**3/** @GrowlerEnjooyer
@NOTimothyLottes Bravo, well played Mr troll
-**4/**
+**4/** @NOTimothyLottes
@GrowlerEnjooyer Not trolling, actually do use the font for my terminals on that dev box
diff --git a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-sadhuIGI-also-this-font-is-cursed.md b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-sadhuIGI-also-this-font-is-cursed.md
index 2fe155d..8f1b594 100644
--- a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-sadhuIGI-also-this-font-is-cursed.md
+++ b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/2026-06-15-sadhuIGI-also-this-font-is-cursed.md
@@ -26,7 +26,7 @@ parent_post_id: "2066184005632786736"
## Branch
-**1/**
+**1/** @sadhuIGI
@NOTimothyLottes Also this font is cursed
diff --git a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/index.md b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/index.md
index 471e339..7accc95 100644
--- a/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-14-on-linux-i-do-speculative-pinning-of-cpu-memory/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
On Linux I do speculative pinning of CPU memory via mlockall. Learned that later Linux actually allows some amount of pinned memory without admin. So this is succeeding on my new Artix box.
diff --git a/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-AgileJebrim-sendmmsg-recvmmsg-can-only-work-with-1024-packets.md b/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-AgileJebrim-sendmmsg-recvmmsg-can-only-work-with-1024-packets.md
index ae54f9b..7e3a4f6 100644
--- a/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-AgileJebrim-sendmmsg-recvmmsg-can-only-work-with-1024-packets.md
+++ b/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-AgileJebrim-sendmmsg-recvmmsg-can-only-work-with-1024-packets.md
@@ -26,27 +26,27 @@ parent_post_id: "2070337342854832468"
## Branch
-**1/**
+**1/** @AgileJebrim
sendmmsg/recvmmsg can only work with 1024 packets at a time unfortunately. You’ve gotta loop them. While they’re surprisingly fairly deterministic in execution times, their throughput isn’t the best. The Linux kernel takes far longer to process sending the packets out than my own code does to process the sim and build the packets in the first place lol.
-**2/**
+**2/** @NOTimothyLottes
@AgileJebrim Yes 1024 max, so best case 1/1024 the syscall count (well factored). As for overhead, for a co-located server you could always hijack the network card driver and just move your server into it and run kernel side if you really wanted to.
-**3/**
+**3/** @AgileJebrim
@NOTimothyLottes If you want to be locked in to a particular NIC yeah.
-**4/**
+**4/** @aepau2
@AgileJebrim @NOTimothyLottes You can use eBPF as a poor man's kernel bypass.
-**5/**
+**5/** @NOTimothyLottes
@aepau2 @AgileJebrim Not that any of my source would pass their nanny tester. When I was younger and running my own business, I used to host my business website off of a really old laptop running an in-kernel web server that I wrote. It wasn’t that hard to do long ago.
-**6/**
+**6/** @AgileJebrim
@NOTimothyLottes @aepau2 eBPF doesn’t support SIMD lol
diff --git a/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-BigP4P4Smurf-take-a-look-at-http-lalists-stanford-edu-lad-2001.md b/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-BigP4P4Smurf-take-a-look-at-http-lalists-stanford-edu-lad-2001.md
index 5183cc8..977dde2 100644
--- a/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-BigP4P4Smurf-take-a-look-at-http-lalists-stanford-edu-lad-2001.md
+++ b/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/2026-06-26-BigP4P4Smurf-take-a-look-at-http-lalists-stanford-edu-lad-2001.md
@@ -26,7 +26,7 @@ parent_post_id: "2070337342854832468"
## Branch
-**1/**
+**1/** @BigP4P4Smurf
@NOTimothyLottes Take a look at http://lalists.stanford.edu/lad/2001/Nov/0248.html
diff --git a/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/index.md b/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/index.md
index 7da3cdf..85bd6ca 100644
--- a/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-26-quick-summary-of-why-not-pselect-ppoll-epoll/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Quick summary of why not {pselect, ppoll, epoll_pwait2} style non-TCP IO [it can amplify kernel transitions]. For UDP stuff blocking {sendmmsg,recvmmsg (with timeout)} amortizes out kernel transitions.
diff --git a/archive/threads/NOTimothyLottes/2026-06-27-deterrent-to-alsa-is-just-parsing-through-snd-pcm/index.md b/archive/threads/NOTimothyLottes/2026-06-27-deterrent-to-alsa-is-just-parsing-through-snd-pcm/index.md
index 05e9933..49e8c49 100644
--- a/archive/threads/NOTimothyLottes/2026-06-27-deterrent-to-alsa-is-just-parsing-through-snd-pcm/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-27-deterrent-to-alsa-is-just-parsing-through-snd-pcm/index.md
@@ -25,12 +25,12 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Deterrent to ALSA is just parsing through snd_pcm_open() source. It's death by boiler plate and complexity. Tinyalsa isn't much better. Likely easier to think about this from perspective of devices that can be open()ed from /dev/snd. On my machine doesn't seem to hot plug
-**2/**
+**2/** @NOTimothyLottes
Assuming 'p'&'c' are PLAYBACK & CAPTURE, so opening different devices (instead of both in one device). Then just have user provide a device, or have the API war-dial open() constructing possible devices to probe what is available 'pcmC{c}D{d}{p|c}'. Easier than listing files.
diff --git a/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-29-AlexABPerson-have-you-actually-reached-out-to-said-developers.md b/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-29-AlexABPerson-have-you-actually-reached-out-to-said-developers.md
index e1c54b3..5379809 100644
--- a/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-29-AlexABPerson-have-you-actually-reached-out-to-said-developers.md
+++ b/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-29-AlexABPerson-have-you-actually-reached-out-to-said-developers.md
@@ -26,19 +26,19 @@ parent_post_id: "2071706805114216559"
## Branch
-**1/**
+**1/** @AlexABPerson
@NOTimothyLottes Have you actually reached out to said developers and offered to start a documentation effort/ask them some questions about things? It seems a little unfair to be rage posting about this all the time when the point is you (and me, and everyone) have the power to make it better.
-**2/**
+**2/** @NOTimothyLottes
@AlexABPerson Haha I could start that with an email: hello godly ALSA dev, as a vintage pee-on programmer from the stone age, I was trying to ignore your advice about using the user-space API and thus needing GPL, and instead using the undocumented IOCTLs of the kernel driver directly ...
-**3/**
+**3/** @NOTimothyLottes
@AlexABPerson But on a serious note, I mostly shit post for the entertainment, because once in a while I actually learn something from a response. And often documenting the process might help someone else too ...
-**4/**
+**4/** @AlexABPerson
@NOTimothyLottes That's fair, thank you for the honest reply! It *is* interesting to see a lot of these sorts of inner workings, and I definitely sympathise with the "I can't believe it works like this" feeling 😂 Stuff does have a tendency to get like that huh
diff --git a/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-30-mrsteyk1-tinyplay-does-sndrv-pcm-ioctl-hw-params-ioctl.md b/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-30-mrsteyk1-tinyplay-does-sndrv-pcm-ioctl-hw-params-ioctl.md
index 8758316..ed3f8d0 100644
--- a/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-30-mrsteyk1-tinyplay-does-sndrv-pcm-ioctl-hw-params-ioctl.md
+++ b/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-30-mrsteyk1-tinyplay-does-sndrv-pcm-ioctl-hw-params-ioctl.md
@@ -26,17 +26,17 @@ parent_post_id: "2071725181576319370"
## Branch
-**1/**
+**1/** @mrsteyk1
@NOTimothyLottes tinyplay does SNDRV_PCM_IOCTL_HW_PARAMS ioctl (referenced in the article alongside REFINE)
-**2/**
+**2/** @NOTimothyLottes
@mrsteyk1 I believe the method the ALSA people wanted users to go by was to first REFINE to grab the full PCM limits, then iteratively make changes (via REFINE ioctl) until it converges to one configuration, at which point the HW_PARAMS ioctl is used to finalize that config.
-**3/**
+**3/** @NOTimothyLottes
@mrsteyk1 Maybe it works sometimes to just use HW_PARAMs directly, but I have not got that working. I also cannot seem to get the refinement process to work either. And I don't get error returns, so still no idea what is wrong yet.
diff --git a/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/index.md b/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/index.md
index 2a565e0..0145e6c 100644
--- a/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/index.md
+++ b/archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
ALSA hell month continues: remember it might be "open source" but it is definitely "closed documentation" [those docs are securely trapped in the minds of the authors]. Now that I have aplay playing a sound, it's time for garbage sifting through STRACE to see what is going on ...
@@ -33,35 +33,35 @@ ALSA hell month continues: remember it might be "open source" but it is definite
Branches: [[archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-29-AlexABPerson-have-you-actually-reached-out-to-said-developers]]
-**2/**
+**2/** @NOTimothyLottes
For devs working on linux, strace is a good friend, besides reverse engineering undocumented crap, it's useful to run on your own app as a bug test, like look what this idiot [me] did with nanosleep()
-**3/**
+**3/** @NOTimothyLottes
In my ALSA interface I war-dial the possible /dev/snd/pcm devices instead of just listing the directory. It's a lot easier in source code.
-**4/**
+**4/** @NOTimothyLottes
Using 'strace' showed another bug in my setting schedule priority code (I didn't yet validate that code and check for errors). Definitely my ALSA test app shows ZERO errors in ALSA system calls, but doesn't actually play anything. Broken without errors = crappy API.
-**5/**
+**5/** @NOTimothyLottes
In theory a good API, SNDRV_PCM_IOCTL_PREPARE would fail if the next SNDRV_PCM_IOCTL_WRITEI_FRAMES wouldn't accept the write. And that WRITEI should also fail instead of pass and setting .result=0 (of the snd xferi structure).
-**6/**
+**6/** @NOTimothyLottes
The best I can guess thus far is that the aplay app goes through some HW_REFINE ioctls before setting the HW_PARAMS, and perhaps the "magic missing thing" is in that process.
-**7/**
+**7/** @NOTimothyLottes
Best docs on REFINE that I've found yet is indirectly through this. Note tinyalsa doesn't seem to use this interface other than through pcm_params_get(), not the interative process seen in aplay strace. Maybe because tinyalsa is for android (different drivers)
@@ -69,14 +69,14 @@ Best docs on REFINE that I've found yet is indirectly through this. Note tinyals
Branches: [[archive/threads/NOTimothyLottes/2026-06-29-alsa-hell-month-continues-remember-it-might-be/2026-06-30-mrsteyk1-tinyplay-does-sndrv-pcm-ioctl-hw-params-ioctl]]
-**8/**
+**8/** @NOTimothyLottes
SNDRV_PCM_IOCTL_HW_REFINE
If send out a zeroed snd_pcm_hw_params, the ioctl will fail. There is a special magic sauce to the structure that must be initialized correctly before you can even fetch hardware parameters. It's high level skill in Obfuscation. See *_any( in ALSA src
-**9/**
+**9/** @NOTimothyLottes
magiz/
clear snd_pcm_hw_params
@@ -85,11 +85,11 @@ set intervals[0 ... 11].max=~0
set rmask=~0
set info=~0
-**10/**
+**10/** @NOTimothyLottes
The rmask and cmask use bit indexed by the DEFINE so
1< .flag=4). Apparently setting the core values is enough for the driver.
-**2/**
+**2/** @NOTimothyLottes
Don't actually have to set {.flags,.rmask,.info} on my machine. Absolutely do have to set ".max=~0" for the intervals not being hardcoded. I only do double buffered, 48000Hz stereo, and just vary the frames/period sizing.
diff --git a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-never_released-theres-a-lot-of-old-news-around-1-wine-doesnt.md b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-never_released-theres-a-lot-of-old-news-around-1-wine-doesnt.md
index ce202ad..6a529da 100644
--- a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-never_released-theres-a-lot-of-old-news-around-1-wine-doesnt.md
+++ b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-never_released-theres-a-lot-of-old-news-around-1-wine-doesnt.md
@@ -26,7 +26,7 @@ parent_post_id: "2072447378242552093"
## Branch
-**1/**
+**1/** @never_released
@NOTimothyLottes There's a lot of old news around.
@@ -35,7 +35,7 @@ parent_post_id: "2072447378242552093"
This explicitly blocks this trick. Please do not use it
-**2/**
+**2/** @NOTimothyLottes
@never_released Well they could put it on a command line toggle. Or have some other back door. Today I’m blocked on wine ntdll compatibility with bugs filed. So Im still looking for workarounds, going direct to Linux syscalls would have been the best and easiest option.
diff --git a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-opdroid1234-the-two-truths-ive-come-to-accept-in-life-a.md b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-opdroid1234-the-two-truths-ive-come-to-accept-in-life-a.md
index 21b29ca..68e383f 100644
--- a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-opdroid1234-the-two-truths-ive-come-to-accept-in-life-a.md
+++ b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-opdroid1234-the-two-truths-ive-come-to-accept-in-life-a.md
@@ -26,7 +26,7 @@ parent_post_id: "2072445315370590266"
## Branch
-**1/**
+**1/** @opdroid1234
@NOTimothyLottes the two truths ive come to accept in life
diff --git a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-SheriefFYI-i-was-just-about-to-say-i-recall-pulling-this-off.md b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-SheriefFYI-i-was-just-about-to-say-i-recall-pulling-this-off.md
index 2903c8a..d6dc28d 100644
--- a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-SheriefFYI-i-was-just-about-to-say-i-recall-pulling-this-off.md
+++ b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-SheriefFYI-i-was-just-about-to-say-i-recall-pulling-this-off.md
@@ -26,7 +26,7 @@ parent_post_id: "2072447378242552093"
## Branch
-**1/**
+**1/** @SheriefFYI
@NOTimothyLottes I was just about to say I recall pulling this off before for _reasons_
diff --git a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-winning_tactic-you-could-pretend-to-be-an-audio-jack.md b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-winning_tactic-you-could-pretend-to-be-an-audio-jack.md
index 9c79720..693cb47 100644
--- a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-winning_tactic-you-could-pretend-to-be-an-audio-jack.md
+++ b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-winning_tactic-you-could-pretend-to-be-an-audio-jack.md
@@ -26,7 +26,7 @@ parent_post_id: "2072445315370590266"
## Branch
-**1/**
+**1/** @winning_tactic
@NOTimothyLottes You could pretend to be an audio jack implementation? If impersonating wine doesn't work.
diff --git a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/index.md b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/index.md
index 79fcebf..84b7a9b 100644
--- a/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Haha damn, I thought I had a great idea, for Wine workarounds, I could just detect Wine (easy), and then make the associated Linux system call from inside Wine using inline asm! [no surprise, it doesn't work]
@@ -33,7 +33,7 @@ Haha damn, I thought I had a great idea, for Wine workarounds, I could just dete
Branches: [[archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-01-opdroid1234-the-two-truths-ive-come-to-accept-in-life-a]], [[archive/threads/NOTimothyLottes/2026-07-01-haha-damn-i-thought-i-had-a-great-idea-for-wine/2026-07-02-winning_tactic-you-could-pretend-to-be-an-audio-jack]]
-**2/**
+**2/** @NOTimothyLottes
https://gpfault.net/posts/drunk-exe.html - So it apparently is possible, likely I'm screwing up my register saves for the ABI differences ...
diff --git a/archive/threads/NOTimothyLottes/2026-07-01-linux-by-default-doesnt-allow-any-increase-in/index.md b/archive/threads/NOTimothyLottes/2026-07-01-linux-by-default-doesnt-allow-any-increase-in/index.md
index 3da9661..286de54 100644
--- a/archive/threads/NOTimothyLottes/2026-07-01-linux-by-default-doesnt-allow-any-increase-in/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-01-linux-by-default-doesnt-allow-any-increase-in/index.md
@@ -25,16 +25,16 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Linux by default doesn't allow any increase in scheduling priority. Users need to manually setup special user|group with elevated rights. Also system calls that try elevated scheduling don't clamp, instead they fail -EPREM if out of bounds. So all around a pain in the ass.
-**2/**
+**2/** @NOTimothyLottes
I'm a little lazy right now and don't feel like trying SteamOS big picture mode to see what the default ulimits are. Curious what they allow.
-**3/**
+**3/** @NOTimothyLottes
Linux priority workarounds
(a.) Use getrlimit() to get {soft,hard} limits
@@ -44,11 +44,11 @@ Linux priority workarounds
-**4/**
+**4/** @NOTimothyLottes
I don't do one-time global priority maximums, just in case someone sudo's higher priority hard limit dynamically it should pickup the new limit.
-**5/**
+**5/** @NOTimothyLottes
Also while on setrlimit, I also bump up the RLIMIT_MEMLOCK to it's maximum just in case before the mlockall().
diff --git a/archive/threads/NOTimothyLottes/2026-07-02-settings-im-using-for-snd-pcm-sw-params-for-alsa/index.md b/archive/threads/NOTimothyLottes/2026-07-02-settings-im-using-for-snd-pcm-sw-params-for-alsa/index.md
index 042c856..4f41674 100644
--- a/archive/threads/NOTimothyLottes/2026-07-02-settings-im-using-for-snd-pcm-sw-params-for-alsa/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-02-settings-im-using-for-snd-pcm-sw-params-for-alsa/index.md
@@ -25,20 +25,20 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Settings I'm using for snd_pcm_sw_params for ALSA, don't have docs for all of this, seems to work. I'm doing 64 frame period size on a double buffer right now without any thread priority, and not getting xruns, so not yet sure of bad behavior
-**2/**
+**2/** @NOTimothyLottes
I put in a forced thread sleep between writes to force a xrun, and SNDRV_PCM_IOCTL_WRITEI_FRAMES kernel call then returns -32, in which case I run a SNDRV_PCM_IOCTL_PREPARE and then just get back to the write loop, seems to restore normal playback just fine.
-**3/**
+**3/** @NOTimothyLottes
I reduced asound.h to this basically, the most minimal thing I found I needed. Now I also rename a few things (like structure names), and my IOCTL macros are slightly different in composition than standard.
-**4/**
+**4/** @NOTimothyLottes
After getting this far, it actually looks quite easy, but the route to this was filled with garbage sifting because I couldn't easily find someone else who did this kind of minimalization. I'm only supporting 48KHz stereo 16-bit signed, with double buffering = keep it simple.
diff --git a/archive/threads/NOTimothyLottes/2026-07-02-yuck-starting-on-wdm-ks-audio-interface-for-win32/index.md b/archive/threads/NOTimothyLottes/2026-07-02-yuck-starting-on-wdm-ks-audio-interface-for-win32/index.md
index 6ed14cd..8e77e62 100644
--- a/archive/threads/NOTimothyLottes/2026-07-02-yuck-starting-on-wdm-ks-audio-interface-for-win32/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-02-yuck-starting-on-wdm-ks-audio-interface-for-win32/index.md
@@ -25,23 +25,23 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Yuck, starting on WDM/KS audio interface for WIN32, much more painful than ALSA. But I've been here before. Starting with the include bloat ... the real question is if I'm going to need to file more Wine bugs.
-**2/**
+**2/** @NOTimothyLottes
Wine has a lot of problems with SetConsoleMode() I had to include an extra ENABLE_WRAP_AT_EOL_OUTPUT, and then force a newline right after ASCI ESC[H else it would screw up (and it still does at the end with the ??). But at least the debug is usable now.
-**3/**
+**3/** @NOTimothyLottes
But of course instant bad news, I cannot open the WinMM DRV_QUERYDEVICEINTERFACE, it returned ~0 (INVALID_HANDLE_VALUE). So I'm dead in the water in Wine again. Honestly getting sick of filing bugs in Wine, all the important stuff I do is broken. So what, no games use WDM/KS?
-**4/**
+**4/** @NOTimothyLottes
https://forum.winehq.org/viewtopic.php?t=10225 - Looks like I'm 16 years late to the answer, if they didn't get in WDM/KS in 16 years, certainly it won't happen. Still surprised that all PC games are using the higher level garbage-ware sound APIs on Windows.
diff --git a/archive/threads/NOTimothyLottes/2026-07-03-following-the-succession-thanks-of-re-trying/index.md b/archive/threads/NOTimothyLottes/2026-07-03-following-the-succession-thanks-of-re-trying/index.md
index 61dcd07..1259e0a 100644
--- a/archive/threads/NOTimothyLottes/2026-07-03-following-the-succession-thanks-of-re-trying/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-03-following-the-succession-thanks-of-re-trying/index.md
@@ -25,32 +25,32 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Following the succession (thanks) of re-trying WASAPI using this example which has been pre-minimized and de-C++'ed: https://gist.github.com/mmozeiko/5a5b168e61aff4c1eaec0381da62808f#file-win32_wasapi-h - But I'm missing something on how to get the C++ as C linking to function (cross compiling), doesn't easily work out of the box.
-**2/**
+**2/** @NOTimothyLottes
Of course I'm missing the magic header that does the real work ... curious how messy this will get
-**3/**
+**3/** @NOTimothyLottes
So instead of the massive "mmdeviceapi.h" mess-ware, I defined a stupid CPP_(object,virtual_function_number) macro. This way I just have to write down the index in the VT table for the specific virtual function ...
-**4/**
+**4/** @NOTimothyLottes
Here is initial bring up, function call by function call. No headers, and no C++. The magic of typecasting at usage IC4_(CPP_(... is that I don't ever have to build the headers. That is at least working out well. I do line by line to test in Wine, defer fail handling until later
-**5/**
+**5/** @NOTimothyLottes
More on bring-up. I just run and check visually for output in the console (this time 'B055'). Since compile times are under a second, it is super fast to check as I go. Easy to see how much code bloat there is for C++ this way (doing it manually).
-**6/**
+**6/** @NOTimothyLottes
Example below of how much header bloat I'm factoring out using my simple macros
diff --git a/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-04-NOTimothyLottes-wines-iaudioclient-getdeviceperiod-returns-53333.md b/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-04-NOTimothyLottes-wines-iaudioclient-getdeviceperiod-returns-53333.md
index 1061222..b2d4275 100644
--- a/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-04-NOTimothyLottes-wines-iaudioclient-getdeviceperiod-returns-53333.md
+++ b/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-04-NOTimothyLottes-wines-iaudioclient-getdeviceperiod-returns-53333.md
@@ -26,7 +26,7 @@ parent_post_id: "2073539101320417502"
## Branch
-**1/**
+**1/** @NOTimothyLottes
Wine's IAudioClient::GetDevicePeriod() returns 53333 for minimum (which is 256 samples at 48KHz - really crappy) and 100000 for default (which is 480 samples at 48Khz - even worse), neither which work with EXCLUSIVE mode. Man Wine sucks, nothing but constant show stopping bugs.
diff --git a/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-05-mrsteyk1-once-upon-a-time-wine-didnt-implement-a.md b/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-05-mrsteyk1-once-upon-a-time-wine-didnt-implement-a.md
index fd9f10c..231e157 100644
--- a/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-05-mrsteyk1-once-upon-a-time-wine-didnt-implement-a.md
+++ b/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-05-mrsteyk1-once-upon-a-time-wine-didnt-implement-a.md
@@ -26,7 +26,7 @@ parent_post_id: "2073539101320417502"
## Branch
-**1/**
+**1/** @mrsteyk1
@NOTimothyLottes Once upon a time Wine didn’t implement a particular cryptography path and game broke when trying to verify file integrity, had to patch it out. It was so bad that Valve made a Proton Hotfix version (I think it ignored integrity check and returned success regardless).
diff --git a/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/index.md b/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/index.md
index 1c600f8..4b6ef35 100644
--- a/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/index.md
@@ -25,17 +25,17 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Oh no, maybe another Wine bug (error photo)? I'm also getting an "AUDCLNT_E_DEVICE_IN_USE" (0x8889000A) when http://x.com is open (which would imply pipewire owning the audio device). So still holding out hope that Wine actually tried to emulate exclusive mode ...
-**2/**
+**2/** @NOTimothyLottes
... haha what a joke. Nope, actually at another Wine bug, when my other Linux digital twin can open the audio device with exclusive access, the wine'd version cannot. So I'm back to another actual WINE bug where they return AUDCLNT_E_DEVICE_IN_USE to avoid needing to implement
-**3/**
+**3/** @NOTimothyLottes
Nothing smells more like the 4th of july, than rain and grepping wine source to track down wine bugs. Does look like they just didn't implement EXCLUSIVE mode. Because I'm passing "*duration == *period" ...
@@ -43,6 +43,6 @@ Nothing smells more like the 4th of july, than rain and grepping wine source to
Branches: [[archive/threads/NOTimothyLottes/2026-07-04-oh-no-maybe-another-wine-bug-error-photo-im-also/2026-07-05-mrsteyk1-once-upon-a-time-wine-didnt-implement-a]]
-**4/**
+**4/** @NOTimothyLottes
Wine's IAudioClient::GetDevicePeriod() returns 53333 for minimum (which is 256 samples at 48KHz - really crappy) and 100000 for default (which is 480 samples at 48Khz - even worse), neither which work with EXCLUSIVE mode. Man Wine sucks, nothing but constant show stopping bugs.
diff --git a/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/2026-07-08-nullspector-thats-very-neat-but-is-it-really-true-in-practice.md b/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/2026-07-08-nullspector-thats-very-neat-but-is-it-really-true-in-practice.md
index 02c4a74..78c5d91 100644
--- a/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/2026-07-08-nullspector-thats-very-neat-but-is-it-really-true-in-practice.md
+++ b/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/2026-07-08-nullspector-thats-very-neat-but-is-it-really-true-in-practice.md
@@ -26,11 +26,11 @@ parent_post_id: "2074108624553554387"
## Branch
-**1/**
+**1/** @nullspector
@NOTimothyLottes That's very neat, but is it really true in practice that the max distance between symbols can't exceed 4GB? I think it would be a sane guarantee that it can't, but I assumed the worst and got scared off from the idea...
-**2/**
+**2/** @NOTimothyLottes
@nullspector It’s working thus far, if I find a case it doesn’t work I’ll change it. I keep a different base per library, so likely safe enough.
diff --git a/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/index.md b/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/index.md
index 720a560..ea5b55d 100644
--- a/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-06-vulkan-starts-with-the-ping-pong-between-getting/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Vulkan starts with the ping pong between getting an instance proc addr so one can get vkCreateInstance, then using that to create an instance so one can get the remaining functions. I reuse my Lib() code modified for VK, that keeps a 64-bit base and 32-bit offsets for symbols.
diff --git a/archive/threads/NOTimothyLottes/2026-07-08-oh-my-radv-driver-says-vkgetshaderinfoamd-is/index.md b/archive/threads/NOTimothyLottes/2026-07-08-oh-my-radv-driver-says-vkgetshaderinfoamd-is/index.md
index 54a1999..34ebbbe 100644
--- a/archive/threads/NOTimothyLottes/2026-07-08-oh-my-radv-driver-says-vkgetshaderinfoamd-is/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-08-oh-my-radv-driver-says-vkgetshaderinfoamd-is/index.md
@@ -25,26 +25,26 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Oh, my RADV driver says vkGetShaderInfoAMD is available [GPU disassembly dumps]. Going to be exciting to see how RADV compiler does. Will definitely be filing optimization bugs, would like to help the RADV team make this the best AMD Vulkan driver that can exist.
-**2/**
+**2/** @NOTimothyLottes
One other concern was if RADV would support DEVICE_UNCACHED_BIT_AMD - and looks like RADV already has that, which means low-latency CPU/GPU communication should just work out of the box
-**3/**
+**3/** @NOTimothyLottes
One of the pain points of doing header-free Vulkan is the VkPhysicalDeviceLimits structure. I avoid it completely and replace the structure with an equal size array of 63 64-bit values (504 bytes total). Then use direct byte offset for timestampPeriod (only thing useful in there)
-**4/**
+**4/** @NOTimothyLottes
The other component of vkGetPhysicalDeviceProperties that is useful is the vendorID, which is important for vendor specific engine permutations -> I use to enable vkGetShaderInfoAMD disassembly dumps automatically on all shaders
-**5/**
+**5/** @NOTimothyLottes
Next pre-device opening activity is choosing queue(s). Going to make another effort at beam racing, this time on Linux, so probably want a separate queue for presentation only. To fully decouple {dispatch, and swap}. Will see why later ...
diff --git a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-BigP4P4Smurf-and-preempt-rt.md b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-BigP4P4Smurf-and-preempt-rt.md
index 6bbe4cd..964085f 100644
--- a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-BigP4P4Smurf-and-preempt-rt.md
+++ b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-BigP4P4Smurf-and-preempt-rt.md
@@ -26,7 +26,7 @@ parent_post_id: "2075107966018105449"
## Branch
-**1/**
+**1/** @BigP4P4Smurf
@NOTimothyLottes And PREEMPT_RT
diff --git a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-idoccor-you-can-also-set-nohz-so-theres-no-timer.md b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-idoccor-you-can-also-set-nohz-so-theres-no-timer.md
index 92025e7..663682c 100644
--- a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-idoccor-you-can-also-set-nohz-so-theres-no-timer.md
+++ b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-09-idoccor-you-can-also-set-nohz-so-theres-no-timer.md
@@ -26,7 +26,7 @@ parent_post_id: "2075107966018105449"
## Branch
-**1/**
+**1/** @idoccor
@NOTimothyLottes You can also set nohz so there's no timer interrupts on the isolated cores + set up transparent huge pages (or manually use them)
diff --git a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-10-darrellprograms-i-think-this-is-simply-available-as-a-kmsdrm.md b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-10-darrellprograms-i-think-this-is-simply-available-as-a-kmsdrm.md
index 2dd5222..5b64301 100644
--- a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-10-darrellprograms-i-think-this-is-simply-available-as-a-kmsdrm.md
+++ b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-10-darrellprograms-i-think-this-is-simply-available-as-a-kmsdrm.md
@@ -26,19 +26,19 @@ parent_post_id: "2075107519588933655"
## Branch
-**1/**
+**1/** @darrellprograms
@NOTimothyLottes I think this is simply available as a KMSDRM option in SDL for essentially zero development effort (if your game is built with SDL).
-**2/**
+**2/** @NOTimothyLottes
@darrellprograms Never really understood the desire for zero development effort. As a developer I'm here to practice the art, ideally by pushing the state of the art. But will take looking at SDL source as a good reference if I get lost in the process.
-**3/**
+**3/** @darrellprograms
@NOTimothyLottes I respect that, as long as you know what wheels you're reinventing. Note that you can keep Wayland or X11 running (or both, for that matter) for your dev environment, and just do control-alt-fN switching to test Wayland/X11-independent KMSDRM stuff.
-**4/**
+**4/** @NOTimothyLottes
@darrellprograms Oh I probably have a lot to learn here, building from scratch = understanding deeply. For example I wonder if VT switching fully pages out to clean VRAM, exclusive GPU ownership state.
diff --git a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/index.md b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/index.md
index 2055762..893d9f1 100644
--- a/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/index.md
@@ -25,17 +25,17 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
So most run Linux from a graphical login, I still prefer to boot into a framebuffer console. Next step for me is to get my LottesCode6x12 font into PSF2 so I can use it in a framebuffer terminal for editing source. So I can try for Vulkan swap bringup without X/Wayland.
-**2/**
+**2/** @NOTimothyLottes
If we want a true console or arcade like experience on Linux, you'd want nothing else running on the machine, so running without X/Wayland is the way to do that.
Branches: [[archive/threads/NOTimothyLottes/2026-07-09-so-most-run-linux-from-a-graphical-login-i-still/2026-07-10-darrellprograms-i-think-this-is-simply-available-as-a-kmsdrm]]
-**3/**
+**3/** @NOTimothyLottes
One major option with Linux is the ability for the owner of the box to allow realtime priority scheduling, along with locking memory, and taking CPU cores out of general scheduling. Meaning transform Linux into something as close as possible to a realtime system.
diff --git a/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/2026-07-11-konrad_kubacki_-am-i-having-a-stroke-what-is-this-font-it-feels.md b/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/2026-07-11-konrad_kubacki_-am-i-having-a-stroke-what-is-this-font-it-feels.md
index 1d3b5dc..ef22ff9 100644
--- a/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/2026-07-11-konrad_kubacki_-am-i-having-a-stroke-what-is-this-font-it-feels.md
+++ b/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/2026-07-11-konrad_kubacki_-am-i-having-a-stroke-what-is-this-font-it-feels.md
@@ -26,7 +26,7 @@ parent_post_id: "2075769880092037309"
## Branch
-**1/**
+**1/** @konrad_kubacki_
@NOTimothyLottes Am I having a stroke? What is this font? It feels like reading a captcha. Is it only me?
diff --git a/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/index.md b/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/index.md
index fbf005a..e70d676 100644
--- a/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/index.md
@@ -25,21 +25,21 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Rethinking Vulkan queue choice. Traditional double-buffered games might do something like the code below. Find the queue that does {presentation,graphics,compute}. First off this seems like a lot of unnecessary work when one could just choose queue 0 and be done with it ...
Branches: [[archive/threads/NOTimothyLottes/2026-07-11-rethinking-vulkan-queue-choice/2026-07-11-konrad_kubacki_-am-i-having-a-stroke-what-is-this-font-it-feels]]
-**2/**
+**2/** @NOTimothyLottes
AMD on Linux (RADV) and Windows. Queue 0 just works. But note both platforms support doing present on queue 1. So on AMD I'm likely going to render via compute on queue 0 [to reduce chance of preemption] and present on queue 1. And have both decoupled (for front buffer rendering)
-**3/**
+**3/** @NOTimothyLottes
NVIDIA is more complex. They put a DMA engine in queue 1 slot, and compute engine in queue 2 slot. Some sometimes queue 2 slot can or cannot do present (varies by driver). So maybe present on 0 (gfx queue), and dispatch on queue 2 by default for NV.
diff --git a/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-bkaradzic-much-clearer.md b/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-bkaradzic-much-clearer.md
index 9c5cede..1caacbd 100644
--- a/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-bkaradzic-much-clearer.md
+++ b/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-bkaradzic-much-clearer.md
@@ -26,7 +26,7 @@ parent_post_id: "2076833886827376782"
## Branch
-**1/**
+**1/** @bkaradzic
@NOTimothyLottes Much clearer... 🤣
diff --git a/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-noop_dev-at-this-point-could-make-a-dsl-with-perl.md b/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-noop_dev-at-this-point-could-make-a-dsl-with-perl.md
index 8bc98d4..14a5624 100644
--- a/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-noop_dev-at-this-point-could-make-a-dsl-with-perl.md
+++ b/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/2026-07-14-noop_dev-at-this-point-could-make-a-dsl-with-perl.md
@@ -26,7 +26,7 @@ parent_post_id: "2076833886827376782"
## Branch
-**1/**
+**1/** @noop_dev
@NOTimothyLottes At this point could make a DSL with Perl..
diff --git a/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/index.md b/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/index.md
index 25fb1bb..6f16110 100644
--- a/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-13-going-all-in-to-only-if-goto-but-through-better/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Going all in to only {if,goto} but through better macros,
label:
@@ -37,17 +37,17 @@ Can fix up nanorc syntax highlight by layering rules that override color, works
-**2/**
+**2/** @NOTimothyLottes
Haha no surprise they didn't invite me to the "better software" conference!
-**3/**
+**3/** @NOTimothyLottes
Easy set of powerful macros. Brutal customization of C.
-**4/**
+**4/** @NOTimothyLottes
Example usage after clean-up.
diff --git a/archive/threads/NOTimothyLottes/2026-07-13-ill-mark-this-down-a-more-code-obfustication-for/index.md b/archive/threads/NOTimothyLottes/2026-07-13-ill-mark-this-down-a-more-code-obfustication-for/index.md
index 93f8356..f3c9195 100644
--- a/archive/threads/NOTimothyLottes/2026-07-13-ill-mark-this-down-a-more-code-obfustication-for/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-13-ill-mark-this-down-a-more-code-obfustication-for/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
I'll mark this down a more code obfustication for most humans, but for me it's another useful shorthand.
define X_ return
@@ -33,12 +33,12 @@ define G_(x) goto x
-**2/**
+**2/** @NOTimothyLottes
Not been happy with traditional C style {if,while,do,switch,for} so moving to more assembly style {if,goto} instead. This way static branch prediction {backward=taken,forward=not_taken} is more explicit in the code. Prototyping it in the Library loader below
-**3/**
+**3/** @NOTimothyLottes
Another quality of life change, exit with error now triggers the background console render thread to actually quit, so it always draws the console, then draws the error code, then exits.
diff --git a/archive/threads/NOTimothyLottes/2026-07-14-another-round-of-getting-optimized-error-checking/index.md b/archive/threads/NOTimothyLottes/2026-07-14-another-round-of-getting-optimized-error-checking/index.md
index ed98587..f641e28 100644
--- a/archive/threads/NOTimothyLottes/2026-07-14-another-round-of-getting-optimized-error-checking/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-14-another-round-of-getting-optimized-error-checking/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Another round of getting optimized error checking. Disassembly [after syscall] shows that it works.
(1.) Volatile store __LINE__
@@ -36,29 +36,29 @@ AS_MINIMAL_AS_ONE_CAN_GET
-**2/**
+**2/** @NOTimothyLottes
A macro cheat sheet to try to explain how it works ...
-**3/**
+**3/** @NOTimothyLottes
I have a collection of force inline wrappers that test returns from syscalls/functions for error and return the return. These all leverage builtin_expect so the compiler knows to make them fall through in the common case.
-**4/**
+**4/** @NOTimothyLottes
Those force inlines call Err() on terminal error. The Err() function ensures the {__LINE__, error} stores are visible, then triggers the console drawing code to kill the app with printed error. Then it sleeps until the termination.
-**5/**
+**5/** @NOTimothyLottes
Compiler eventually screws up, but at least it gets the fast path correct, and the slow error path gets an extra call. Effectively it conditionally forward branches to a distant call to Err() instead of just branching to the Err().
-**6/**
+**6/** @NOTimothyLottes
So I can liter error checks around stuff with little actual cost,
(1.) Two stores
diff --git a/archive/threads/NOTimothyLottes/2026-07-15-one-advantage-of-sar-aka-signed-is-that-the-shift/index.md b/archive/threads/NOTimothyLottes/2026-07-15-one-advantage-of-sar-aka-signed-is-that-the-shift/index.md
index 5501d78..6f61c31 100644
--- a/archive/threads/NOTimothyLottes/2026-07-15-one-advantage-of-sar-aka-signed-is-that-the-shift/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-15-one-advantage-of-sar-aka-signed-is-that-the-shift/index.md
@@ -25,23 +25,23 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
One advantage of SAR (aka signed '>>') is that the shift-by operand HW uses only the 5|6 LSBs automatically. So if you have a mixed used control word, you don't have to mask out the MSBs. Can save an instruction.
-**2/**
+**2/** @NOTimothyLottes
Working through an idea of a single uber-instruction interpreted language for code generation. Meaning something that never misses the instruction cache and executes fully out of the micro-op cache. Fully data driven with a direct map 64k entry symbol table.
-**3/**
+**3/** @NOTimothyLottes
Borrows some ideas from SIMD GPU programming. Like instead of branching/predicating to avoid stores, just store to a discarded area (like a negative offset on the GPU, or a designated trash address on the CPU).
-**4/**
+**4/** @NOTimothyLottes
Don't want exit condition logic in the infinite loop, so exit will have to be having the program store an exit value into a set address, and an external watchdog polling for exit at some sleep frequency.
-**5/**
+**5/** @NOTimothyLottes
SAR on a control word can in theory grab 3 values.
SF (sign flag) is set to MSB bit
diff --git a/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/2026-07-18-furan-sorry-for-the-tangent-what-is-this-font-and-where.md b/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/2026-07-18-furan-sorry-for-the-tangent-what-is-this-font-and-where.md
index 1013a49..eccea82 100644
--- a/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/2026-07-18-furan-sorry-for-the-tangent-what-is-this-font-and-where.md
+++ b/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/2026-07-18-furan-sorry-for-the-tangent-what-is-this-font-and-where.md
@@ -26,15 +26,15 @@ parent_post_id: "2078257788732461389"
## Branch
-**1/**
+**1/** @furan
@NOTimothyLottes sorry for the tangent - what is this font and where can I get it?
-**2/**
+**2/** @NOTimothyLottes
@furan It’s one of mine (bitmap front for 640x480 resolution CRT) if I ever figure out some good web hosting again I could put up
-**3/**
+**3/** @furan
@NOTimothyLottes or github, I host a bunch of bitmap fonts here: https://github.com/ianhan/bitmapfonts
diff --git a/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/index.md b/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/index.md
index ecf1657..000741e 100644
--- a/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-17-oh-f-it-the-urge-to-drop-the-c-baggage-was-too/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Oh, F-it! The urge to drop the C baggage was too strong, using nasm to bootstrap another radical Forth for Linux. Will see how far I can get in a 4 KiB binary to start. Apparently this wants to exist, and I have no choice but to lend some fingers. ELF64 out of the way.
diff --git a/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/2026-07-18-noop_dev-even-smaller-code-size-possible-with-custom.md b/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/2026-07-18-noop_dev-even-smaller-code-size-possible-with-custom.md
index ee3d6a2..098c5c6 100644
--- a/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/2026-07-18-noop_dev-even-smaller-code-size-possible-with-custom.md
+++ b/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/2026-07-18-noop_dev-even-smaller-code-size-possible-with-custom.md
@@ -26,7 +26,7 @@ parent_post_id: "2078349730204078527"
## Branch
-**1/**
+**1/** @noop_dev
@NOTimothyLottes Even smaller code size possible with custom compression scheme, where you design bytecode not for immediate execution but to be decompressed on load.
diff --git a/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/index.md b/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/index.md
index eb7050f..cf6b1cf 100644
--- a/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-18-all-0-6-argument-syscall-options-in-32-bytes/index.md
@@ -25,19 +25,19 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
All {0-6} argument syscall options in 32-bytes. The plan is to embed the interpreter inside the words with a 3-byte overhead {AD (lodsd), FF E0 (jmp rax)} so levering lots of x86-64 stuff for minimal size
-**2/**
+**2/** @NOTimothyLottes
Everything forced in lower 32-bit, but still building around 64-bit support. Since I'm not using x86-64 CALL/RET I can free up the stack ops strictly for the data stack.
-**3/**
+**3/** @NOTimothyLottes
I realized at some point I can have most interpreted forth-style words in an aligned 8-bytes. So can make a very small interpreter.
diff --git a/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/2026-07-19-noop_dev-these-instrs-are-anything-but-fast-and-if-you.md b/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/2026-07-19-noop_dev-these-instrs-are-anything-but-fast-and-if-you.md
index e6d4a43..a9905ac 100644
--- a/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/2026-07-19-noop_dev-these-instrs-are-anything-but-fast-and-if-you.md
+++ b/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/2026-07-19-noop_dev-these-instrs-are-anything-but-fast-and-if-you.md
@@ -26,35 +26,35 @@ parent_post_id: "2078729662021111958"
## Branch
-**1/**
+**1/** @noop_dev
@NOTimothyLottes These instrs are anything but fast and if you want both "fast" and compact you run a separate decoding pass where you expand custom bytecode into target instructions that suck less.
-**2/**
+**2/** @NOTimothyLottes
@noop_dev Basic truth: if the program is tiny and dependency free (ie intrinsically not just glue for libraries) it’s probably already fast even if the machine isn’t. And for the things that need perf there is always assembly
-**3/**
+**3/** @noop_dev
@NOTimothyLottes Anyway, I am trying you to sell the idea of bytecode-driven macroassembler that expands "macros" on load. Like I did with 4K atari 2600 emu ~20 years ago.. some demosceners I knew also adopted the idea..
-**4/**
+**4/** @NOTimothyLottes
@noop_dev Many of my other systems had been such that interpreted source generates raw code then executes the code (all at once after code is fully processed). Effectively forth as a macro language and instruction generator, runtime assembler.
-**5/**
+**5/** @NOTimothyLottes
@noop_dev But for cold cache stuff it’s easy to burn more time in binary generation than it would cost to do simple interpreter.
-**6/**
+**6/** @noop_dev
@NOTimothyLottes Not sure I can understand how cold cache matters for a linear transformation of a relatively small # of bytes.
-**7/**
+**7/** @NOTimothyLottes
@noop_dev If it’s a byte that indexes into say a fixed size physical instruction, yeah it’s just a decompression of source code, sure easy to do fast. Im talking more the multi-branch miss per instruction stuff.
-**8/**
+**8/** @NOTimothyLottes
@noop_dev Meaning “mov edi,[rax-0x32]” could be generated from 4 symbol lookups (2 for regs, one for offset, one for instruction). Also my intent here is for GPU code generation for AMD GPUs where youd have sometimes 8+ bitfields in an opcode. So the simple stuff won’t work there …
diff --git a/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/index.md b/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/index.md
index 5f22c1b..1feafe8 100644
--- a/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-19-probably-shouldnt-consider-this-but-apparently/index.md
@@ -25,17 +25,17 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Probably shouldn't consider this -BUT- apparently writing to ax doesn't change the other 48-bits. So one could do a 4-byte overhead interpreter with a 64KiB aligned window of directly jumpable words like this below. [rsi]=addresses to jump to. You'd pay the false dependency stall
-**2/**
+**2/** @NOTimothyLottes
It's interesting because it cuts interpreted source size in half. Ie a stream of 16-bit offsets instead of 32-bit addresses.
-**3/**
+**3/** @NOTimothyLottes
The aim of course, keep the stuff that doesn't need to go fast optimized instead for low complexity and low size (aka interpreted forth), and keep the stuff that needs to go fast, at peak, assembly. Hits 2 extremes well.
diff --git a/archive/threads/NOTimothyLottes/2026-07-22-working-through-rough-draft-of-assembly-for-a/index.md b/archive/threads/NOTimothyLottes/2026-07-22-working-through-rough-draft-of-assembly-for-a/index.md
index ba23b21..af53505 100644
--- a/archive/threads/NOTimothyLottes/2026-07-22-working-through-rough-draft-of-assembly-for-a/index.md
+++ b/archive/threads/NOTimothyLottes/2026-07-22-working-through-rough-draft-of-assembly-for-a/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Working through rough draft of assembly for a different idea for a micro macro-forth.
1. 8-bit/word (color to relay meaning)
@@ -36,7 +36,7 @@ Working through rough draft of assembly for a different idea for a micro macro-f
-**2/**
+**2/** @NOTimothyLottes
5. Compile step is branch-free
6. Compiles to branch-free x86-64 source
@@ -44,14 +44,14 @@ Working through rough draft of assembly for a different idea for a micro macro-f
Noticed that I can pre-compile all the dictionary words into a lookup table. So actual compile just writes unaligned 8-bytes but only advances the write pointer by the actual size
-**3/**
+**3/** @NOTimothyLottes
The interesting bits about this micro project was factoring out all branches, using branch-free interpreter loop to inline all calls so later execution is linear. Got messy doing a branch free software return stack. But costs are relatively low (40 ops/character)
-**4/**
+**4/** @NOTimothyLottes
Intended usage would be for tiny-gramming programs in self contained chunks that include their own code generation (effectively a macro-forth used to generate machine code).
-**5/**
+**5/** @NOTimothyLottes
A language that you author in a compressed space directly. So Whitney-esk in using lots of single character variables (or double character with page characters) -BUT- very non-Whitney in that it has no higher order array constructs
diff --git a/archive/threads/NOTimothyLottes/2026-08-02-re-fpga-land-alus-im-firmly-distracted-by-an/index.md b/archive/threads/NOTimothyLottes/2026-08-02-re-fpga-land-alus-im-firmly-distracted-by-an/index.md
index 8cd202f..5835495 100644
--- a/archive/threads/NOTimothyLottes/2026-08-02-re-fpga-land-alus-im-firmly-distracted-by-an/index.md
+++ b/archive/threads/NOTimothyLottes/2026-08-02-re-fpga-land-alus-im-firmly-distracted-by-an/index.md
@@ -25,58 +25,58 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @NOTimothyLottes
Re-FPGA-land ALUs - I'm firmly distracted by an alternative history of the unexplored left justified extreme fixed point. Where signed integer numbers represent {-1.0 to <1.0}. Where the primary IMAD op includes a huge fixed signed right shift ...
-**2/**
+**2/** @NOTimothyLottes
For those planted in the right-justified current fixed point timeline, your bytes get loaded into the LSBs, and your addressing uses the LSBs. The idea of doing the reverse of this is probably completely alien -> loading smaller bit types into the MSBs first ...
-**3/**
+**3/** @NOTimothyLottes
Meaning standard integer thinking is to start with small things like an index and scale that by the stride into a larger number. But with what I'm suggesting you start with something large and instead make it smaller.
-**4/**
+**4/** @NOTimothyLottes
In a traditional right-justified CPU, you'd have three ops {MUL, ADD, SHR} which could be reduced to {IMAD, SHR}, but would be just one op on a left justified machine. Meaning doing 'fixed point' stuff is a bit faster.
-**5/**
+**5/** @NOTimothyLottes
32-bit left justified machine, can easily leverage say a 18-bit * 25-bit multiplier (Xlinix DSP) because the MSBs are always fed in, and the useful MSBs are always pulled out of the accumulator (P). Right justified machines really need that full 32-bit x 32-bit MUL
-**6/**
+**6/** @NOTimothyLottes
Left justified variable bit-width loads make a lot more sense, partly because the LSBs index into bits (or sub-bits depending on mapping) effectively (instead of bytes), and one can do {4/8/16/32-bit} extraction with 8 SLICES and one CLB deep [a lot easier than right-justified]
-**7/**
+**7/** @NOTimothyLottes
The core normalized IMAD can easily be made -/+ symmetrical simply by feeding in truncated LSBs of the add operand with simple logic based on MSBs of mul operands. In the example below the {-4} represents {-1.0}. Of course -4*-4 overflows to -4 [2's comp]
-**8/**
+**8/** @NOTimothyLottes
Predicate/bool logic becomes {0.0, -1.0} based, can leverage {a+b} wrap around to implement XOR, and -(a*b) to implement AND.
-**9/**
+**9/** @NOTimothyLottes
Doing a "perspective divide" {s=x/z} can be transformed into a scaled perspective divide {s=x*(a/z)} to work around the {-1.0 to <1.0} range limitation. And one can transform the divide into a binary search for 's' - specifically largest 's' where {s*z<=x*a}
-**10/**
+**10/** @NOTimothyLottes
Notice this binary search test takes just one IMAD {s*z+t} where t=-x*a. Meaning a smart machine can do a test step in 2 ops on a DSP (one IMAD for the test, the next to ADD to 's' for the next search step) ...
-**11/**
+**11/** @NOTimothyLottes
Which requires the opcode ISA to have a latched delayed write to the register file that is conditional on the sign bit of a later IMAD op. This can make binary search for things like sqrt(x) also just as fast.
-**12/**
+**12/** @NOTimothyLottes
I think there are ways to transcend typical integer machine IPCs by having uber ops in the ISA (this left-justified machine has a 1-clock {MUL,ADD,SHIFT,+ signed conditional register STORE,+ extra modifiers (like NOT)}. But still have extremely simple implementations.
diff --git a/archive/threads/SebAaltonen/2024-04-04-this-is-how-slow-code-feels-like/index.md b/archive/threads/SebAaltonen/2024-04-04-this-is-how-slow-code-feels-like/index.md
index 77350cf..70f29ca 100644
--- a/archive/threads/SebAaltonen/2024-04-04-this-is-how-slow-code-feels-like/index.md
+++ b/archive/threads/SebAaltonen/2024-04-04-this-is-how-slow-code-feels-like/index.md
@@ -25,28 +25,28 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @SebAaltonen
This is how slow code feels like:
-**2/**
+**2/** @SebAaltonen
And this is how clever you feel after finding the optimization:
-**3/**
+**3/** @MartinJIFuller
@SebAaltonen Sad that the compiler isn’t doing this for us in 2024
-**4/**
+**4/** @NOTimothyLottes
@MartinJIFuller @SebAaltonen On https://mastodon.gamedev.place/@NOTimothyLottes I'm collecting posts with AMD GPU disassembly dumps for a book on everything the shader compiler 'isn't doing'. Constant AMD GPU compiler perf bug SPAM is a key part of my online strategy to keep a low follower count.
-**5/**
+**5/** @MartinJIFuller
@NOTimothyLottes @SebAaltonen A worthwhile project, knowledge well worth sharing, but is a book the right format? Perhaps yes, just thinking out loud.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ASupersay-who-cares-do-what-makes-you-happiest-and.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ASupersay-who-cares-do-what-makes-you-happiest-and.md
index ac650fe..db1fc83 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ASupersay-who-cares-do-what-makes-you-happiest-and.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ASupersay-who-cares-do-what-makes-you-happiest-and.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @ASupersay
@SebAaltonen Who cares? Do what makes you happiest and wealthiest.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-i-wish-visual-studio-had-better-code-context.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-i-wish-visual-studio-had-better-code-context.md
index d2dc3d6..09c49d1 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-i-wish-visual-studio-had-better-code-context.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-i-wish-visual-studio-had-better-code-context.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @AronThoughts
@SebAaltonen I wish visual studio had better code context colorization. At one point I was using a source editor called source insight. It had amazing code colorization and I had this theme where warm/cool colors meant certain things so I could instantly look at a variable know about it
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-static-globals-defines-were-warm-members-blue.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-static-globals-defines-were-warm-members-blue.md
index 005514c..b62b142 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-static-globals-defines-were-warm-members-blue.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-static-globals-defines-were-warm-members-blue.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @AronThoughts
@SebAaltonen Static/globals/#defines were warm
Members blue hues
@@ -37,11 +37,11 @@ Namespaces dotted underlined
Static methods purple/red
etc
-**2/**
+**2/** @SebAaltonen
@AronThoughts Indeed. Good color coding is important for readability too. IDEs do this very well.
-**3/**
+**3/** @AronThoughts
@SebAaltonen Most IDEs I've used since dont have this level of specificity though but I've not used many different ones
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BenQett-the-only-good-faith-reply-is-if-youre-a-systems.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BenQett-the-only-good-faith-reply-is-if-youre-a-systems.md
index a78f209..e33050f 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BenQett-the-only-good-faith-reply-is-if-youre-a-systems.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BenQett-the-only-good-faith-reply-is-if-youre-a-systems.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @BenQett
@SebAaltonen The only good faith reply is if you’re a systems engineer and you have to work on remote servers with no ability to run an IDE/Desktop so you’re stuck with VIM (can’t reverse tunnel/mount)
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BugoTheCat-nothing-wrong-with-new-tools-its-just-that-most.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BugoTheCat-nothing-wrong-with-new-tools-its-just-that-most.md
index f63c767..295f377 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BugoTheCat-nothing-wrong-with-new-tools-its-just-that-most.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BugoTheCat-nothing-wrong-with-new-tools-its-just-that-most.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @BugoTheCat
@SebAaltonen Nothing wrong with new tools, it's just that most people get used to them and can never go back. It then feels to them like the old ways were horrific or they have an exaggerated negative response about the past.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CobraSwims-same-reason-some-large-corps-demand-that-we-have.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CobraSwims-same-reason-some-large-corps-demand-that-we-have.md
index fb9bfc4..f3e6872 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CobraSwims-same-reason-some-large-corps-demand-that-we-have.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CobraSwims-same-reason-some-large-corps-demand-that-we-have.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @CobraSwims
@SebAaltonen Same reason some large corps demand that we have specific paths for random shit we all use autocomplete for.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CptCrabhands-you-should-write-your-code-on-paper-by-hand.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CptCrabhands-you-should-write-your-code-on-paper-by-hand.md
index a63bbd0..f4dc2e1 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CptCrabhands-you-should-write-your-code-on-paper-by-hand.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CptCrabhands-you-should-write-your-code-on-paper-by-hand.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @CptCrabhands
@SebAaltonen You should write your code on paper by hand 😤 totally
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-DarthJahus-being-able-to-code-without-assistant-is-a-good.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-DarthJahus-being-able-to-code-without-assistant-is-a-good.md
index 5164ce4..312785c 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-DarthJahus-being-able-to-code-without-assistant-is-a-good.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-DarthJahus-being-able-to-code-without-assistant-is-a-good.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @DarthJahus
@SebAaltonen Being able to code without assistant is a good thing, maybe?
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Desxon1-still-remember-how-my-technical-school-assigned-a.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Desxon1-still-remember-how-my-technical-school-assigned-a.md
index 1ebc20f..e05992b 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Desxon1-still-remember-how-my-technical-school-assigned-a.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Desxon1-still-remember-how-my-technical-school-assigned-a.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Desxon1
@SebAaltonen Still remember how my technical school assigned a literal psychopath to teach us do databases. The SQL was done ON FUCKING PAPER and he graded each and every point of it. A lack of "," could cost ya points.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Enhex-because-high-arrogance-low-intelligence.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Enhex-because-high-arrogance-low-intelligence.md
index 1969348..0fdf3b8 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Enhex-because-high-arrogance-low-intelligence.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Enhex-because-high-arrogance-low-intelligence.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Enhex
@SebAaltonen because high arrogance + low intelligence
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Floppie7th-cant-stand-ides-honestly-i-wouldnt-use-notepad.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Floppie7th-cant-stand-ides-honestly-i-wouldnt-use-notepad.md
index b12887c..0330ddf 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Floppie7th-cant-stand-ides-honestly-i-wouldnt-use-notepad.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Floppie7th-cant-stand-ides-honestly-i-wouldnt-use-notepad.md
@@ -26,17 +26,17 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Floppie7th
@SebAaltonen Can't stand IDEs, honestly. I wouldn't use Notepad because its navigation is horrible, but autocomplete doesn't save any time (typing isn't really a bottleneck), gdb and debug prints are great for debugging, and finding a definition with CTRL+Z followed rg 'whatever' works great
-**2/**
+**2/** @SebAaltonen
@Floppie7th If your tool has code navigation (find symbols, find callers, etc) and color colorization then it is an IDE.
Autocomplete is not a big deal. Code navigation tools and code colorization are the most important things. Writing code is not as important as reading & browsing code.
-**3/**
+**3/** @Floppie7th
@SebAaltonen Starting by mentioning autocomplete and built-in debuggers, then defining IDE as "code colorization", seems like moving the goalposts pretty far.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-GumboatDiplomat-i-pretty-much-agree-with-you-but-i-started-using.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-GumboatDiplomat-i-pretty-much-agree-with-you-but-i-started-using.md
index a793fb1..bd700ad 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-GumboatDiplomat-i-pretty-much-agree-with-you-but-i-started-using.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-GumboatDiplomat-i-pretty-much-agree-with-you-but-i-started-using.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @GumboatDiplomat
@SebAaltonen I pretty much agree with you, but I started using nvim recently, and it doesn't have an LSP for the a language that I already know very well (gml) And I did learn stuff forgoing the autocomplete, I feel like my knowledge deepened, if that makes sense.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-IlyasHairline-to-flex-on-others.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-IlyasHairline-to-flex-on-others.md
index d48187e..1d1e30b 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-IlyasHairline-to-flex-on-others.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-IlyasHairline-to-flex-on-others.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @IlyasHairline
@SebAaltonen To flex on others
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Jerroudi_Yass-i-remember-having-an-argument-with-one-of-the.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Jerroudi_Yass-i-remember-having-an-argument-with-one-of-the.md
index 0988840..da0e169 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Jerroudi_Yass-i-remember-having-an-argument-with-one-of-the.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Jerroudi_Yass-i-remember-having-an-argument-with-one-of-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1786349827669790823"
## Branch
-**1/**
+**1/** @Jerroudi_Yass
@SebAaltonen I remember having an argument with one of the staffs of 42 about allowing the usage of debuggers in exams as he was totally against the idea leaving us with printf debugging in a 2h exam session. I never understood why there is so much hate/reluctance about the usage of debuggers
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Junts-as-a-kid-i-thought-coding-seemed-cool-and-wrote-a.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Junts-as-a-kid-i-thought-coding-seemed-cool-and-wrote-a.md
index 6688f08..5f790ec 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Junts-as-a-kid-i-thought-coding-seemed-cool-and-wrote-a.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Junts-as-a-kid-i-thought-coding-seemed-cool-and-wrote-a.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Junts
@SebAaltonen As a kid I thought coding seemed cool and wrote a 30 second program in basic in a text file I renamed to an .exe. it was so aggravating that I decided programming was a pain
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-KasperArnklit-gate-keeping-programming-and-thinking-it-makes.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-KasperArnklit-gate-keeping-programming-and-thinking-it-makes.md
index 8a2ae5d..605815c 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-KasperArnklit-gate-keeping-programming-and-thinking-it-makes.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-KasperArnklit-gate-keeping-programming-and-thinking-it-makes.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @KasperArnklit
@SebAaltonen Gate keeping programming and thinking it makes you special is incredibly sad.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Kinker_0-theres-a-big-difference-between-being-able-to-and.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Kinker_0-theres-a-big-difference-between-being-able-to-and.md
index 1cf9176..93c7a88 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Kinker_0-theres-a-big-difference-between-being-able-to-and.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Kinker_0-theres-a-big-difference-between-being-able-to-and.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Kinker_0
@SebAaltonen There's a big difference between "being able to" and actually doing it.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Lascif-people-have-a-superiority-complex-for-working-in.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Lascif-people-have-a-superiority-complex-for-working-in.md
index d18a213..794fc7b 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Lascif-people-have-a-superiority-complex-for-working-in.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Lascif-people-have-a-superiority-complex-for-working-in.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Lascif
@SebAaltonen People have a superiority complex for working in the hardest way possible because “that’s how I had to do it”.
They forget that they should work smarter not harder.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-MacGyver1618-you-should-be-able-to-code-in-notepad-just-so-you.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-MacGyver1618-you-should-be-able-to-code-in-notepad-just-so-you.md
index 7589d88..ce4dd24 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-MacGyver1618-you-should-be-able-to-code-in-notepad-just-so-you.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-MacGyver1618-you-should-be-able-to-code-in-notepad-just-so-you.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @MacGyver1618
@SebAaltonen You should be able to code in Notepad just so you can truly relish the joy of not having to.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Naam_Hai_Bulla-major-disagree-especially-if-youre-learning-a-new.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Naam_Hai_Bulla-major-disagree-especially-if-youre-learning-a-new.md
index 52660e9..e601e9a 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Naam_Hai_Bulla-major-disagree-especially-if-youre-learning-a-new.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Naam_Hai_Bulla-major-disagree-especially-if-youre-learning-a-new.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Naam_Hai_Bulla
@SebAaltonen MAJOR DISAGREE
Especially if you're learning a new tech stack modern IDEs are too user friendly
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Natnew7-you-shouldnt-have-to-code-this-way-for-serious.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Natnew7-you-shouldnt-have-to-code-this-way-for-serious.md
index 80f9eaf..7825a2e 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Natnew7-you-shouldnt-have-to-code-this-way-for-serious.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Natnew7-you-shouldnt-have-to-code-this-way-for-serious.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Natnew7
@SebAaltonen You shouldn’t have to code this way for serious projects. But you should be capable of it.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-NeutralRational-hes-a-boomer.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-NeutralRational-hes-a-boomer.md
index 78ea11c..82cff85 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-NeutralRational-hes-a-boomer.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-NeutralRational-hes-a-boomer.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @NeutralRational
@SebAaltonen He's a boomer.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Niko_sk2x-i-think-the-point-is-that-you-should-be-able-to.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Niko_sk2x-i-think-the-point-is-that-you-should-be-able-to.md
index 913e6b3..3ef4962 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Niko_sk2x-i-think-the-point-is-that-you-should-be-able-to.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Niko_sk2x-i-think-the-point-is-that-you-should-be-able-to.md
@@ -26,35 +26,35 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Niko_sk2x
@SebAaltonen I think the point is that you should be able to code well enough that IDE is a tool to help you and make you more efficient, not a tool that allows you to do it at all - you can still do it without an IDE, it's just slow and annoying. If you can't at all, that's not a good sign
-**2/**
+**2/** @SebAaltonen
@Barteks2x There's no real difference in practice. Of course I could write code on notepad and press space 4 times manually. The main problem with notepad is not writing code. It's reading code. And coding is 90% reading, 10% writing. Color coding, jumping to symbols, etc.
-**3/**
+**3/** @SebAaltonen
@Barteks2x Reading a big code base with notepad is super painful, as you have to open the cmake file to see where the includes actually are and then find the .cpp files if you need to investigate further. That's over 10x slower reading experience in big code base.
-**4/**
+**4/** @SebAaltonen
@Barteks2x For a new junior programmer it is super important that their code reading experience is as good as possible so that they learn the big code base as quickly as possible. Thus they should use an IDE. Seniors should not ask them to use notepad instead to learn it. That's just stupid
-**5/**
+**5/** @SebAaltonen
@Barteks2x It doesn't really matter if a programmer can't write code on notepad, as they should never be doing that in any reasonably sized project. Their productivity when reading code is so much worse, and reading is 90% of the job.
-**6/**
+**6/** @Niko_sk2x
@SebAaltonen Yes you shouldn't ever need to do that for anything nontrivial. But I've seen people who could just about get by with an IDE and seemingly able to do some things but not able to write a "hello world" without an IDE. The IDE was hiding real issues here.
-**7/**
+**7/** @SebAaltonen
@Barteks2x When I am hiring a junior, I wouldn't want to make them code in notepad without Google, because nobody actually does that. If it was a code assignment, we can sit down and they can explain what their code does and why. I can also check their hobby projects in github.
-**8/**
+**8/** @Niko_sk2x
@SebAaltonen Sure there definitely are easier and more reliable ways to judge someone's skill. It's not particularly good test of anything but still something you should be bake to do to some extent, at least a "hello world" and some other trivial programs.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-OscarBR92-to-assert-dominance.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-OscarBR92-to-assert-dominance.md
index 4d5e610..555791c 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-OscarBR92-to-assert-dominance.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-OscarBR92-to-assert-dominance.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @OscarBR92
@SebAaltonen To assert dominance
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-PurpleNinjaGrrl-nothing-has-more-forever-a-junior-level.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-PurpleNinjaGrrl-nothing-has-more-forever-a-junior-level.md
index f205664..86d2dc2 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-PurpleNinjaGrrl-nothing-has-more-forever-a-junior-level.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-PurpleNinjaGrrl-nothing-has-more-forever-a-junior-level.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @PurpleNinjaGrrl
@SebAaltonen Nothing has more forever-a-junior-level-programmer energy than “You should spend more time and energy looking up API calls and typing console commands instead of using that time to iterate on your design and improve your code” takes
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-RatherSnideBun-that-is-just-another-it-twitter-bait-just-mute-or.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-RatherSnideBun-that-is-just-another-it-twitter-bait-just-mute-or.md
index 083f4a3..92b09fa 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-RatherSnideBun-that-is-just-another-it-twitter-bait-just-mute-or.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-RatherSnideBun-that-is-just-another-it-twitter-bait-just-mute-or.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @RatherSnideBun
@SebAaltonen That is just another IT-twitter bait, just mute or block him, he is fuckwad.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-SebAaltonen-i-could-write-all-my-code-in-assembler-too-but.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-SebAaltonen-i-could-write-all-my-code-in-assembler-too-but.md
index c98320b..2ad5459 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-SebAaltonen-i-could-write-all-my-code-in-assembler-too-but.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-SebAaltonen-i-could-write-all-my-code-in-assembler-too-but.md
@@ -26,15 +26,15 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @SebAaltonen
I could write all my code in assembler too. But why would I do that? Modern tools give me better productivity so I use them instead. I know how to read assembly when debugging code, but I want my compiler to write it.
-**2/**
+**2/** @SebAaltonen
I personally use git from command line, but when I need to look at the history or solve a merge conflict, I jump into a modern GUI to do those tasks. GUI is just so much more productive for those tasks.
-**3/**
+**3/** @SebAaltonen
Professional programmer knows how to use the best tools to make them productive. This includes IDEs, debuggers, profilers, sanitizers, version control, etc, etc. And Google too (for API docs, etc). A 10x coder isn't sitting in dark room with terminal. They know how all the tools.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Shrikanthabudya-chill-bro-its-an-engagement-bait.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Shrikanthabudya-chill-bro-its-an-engagement-bait.md
index 91fd8f3..f263bb5 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Shrikanthabudya-chill-bro-its-an-engagement-bait.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Shrikanthabudya-chill-bro-its-an-engagement-bait.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Shrikanthabudya
@SebAaltonen chill bro it's an engagement bait
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tankerbot-yeah-if-its-available-use-it-though-in-my-case-i.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tankerbot-yeah-if-its-available-use-it-though-in-my-case-i.md
index 40f6d4e..40e3882 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tankerbot-yeah-if-its-available-use-it-though-in-my-case-i.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tankerbot-yeah-if-its-available-use-it-though-in-my-case-i.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Tankerbot
@SebAaltonen Yeah if it's available use it. Though in my case I end up using Notepad (Notepad++) for most of the C++ stuff I code mostly because it's Nintendo DS/DSi homebrew and setting them up in a IDE would be a pain given the build system they use so I've never bothered doing it. :P
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-TechTolley-old-guys-trying-to-act-like-their-depreciating.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-TechTolley-old-guys-trying-to-act-like-their-depreciating.md
index 04dd01c..28e8e85 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-TechTolley-old-guys-trying-to-act-like-their-depreciating.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-TechTolley-old-guys-trying-to-act-like-their-depreciating.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @TechTolley
@SebAaltonen Old guys trying to act like their depreciating skillset makes them more valuable... somehow...
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ThePunkHucker-its-a-showcase-of-the-im-stronger-than-you.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ThePunkHucker-its-a-showcase-of-the-im-stronger-than-you.md
index 884b375..239ff70 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ThePunkHucker-its-a-showcase-of-the-im-stronger-than-you.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ThePunkHucker-its-a-showcase-of-the-im-stronger-than-you.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @ThePunkHucker
@SebAaltonen It’s a showcase of the « I’m stronger than you » syndrome so many programmers have. It’s stupid.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tuuveee-for-the-first-few-months-of-my-first-web.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tuuveee-for-the-first-few-months-of-my-first-web.md
index aa33872..46f1e32 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tuuveee-for-the-first-few-months-of-my-first-web.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tuuveee-for-the-first-few-months-of-my-first-web.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Tuuveee
@SebAaltonen For the first few months of my first web development job I was using notepad++. Which works fine for small projects, sure. But you'd have to threaten me with physical harm to make me go back. Using an IDE just makes the workflow so much better when working with more than one file
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-WillGermany-i-was-once-interviewed-where-they-asked-me-to.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-WillGermany-i-was-once-interviewed-where-they-asked-me-to.md
index 5255271..64742dc 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-WillGermany-i-was-once-interviewed-where-they-asked-me-to.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-WillGermany-i-was-once-interviewed-where-they-asked-me-to.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @WillGermany
@SebAaltonen I was once interviewed where they asked me to write code and diagram databases in Notepad 🤦♂️
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XBigand-i-start-to-consider-to-go-back-to-a-simple-text.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XBigand-i-start-to-consider-to-go-back-to-a-simple-text.md
index de2ccc7..8da76d4 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XBigand-i-start-to-consider-to-go-back-to-a-simple-text.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XBigand-i-start-to-consider-to-go-back-to-a-simple-text.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @XBigand
@SebAaltonen I start to consider to go back to a simple text editor, like when I was using emacs at school, juste because VS is getting worse.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XenoVoid112-you-shouldnt-actually-do-it-you-should-be-able-to.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XenoVoid112-you-shouldnt-actually-do-it-you-should-be-able-to.md
index 418260f..35d6a24 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XenoVoid112-you-shouldnt-actually-do-it-you-should-be-able-to.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XenoVoid112-you-shouldnt-actually-do-it-you-should-be-able-to.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @XenoVoid112
@SebAaltonen You shouldn't actually do it. You should be *ABLE* to do it. They mean you should be able to know a language enough that you don't need tools to assist. At least, that is my interpretation
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ZoldenGames-some-people-feel-scared-to-give-up-lower-level.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ZoldenGames-some-people-feel-scared-to-give-up-lower-level.md
index 241057c..ee36062 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ZoldenGames-some-people-feel-scared-to-give-up-lower-level.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ZoldenGames-some-people-feel-scared-to-give-up-lower-level.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @ZoldenGames
@SebAaltonen Some people feel scared to give up lower level tasks to automatization. But that's how progress works and productivity grows.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_Felipe-blue-check-farming-engagement.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_Felipe-blue-check-farming-engagement.md
index cb637c0..15c6056 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_Felipe-blue-check-farming-engagement.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_Felipe-blue-check-farming-engagement.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @_Felipe
@SebAaltonen blue check farming engagement
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_benwick-the-key-word-is-able-how-many-people-cannot.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_benwick-the-key-word-is-able-how-many-people-cannot.md
index 681b45b..9799c11 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_benwick-the-key-word-is-able-how-many-people-cannot.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_benwick-the-key-word-is-able-how-many-people-cannot.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @_benwick
@SebAaltonen The key word is ABLE. How many people cannot compile a program without the visual studio ide? You're only cheating yourself if you don't understand how your toolchain does its work.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-atomlib-its-a-meme-from-a-person-who-posts-nothing-but.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-atomlib-its-a-meme-from-a-person-who-posts-nothing-but.md
index 40194b2..de9dd98 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-atomlib-its-a-meme-from-a-person-who-posts-nothing-but.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-atomlib-its-a-meme-from-a-person-who-posts-nothing-but.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @atomlib
@SebAaltonen It's a meme from a person who posts nothing but memes on Twitter. There's no meaningful debate here. Frankly, there's simply nothing worth paying attention to as this person is only interested in your engagement.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-baris2c-its-bait.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-baris2c-its-bait.md
index 21e6768..0af3446 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-baris2c-its-bait.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-baris2c-its-bait.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @baris2c
@SebAaltonen it's bait.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-bozoid-its-just-coder-bravado-to-show-off-toy-algorithms.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-bozoid-its-just-coder-bravado-to-show-off-toy-algorithms.md
index 69fd604..8745b35 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-bozoid-its-just-coder-bravado-to-show-off-toy-algorithms.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-bozoid-its-just-coder-bravado-to-show-off-toy-algorithms.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @bozoid
@SebAaltonen it's just coder bravado to show off toy algorithms
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-burlapDD-they-are-signaling-but-its-like-being-proud-of.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-burlapDD-they-are-signaling-but-its-like-being-proud-of.md
index 7ea2167..781b5bf 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-burlapDD-they-are-signaling-but-its-like-being-proud-of.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-burlapDD-they-are-signaling-but-its-like-being-proud-of.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @burlapDD
@SebAaltonen They are signaling
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-coolkoon-because-when-you-have-to-fix-something-on-a.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-coolkoon-because-when-you-have-to-fix-something-on-a.md
index da289ad..7b9debe 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-coolkoon-because-when-you-have-to-fix-something-on-a.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-coolkoon-because-when-you-have-to-fix-something-on-a.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @coolkoon
@SebAaltonen Because when you have to fix something on a customer system then usually notepad/vim/nano is literally the only option you have, that's why.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-damianGray-you-should-be-able-to-code-with-punch-cards.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-damianGray-you-should-be-able-to-code-with-punch-cards.md
index 5325286..aff8b11 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-damianGray-you-should-be-able-to-code-with-punch-cards.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-damianGray-you-should-be-able-to-code-with-punch-cards.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @damianGray
@SebAaltonen "You should be able to code with punch cards directly in binary" same energy
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-deejayyhu-debate-is-not-about-when-you-dont-want-to-use.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-deejayyhu-debate-is-not-about-when-you-dont-want-to-use.md
index 1fed9f8..86678c6 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-deejayyhu-debate-is-not-about-when-you-dont-want-to-use.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-deejayyhu-debate-is-not-about-when-you-dont-want-to-use.md
@@ -26,7 +26,7 @@ parent_post_id: "1786349827669790823"
## Branch
-**1/**
+**1/** @deejayyhu
@SebAaltonen Debate is not about when you don't want to use notepad, but when you are not able to use it.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dmitriid-the-anti-tooling-discourse-in-programming-is.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dmitriid-the-anti-tooling-discourse-in-programming-is.md
index c4c5fb3..2b3f907 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dmitriid-the-anti-tooling-discourse-in-programming-is.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dmitriid-the-anti-tooling-discourse-in-programming-is.md
@@ -26,7 +26,7 @@ parent_post_id: "1786349827669790823"
## Branch
-**1/**
+**1/** @dmitriid
@SebAaltonen The anti-tooling discourse in programming is quite tiring
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dorithegreat128-you-should-be-able-to-it-shows-that-you.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dorithegreat128-you-should-be-able-to-it-shows-that-you.md
index e2755f1..b8bffcf 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dorithegreat128-you-should-be-able-to-it-shows-that-you.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dorithegreat128-you-should-be-able-to-it-shows-that-you.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @dorithegreat128
@SebAaltonen You should be *able* to, it shows that you understand what you're writing, but you shouldn't *actually* do it because it's ridiculously inefficient
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-fightuntil-real-programmers-use-a-magnetized-needle-and-a.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-fightuntil-real-programmers-use-a-magnetized-needle-and-a.md
index 563e26a..f997aa2 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-fightuntil-real-programmers-use-a-magnetized-needle-and-a.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-fightuntil-real-programmers-use-a-magnetized-needle-and-a.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @fightuntil
@SebAaltonen Real programmers use a magnetized needle and a steady hand.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-foudre_tempete-tbf-intelisense-is-just-a-faster-way-of-finding.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-foudre_tempete-tbf-intelisense-is-just-a-faster-way-of-finding.md
index 43f3ee0..20d8406 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-foudre_tempete-tbf-intelisense-is-just-a-faster-way-of-finding.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-foudre_tempete-tbf-intelisense-is-just-a-faster-way-of-finding.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @foudre_tempete
@SebAaltonen Tbf intelisense is just a faster way of finding the right code/method to do something instead of finding it online or in a book...
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-frostyfrog-i-started-in-notepad-now-i-use-vim-for-all-my.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-frostyfrog-i-started-in-notepad-now-i-use-vim-for-all-my.md
index bfd24cc..9d03655 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-frostyfrog-i-started-in-notepad-now-i-use-vim-for-all-my.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-frostyfrog-i-started-in-notepad-now-i-use-vim-for-all-my.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @frostyfrog
@SebAaltonen I started in notepad, now I use vim for all my programming needs
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-games_pants-i-had-that-at-an-interview-once-a-programming.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-games_pants-i-had-that-at-an-interview-once-a-programming.md
index 1559ebd..77effa1 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-games_pants-i-had-that-at-an-interview-once-a-programming.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-games_pants-i-had-that-at-an-interview-once-a-programming.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @games_pants
@SebAaltonen I had that at an interview once. A programming test in Notepad. 90% of my time was spent battling the text editor! I probably should have got up and walked out.. it was a sign of worse things to come when I got the job :)
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-gregrthenson-i-once-was-in-an-interview-where-they-handed-me-a.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-gregrthenson-i-once-was-in-an-interview-where-they-handed-me-a.md
index 617db2d..53e103f 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-gregrthenson-i-once-was-in-an-interview-where-they-handed-me-a.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-gregrthenson-i-once-was-in-an-interview-where-they-handed-me-a.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @gregrthenson
@SebAaltonen I once was in an interview where they handed me a pen and paper and said "write this program"
I started writing pseudo code and they stopped me and said "no, actually write it"
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-h15panicatd-honestly-the-meme-works-infinitely-better-if-you.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-h15panicatd-honestly-the-meme-works-infinitely-better-if-you.md
index 3eeed8f..f1d3727 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-h15panicatd-honestly-the-meme-works-infinitely-better-if-you.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-h15panicatd-honestly-the-meme-works-infinitely-better-if-you.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @h15panicatd
@SebAaltonen Honestly the meme works infinitely better if you sub IntelliSense out for Copilot.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-heyotetsuo-use-whatever-you-want.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-heyotetsuo-use-whatever-you-want.md
index dc73009..8745cae 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-heyotetsuo-use-whatever-you-want.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-heyotetsuo-use-whatever-you-want.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @heyotetsuo
@SebAaltonen @SebAaltonen use whatever you want
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-jmac_ai-the-meme-isnt-saying-you-shouldnt-use-it-its.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-jmac_ai-the-meme-isnt-saying-you-shouldnt-use-it-its.md
index 84c0718..039dcce 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-jmac_ai-the-meme-isnt-saying-you-shouldnt-use-it-its.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-jmac_ai-the-meme-isnt-saying-you-shouldnt-use-it-its.md
@@ -26,37 +26,37 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @jmac_ai
@SebAaltonen The meme isn't saying you shouldn't use it, it's saying you should be *able* to still program without it.
The implied meaning is that you should have a strong foundational understanding to build what you need that tools amplify.
-**2/**
+**2/** @SebAaltonen
@jmac_ai Yes. But programming is 90% reading code, and browsing though a big code base in notepad is just insanely slow. You open cmake files to multiple tabs and file browsers to others to find the files, etc. In good IDE you just click. Reading code is the problem, not writing.
-**3/**
+**3/** @jmac_ai
@SebAaltonen Of course it's slow. Again, that's not the point :p
-**4/**
+**4/** @SebAaltonen
@jmac_ai Why would anybody want to learn a slow cumbersome practice that nobody should use in professional development? I still don't understand.
-**5/**
+**5/** @jmac_ai
@SebAaltonen Bc it forces you to build a foundational knowledge. That helps when tools have a bug; it helps you understand where to look for things; allows you to make better tools, etc.
E.g., When an IDE isn't working right for someone I can help fix it, bc I understand the foundations.
-**6/**
+**6/** @the_vertigamer
@jmac_ai @SebAaltonen Does it really though? It never (at least for me) does much more than autocomplete particularly long types. That's not really doing the code for me, I'm still having to design the algorithm.
Further inteli often gets it wrong so you have to know what ur doing. It's !copilot.
-**7/**
+**7/** @jmac_ai
@the_vertigamer @SebAaltonen Plausibly you could learn all the foundations in different ways. The meme isn't prescriptive that you learn by doing it the hard way, only that you *could* do it the hard way. If you couldn't, then it suggests you haven't learned all the foundations.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-leonpalafox-because-thats-how-we-learned-and-you-should-too.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-leonpalafox-because-thats-how-we-learned-and-you-should-too.md
index 608c388..64d6af5 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-leonpalafox-because-thats-how-we-learned-and-you-should-too.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-leonpalafox-because-thats-how-we-learned-and-you-should-too.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @leonpalafox
@SebAaltonen Because that’s how we learned and you should too 😂
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-lethal_guitar-its-like-telling-a-carpenter-you-should-be-able.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-lethal_guitar-its-like-telling-a-carpenter-you-should-be-able.md
index cf357e6..2ff54e2 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-lethal_guitar-its-like-telling-a-carpenter-you-should-be-able.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-lethal_guitar-its-like-telling-a-carpenter-you-should-be-able.md
@@ -26,11 +26,11 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @lethal_guitar
@SebAaltonen It's like telling a carpenter "You should be able to do all your work without power tools". Yeah it's possible, but it's extremely slow and exhausting so there's no good reason to do it when better alternatives exist.
-**2/**
+**2/** @SebAaltonen
@lethal_guitar Yeah. You have done it manually a few times first and then you learn how to use tools. Technically you would still be able to do the thing manually, but you haven't done that in a few years. I could code with notepad, but it would just be much slower and more painful.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maessof91-it-makes-old-people-feel-cool-because-they-at.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maessof91-it-makes-old-people-feel-cool-because-they-at.md
index 54d91f7..5548c0a 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maessof91-it-makes-old-people-feel-cool-because-they-at.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maessof91-it-makes-old-people-feel-cool-because-they-at.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @maessof91
@SebAaltonen It makes old people feel cool, because they at some point were forced to code like that
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maisakal-you-are-an-intellisense-yourself-if-you-have-the.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maisakal-you-are-an-intellisense-yourself-if-you-have-the.md
index 2900bd0..30a08e4 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maisakal-you-are-an-intellisense-yourself-if-you-have-the.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maisakal-you-are-an-intellisense-yourself-if-you-have-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @maisakal
@SebAaltonen You are an intellisense yourself if you have the references at your disposal. You just need to look it up. Don’t be a lazyass, go look it up.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-mbc0der-should-be-able-to-doesnt-mean-prefer-to-its-just.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-mbc0der-should-be-able-to-doesnt-mean-prefer-to-its-just.md
index 5772a1c..5186731 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-mbc0der-should-be-able-to-doesnt-mean-prefer-to-its-just.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-mbc0der-should-be-able-to-doesnt-mean-prefer-to-its-just.md
@@ -26,15 +26,15 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @mbc0der
@SebAaltonen "Should be able to" doesn't mean "prefer to." It's just a base line level of fluency that implies more experience and probably more competency.
-**2/**
+**2/** @SebAaltonen
@mbc0der I really can't read a big code base using notepad. It's so painful to manually juggle dozen of cmake files to find where every header is so that I can read them. Coding is 90% reading. Of course everybody can write on notepad. That's not the problem.
-**3/**
+**3/** @mbc0der
@SebAaltonen Yes, I agree it's unwieldy to do so in a very large codebase or one that you are unfamiliar with. Obviously this is just a meme so there's not much nuance, and you can interpret it in different ways.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-megaloid6-you-are-weak.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-megaloid6-you-are-weak.md
index 206864c..e6c1bae 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-megaloid6-you-are-weak.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-megaloid6-you-are-weak.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @megaloid6
@SebAaltonen You are weak
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-officiallyninja-i-think-there-is-some-value-in-this-at-least-for.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-officiallyninja-i-think-there-is-some-value-in-this-at-least-for.md
index 497701a..8446331 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-officiallyninja-i-think-there-is-some-value-in-this-at-least-for.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-officiallyninja-i-think-there-is-some-value-in-this-at-least-for.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @officiallyninja
@SebAaltonen I think there is some value in this. At least for a beginner. You should be able to use notepad + terminal to write simple programs. That doesn't mean it's practical. But any intermediate dev should be able to do it, it'll be annoying yes, but not *that* hard for small problems
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-pepite2choc-its-not-about-wanting-its-about-being-able-to.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-pepite2choc-its-not-about-wanting-its-about-being-able-to.md
index ddc7adf..2189d4b 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-pepite2choc-its-not-about-wanting-its-about-being-able-to.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-pepite2choc-its-not-about-wanting-its-about-being-able-to.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @pepite2choc
@SebAaltonen It's not about wanting, it's about being able to.
Just a car driver should be able to drive without driving assistance.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-redhog_org-no-need-to-do-that-but-to-be-able-to-if-unable.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-redhog_org-no-need-to-do-that-but-to-be-able-to-if-unable.md
index 3902972..0e3ebc3 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-redhog_org-no-need-to-do-that-but-to-be-able-to-if-unable.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-redhog_org-no-need-to-do-that-but-to-be-able-to-if-unable.md
@@ -26,23 +26,23 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @redhog_org
@SebAaltonen No need to do that. But to be able to. If unable, the tools are fooling you to think you understand the code better than you actually do.
-**2/**
+**2/** @SebAaltonen
@redhog_org Is there really some benefit for finding each symbol in 10 million line code base by browsing directory structure manually? You could just click on a symbol to find the implementation in IDE, read it and continue. 10x+ faster. Coding is 90% reading. Notepad is not great for that.
-**3/**
+**3/** @SebAaltonen
@redhog_org Anybody could write code in notepad. The problem is reading. Writing code is less than <10% of programmer's time. Reading and browsing the code base is what matters. For that you need code highlight and jump to symbols, caller graphs, etc. Step flow with debugger.
-**4/**
+**4/** @SebAaltonen
@redhog_org I would be much more concerned if a junior programmer would not be using IDE to boost their productivity. I don't need to know whether they could write the code in notepad, since nobody really does that. That's not the job.
-**5/**
+**5/** @redhog_org
@SebAaltonen It is exactly the junior devs that need an IDE because their mental model of thew whole project is lacking, that build spaghetti across the project. Their productivity is only worth it if it doesn't cost more in PR review and reefaactoring.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ruch483-they-just-gaslight-themselves-that-their-broken.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ruch483-they-just-gaslight-themselves-that-their-broken.md
index 4d14384..ffbb903 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ruch483-they-just-gaslight-themselves-that-their-broken.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ruch483-they-just-gaslight-themselves-that-their-broken.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @ruch483
@SebAaltonen they just gaslight themselves that their broken vim config is equivalent to a proper IDE
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-saarw-simple-editors-tend-to-lead-to-other-bad-choices.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-saarw-simple-editors-tend-to-lead-to-other-bad-choices.md
index 7e635e1..2fbd4da 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-saarw-simple-editors-tend-to-lead-to-other-bad-choices.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-saarw-simple-editors-tend-to-lead-to-other-bad-choices.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @saarw
@SebAaltonen Simple editors tend to lead to other bad choices to compensate. Such as preference for languages that have so little syntax and type information that they create maintenance nightmares
https://x.com/saarw/status/1755529704180720114?t=zfjfI-8BhZ915QDCMRRjAQ&s=19
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-sksauli-this.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-sksauli-this.md
index 5aa863a..4e625d9 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-sksauli-this.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-sksauli-this.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @sksauli
@SebAaltonen This?
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-smurfpappa123-the-decel-mind-is-perplexing.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-smurfpappa123-the-decel-mind-is-perplexing.md
index e4ded82..a93f0e3 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-smurfpappa123-the-decel-mind-is-perplexing.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-smurfpappa123-the-decel-mind-is-perplexing.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @smurfpappa123
@SebAaltonen The decel mind is perplexing 🤔
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-streetsofboston-folks-advocating-for-notepad-coding-is-much-like.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-streetsofboston-folks-advocating-for-notepad-coding-is-much-like.md
index e69999f..daad468 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-streetsofboston-folks-advocating-for-notepad-coding-is-much-like.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-streetsofboston-folks-advocating-for-notepad-coding-is-much-like.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @streetsofboston
@SebAaltonen Folks advocating for "notepad" coding is much like a grandfather boasting how he walked to school during a blizzard.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-theogramme_dev-to-prove-twitter-theyre-good-coders.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-theogramme_dev-to-prove-twitter-theyre-good-coders.md
index 256471e..6ed42d0 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-theogramme_dev-to-prove-twitter-theyre-good-coders.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-theogramme_dev-to-prove-twitter-theyre-good-coders.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @theogramme_dev
@SebAaltonen To prove twitter they're good coders
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thewillsykes-i-sort-of-agree-but-im-so-often-forced-to-code.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thewillsykes-i-sort-of-agree-but-im-so-often-forced-to-code.md
index 66c9894..b1f27d1 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thewillsykes-i-sort-of-agree-but-im-so-often-forced-to-code.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thewillsykes-i-sort-of-agree-but-im-so-often-forced-to-code.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @thewillsykes
@SebAaltonen i sort of agree, but i'm so often forced to code with no functional IDE when teaching students (cos they haven't set up correctly) that i can say it's a helpful skill to keep. When i started coding C, I used "Edit" in Dos... I hugely prefer auto complete but it has made me weaker
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thr0wsException-its-obvious-engagement-farming-rage-bait-just.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thr0wsException-its-obvious-engagement-farming-rage-bait-just.md
index 5e77a5d..e8ed253 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thr0wsException-its-obvious-engagement-farming-rage-bait-just.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thr0wsException-its-obvious-engagement-farming-rage-bait-just.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @thr0wsException
@SebAaltonen It's obvious engagement farming / rage bait. Just ignore it tbh
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-unmodify-its-a-desire-to-appear-extraordinarily-competent.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-unmodify-its-a-desire-to-appear-extraordinarily-competent.md
index 90403dc..91b469f 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-unmodify-its-a-desire-to-appear-extraordinarily-competent.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-unmodify-its-a-desire-to-appear-extraordinarily-competent.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @unmodify
@SebAaltonen It's a desire to appear extraordinarily competent without having worked enough for it. Ie. Youth.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-virtuallyfun-because-i-dont-want-the-distractions-i-dont-want.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-virtuallyfun-because-i-dont-want-the-distractions-i-dont-want.md
index eb92906..481bebc 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-virtuallyfun-because-i-dont-want-the-distractions-i-dont-want.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-virtuallyfun-because-i-dont-want-the-distractions-i-dont-want.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @virtuallyfun
@SebAaltonen Because I don’t want the distractions, I don’t want my hand held, I just want to type, typos and all.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-wrd83-i-would-agree-with-the-original-poster-you-should.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-wrd83-i-would-agree-with-the-original-poster-you-should.md
index d8a2f7f..5cb9545 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-wrd83-i-would-agree-with-the-original-poster-you-should.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-wrd83-i-would-agree-with-the-original-poster-you-should.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @wrd83
@SebAaltonen I would agree with the original poster. You should be able to code in notepad.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ytvizthex-hell-i-used-notepad-for-my-shitty-terraria-mods.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ytvizthex-hell-i-used-notepad-for-my-shitty-terraria-mods.md
index f140cde..7c45319 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ytvizthex-hell-i-used-notepad-for-my-shitty-terraria-mods.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ytvizthex-hell-i-used-notepad-for-my-shitty-terraria-mods.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @ytvizthex
@SebAaltonen Hell, I used notepad++ for my shitty terraria mods and the TML discord act like I sacrificed them all to Satan lmfao
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-AdmiralMemo-i-think-people-should-be-able-to-code-without.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-AdmiralMemo-i-think-people-should-be-able-to-code-without.md
index 75bd4ac..2f5f32d 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-AdmiralMemo-i-think-people-should-be-able-to-code-without.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-AdmiralMemo-i-think-people-should-be-able-to-code-without.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @AdmiralMemo
@SebAaltonen I think people should be able to code without tools, but I'm not going to try to take the tools away. If you can't code without it, you should git gud, but until then, keep coding at least. Something's better than nothing.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Ancients-there-is-an-argument-where-people-build-systems.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Ancients-there-is-an-argument-where-people-build-systems.md
index dda80a8..ae315df 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Ancients-there-is-an-argument-where-people-build-systems.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Ancients-there-is-an-argument-where-people-build-systems.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Ancients
@SebAaltonen There is an argument where people build systems as complex and resource intensive as their tooling will allow.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-CHChistris-i-guess-this-is-just-another-expression-of-the-if.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-CHChistris-i-guess-this-is-just-another-expression-of-the-if.md
index 71bca30..da792ef 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-CHChistris-i-guess-this-is-just-another-expression-of-the-if.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-CHChistris-i-guess-this-is-just-another-expression-of-the-if.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @CHChistris
@SebAaltonen I guess this is just another expression of the "if I had to suffer, you should too. To give sense to why I had to suffer" school of thought.
I prefer the "this sucks, and I hope I can make it better for everyone" school of thought
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-FChapeau-its-gatekeeping-really-there-has-never-been-a.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-FChapeau-its-gatekeeping-really-there-has-never-been-a.md
index f7d57ba..960dcad 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-FChapeau-its-gatekeeping-really-there-has-never-been-a.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-FChapeau-its-gatekeeping-really-there-has-never-been-a.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @FChapeau
@SebAaltonen It’s gatekeeping really. There has never been a better time to learn programming, with fantastic free tools, but you apparently need to be able to work a specific way if you want to be a “real” programmer.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-JasonKn99664124-honestly-a-lot-of-the-framework-and-transpiler.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-JasonKn99664124-honestly-a-lot-of-the-framework-and-transpiler.md
index 568d55f..0c2514d 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-JasonKn99664124-honestly-a-lot-of-the-framework-and-transpiler.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-JasonKn99664124-honestly-a-lot-of-the-framework-and-transpiler.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @JasonKn99664124
@SebAaltonen Honestly a lot of the "framework" and "transpiler" idiocy is what makes you reliant on tooling you don't need.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-KlavsPeder-sometimes-we-are-limited-by-our-environment-which.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-KlavsPeder-sometimes-we-are-limited-by-our-environment-which.md
index c244b26..201ce7e 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-KlavsPeder-sometimes-we-are-limited-by-our-environment-which.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-KlavsPeder-sometimes-we-are-limited-by-our-environment-which.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @KlavsPeder
@SebAaltonen Sometimes we are limited by our environment, which may limit us to the tools available on the device we are working on. This may be 'cat > file.c', ed, ex, notepad or whatever.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Matagi1996-its-not-like-you-should-only-code-without-support.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Matagi1996-its-not-like-you-should-only-code-without-support.md
index 7419445..9f76a43 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Matagi1996-its-not-like-you-should-only-code-without-support.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Matagi1996-its-not-like-you-should-only-code-without-support.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @Matagi1996
@SebAaltonen Its not like you should only code without Support, but its nice to be able to. Sometimes you only are connected to a machine over a console via ssh and have to use Vim.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-NohBody3-why-do-they-teach-arithmetic-we-all-have.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-NohBody3-why-do-they-teach-arithmetic-we-all-have.md
index 8fc15ec..a94d13a 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-NohBody3-why-do-they-teach-arithmetic-we-all-have.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-NohBody3-why-do-they-teach-arithmetic-we-all-have.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @NohBody3
@SebAaltonen Why do they teach arithmetic, we all have calculators
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-RyanAlban1-not-notepad-but-i-have-done-a-non-zero-amount-of.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-RyanAlban1-not-notepad-but-i-have-done-a-non-zero-amount-of.md
index 5866d5a..7c9c0e7 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-RyanAlban1-not-notepad-but-i-have-done-a-non-zero-amount-of.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-RyanAlban1-not-notepad-but-i-have-done-a-non-zero-amount-of.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @RyanAlban1
@SebAaltonen Not Notepad, but I have done a non-zero amount of programming in source control diff tools that have none of those features. It was the quickest way to solve the problem at the time.😅
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-YohanOttie-people-will-justify-programming-c-c-on-linux-on.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-YohanOttie-people-will-justify-programming-c-c-on-linux-on.md
index ee0dad1..ed419b4 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-YohanOttie-people-will-justify-programming-c-c-on-linux-on.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-YohanOttie-people-will-justify-programming-c-c-on-linux-on.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @YohanOttie
@SebAaltonen People will justify programming C/C++ on Linux. On leafpad.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-andokal-if-you-cant-code-tcl-using-vi-through-a-bash.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-andokal-if-you-cant-code-tcl-using-vi-through-a-bash.md
index e0a9632..2e04371 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-andokal-if-you-cant-code-tcl-using-vi-through-a-bash.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-andokal-if-you-cant-code-tcl-using-vi-through-a-bash.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @andokal
@SebAaltonen If you can’t code TCL using VI through a bash terminal on a remote Unix box with CVS SC, you can’t code. But seriously, more than half of the modern internet ran on that for about a decade (AOL).
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-bmarci7-i-would-say-you-should-code-in-a-way-that-is.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-bmarci7-i-would-say-you-should-code-in-a-way-that-is.md
index dfe1383..574df4b 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-bmarci7-i-would-say-you-should-code-in-a-way-that-is.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-bmarci7-i-would-say-you-should-code-in-a-way-that-is.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @bmarci7
@SebAaltonen I would say, you should code in a way that is readable even in notepad.
Using auto keyword and other modern stuff makes your code look like a cryptography without a good ide :/
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-codesonpaper-the-skill-issue-is-strong-with-this-one.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-codesonpaper-the-skill-issue-is-strong-with-this-one.md
index dc9f2d2..c7e40fb 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-codesonpaper-the-skill-issue-is-strong-with-this-one.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-codesonpaper-the-skill-issue-is-strong-with-this-one.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @codesonpaper
@SebAaltonen The skill issue is strong with this one
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-cpps93-i-learn-to-code-in-c-back-in-2011-and-my-teacher.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-cpps93-i-learn-to-code-in-c-back-in-2011-and-my-teacher.md
index 0225121..dbcf225 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-cpps93-i-learn-to-code-in-c-back-in-2011-and-my-teacher.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-cpps93-i-learn-to-code-in-c-back-in-2011-and-my-teacher.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @cpps93
@SebAaltonen I learn to code in C++ back in 2011 and my teacher advised us to work for the moment in Notepad++ just to LEARN,for example,I remember when a function receives a pointer to try to call it placing a lot of '*' or '&' and wait for intellisense not to complain about what i'd written
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-daihaminkey-and-when-there-is-no-tool-for-something-they.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-daihaminkey-and-when-there-is-no-tool-for-something-they.md
index fd959a7..13edb79 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-daihaminkey-and-when-there-is-no-tool-for-something-they.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-daihaminkey-and-when-there-is-no-tool-for-something-they.md
@@ -26,7 +26,7 @@ parent_post_id: "1786349827669790823"
## Branch
-**1/**
+**1/** @daihaminkey
@SebAaltonen And when there is no tool for something, they develop it.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-fforw-you-never-know-when-a-time-machine-will-transport.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-fforw-you-never-know-when-a-time-machine-will-transport.md
index 523b821..4f8267e 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-fforw-you-never-know-when-a-time-machine-will-transport.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-fforw-you-never-know-when-a-time-machine-will-transport.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @fforw
@SebAaltonen You never know when a time machine will transport you back into the early 90s and you have to live there and earn a living as software developer.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-gengsterrebber-its-about-gatekeeping-and-feeling-superior.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-gengsterrebber-its-about-gatekeeping-and-feeling-superior.md
index 60a16e8..7fd3bc2 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-gengsterrebber-its-about-gatekeeping-and-feeling-superior.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-gengsterrebber-its-about-gatekeeping-and-feeling-superior.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @gengsterrebber
@SebAaltonen It's about gatekeeping and feeling superior, Sebastian. Duh.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kechogarcia-ctags-and-cscope-if-you-know-you-know.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kechogarcia-ctags-and-cscope-if-you-know-you-know.md
index d4815c0..789b599 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kechogarcia-ctags-and-cscope-if-you-know-you-know.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kechogarcia-ctags-and-cscope-if-you-know-you-know.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @kechogarcia
@SebAaltonen ctags and cscope. If you know, you know. Unfortunately not many know how to use them.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kinjalkishor-why-one-would-waste-time-do-things-in-more-error.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kinjalkishor-why-one-would-waste-time-do-things-in-more-error.md
index 6311eb1..2abb28f 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kinjalkishor-why-one-would-waste-time-do-things-in-more-error.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kinjalkishor-why-one-would-waste-time-do-things-in-more-error.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @kinjalkishor
@SebAaltonen Why one would waste time & do things in more error prone ways, when good tools are available.
Even best language will see very less adoption without good tools.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-ok_devesh-legends-use-nano-or-vim-as-well.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-ok_devesh-legends-use-nano-or-vim-as-well.md
index 8ffcea5..82d384c 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-ok_devesh-legends-use-nano-or-vim-as-well.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-ok_devesh-legends-use-nano-or-vim-as-well.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @ok_devesh
@SebAaltonen Legends use nano or vim as well!
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-real7a-thread.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-real7a-thread.md
index 5f5db54..cfa15b7 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-real7a-thread.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-real7a-thread.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @real7a
@SebAaltonen :-)
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sagiritarius-using-codeblocks-instead-of-visual-studio-for.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sagiritarius-using-codeblocks-instead-of-visual-studio-for.md
index c839ee5..0a62ac8 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sagiritarius-using-codeblocks-instead-of-visual-studio-for.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sagiritarius-using-codeblocks-instead-of-visual-studio-for.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @sagiritarius
@SebAaltonen Using CodeBlocks instead of Visual Studio for some time taught me that we created IntelliSense for a reason.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sean_of_w-i-know-a-lot-of-professionals-who-cant-code-at.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sean_of_w-i-know-a-lot-of-professionals-who-cant-code-at.md
index 0b4a23b..fb9ce1f 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sean_of_w-i-know-a-lot-of-professionals-who-cant-code-at.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sean_of_w-i-know-a-lot-of-professionals-who-cant-code-at.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @sean_of_w
@SebAaltonen I know a lot of “professionals” who can’t code at all without an IDE, even on small projects. If you can’t work without it even at a low level of productivity, your ability to earn a living exists only at the whims of the IDE vendor. That’s one hell of a career risk.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-simplex_fx-you-should-be-able-to-program-on-paper-thats-what.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-simplex_fx-you-should-be-able-to-program-on-paper-thats-what.md
index 848c5de..9ba8488 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-simplex_fx-you-should-be-able-to-program-on-paper-thats-what.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-simplex_fx-you-should-be-able-to-program-on-paper-thats-what.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @simplex_fx
@SebAaltonen You should be able to program on paper!
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sylioning-ah-yes-high-school-memories-where-we-all-wrote.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sylioning-ah-yes-high-school-memories-where-we-all-wrote.md
index 237f630..0c8f6fd 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sylioning-ah-yes-high-school-memories-where-we-all-wrote.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sylioning-ah-yes-high-school-memories-where-we-all-wrote.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @sylioning
@SebAaltonen Ah yes, high school memories where we all wrote HTML code in Notepad.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-xusifob-if-you-wouldnt-be-able-to-do-your-job-without-an.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-xusifob-if-you-wouldnt-be-able-to-do-your-job-without-an.md
index 2c75923..63154a5 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-xusifob-if-you-wouldnt-be-able-to-do-your-job-without-an.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-xusifob-if-you-wouldnt-be-able-to-do-your-job-without-an.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @xusifob
@SebAaltonen If you wouldn't be able to do your job without an IDE there's a problem
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-joimboim-it-could-be-a-good-idea-to-start-without.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-joimboim-it-could-be-a-good-idea-to-start-without.md
index 593b17b..34ccee9 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-joimboim-it-could-be-a-good-idea-to-start-without.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-joimboim-it-could-be-a-good-idea-to-start-without.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @joimboim
@SebAaltonen It could be a good idea to start without intellisense. Just to learn and not get overwhelmed. It is also pretty distracting when it gets something wrong.
I mean there is no valid reason why someone shouldn't use it. But you should be able to make something without it, i guess.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-ren_metal_n_dev-its-about-leveraging-the-tools-to-be-as.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-ren_metal_n_dev-its-about-leveraging-the-tools-to-be-as.md
index 945b3db..f944c64 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-ren_metal_n_dev-its-about-leveraging-the-tools-to-be-as.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-ren_metal_n_dev-its-about-leveraging-the-tools-to-be-as.md
@@ -26,7 +26,7 @@ parent_post_id: "1786346729547153794"
## Branch
-**1/**
+**1/** @ren_metal_n_dev
@SebAaltonen It’s about leveraging the tools to be as productive as possible. Who cares if you use an IDE. If someone on my team is dragging behind because of their tool choice on the other hand, that would be annoying.
diff --git a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/index.md b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/index.md
index 9143b31..bafc630 100644
--- a/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/index.md
+++ b/archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/index.md
@@ -25,34 +25,34 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @SebAaltonen
Why should one be able to code without autocomplete and without a good IDE? I want to click on a symbol to find where it's defined and click on include file to go there, etc. And notepad doesn't have a debugger. I just don't get it. Why would anybody want to do that?
Branches: [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-SebAaltonen-i-could-write-all-my-code-in-assembler-too-but]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-games_pants-i-had-that-at-an-interview-once-a-programming]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Enhex-because-high-arrogance-low-intelligence]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Lascif-people-have-a-superiority-complex-for-working-in]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-GumboatDiplomat-i-pretty-much-agree-with-you-but-i-started-using]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BugoTheCat-nothing-wrong-with-new-tools-its-just-that-most]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-sksauli-this]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CptCrabhands-you-should-write-your-code-on-paper-by-hand]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Kinker_0-theres-a-big-difference-between-being-able-to-and]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_benwick-the-key-word-is-able-how-many-people-cannot]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-lethal_guitar-its-like-telling-a-carpenter-you-should-be-able]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-i-wish-visual-studio-had-better-code-context]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-pepite2choc-its-not-about-wanting-its-about-being-able-to]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-AronThoughts-static-globals-defines-were-warm-members-blue]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-MacGyver1618-you-should-be-able-to-code-in-notepad-just-so-you]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Niko_sk2x-i-think-the-point-is-that-you-should-be-able-to]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-jmac_ai-the-meme-isnt-saying-you-shouldnt-use-it-its]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-mbc0der-should-be-able-to-doesnt-mean-prefer-to-its-just]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-WillGermany-i-was-once-interviewed-where-they-asked-me-to]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XBigand-i-start-to-consider-to-go-back-to-a-simple-text]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tuuveee-for-the-first-few-months-of-my-first-web]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ThePunkHucker-its-a-showcase-of-the-im-stronger-than-you]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-TechTolley-old-guys-trying-to-act-like-their-depreciating]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-atomlib-its-a-meme-from-a-person-who-posts-nothing-but]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ASupersay-who-cares-do-what-makes-you-happiest-and]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-bozoid-its-just-coder-bravado-to-show-off-toy-algorithms]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-OscarBR92-to-assert-dominance]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-heyotetsuo-use-whatever-you-want]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-KasperArnklit-gate-keeping-programming-and-thinking-it-makes]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ZoldenGames-some-people-feel-scared-to-give-up-lower-level]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-BenQett-the-only-good-faith-reply-is-if-youre-a-systems]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-leonpalafox-because-thats-how-we-learned-and-you-should-too]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-RatherSnideBun-that-is-just-another-it-twitter-bait-just-mute-or]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-_Felipe-blue-check-farming-engagement]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-unmodify-its-a-desire-to-appear-extraordinarily-competent]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-wrd83-i-would-agree-with-the-original-poster-you-should]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Natnew7-you-shouldnt-have-to-code-this-way-for-serious]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-redhog_org-no-need-to-do-that-but-to-be-able-to-if-unable]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-saarw-simple-editors-tend-to-lead-to-other-bad-choices]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-gregrthenson-i-once-was-in-an-interview-where-they-handed-me-a]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Floppie7th-cant-stand-ides-honestly-i-wouldnt-use-notepad]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Tankerbot-yeah-if-its-available-use-it-though-in-my-case-i]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-officiallyninja-i-think-there-is-some-value-in-this-at-least-for]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thr0wsException-its-obvious-engagement-farming-rage-bait-just]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-burlapDD-they-are-signaling-but-its-like-being-proud-of]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maessof91-it-makes-old-people-feel-cool-because-they-at]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-baris2c-its-bait]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ruch483-they-just-gaslight-themselves-that-their-broken]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-ytvizthex-hell-i-used-notepad-for-my-shitty-terraria-mods]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-XenoVoid112-you-shouldnt-actually-do-it-you-should-be-able-to]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Junts-as-a-kid-i-thought-coding-seemed-cool-and-wrote-a]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-frostyfrog-i-started-in-notepad-now-i-use-vim-for-all-my]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-h15panicatd-honestly-the-meme-works-infinitely-better-if-you]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Shrikanthabudya-chill-bro-its-an-engagement-bait]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-PurpleNinjaGrrl-nothing-has-more-forever-a-junior-level]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-IlyasHairline-to-flex-on-others]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-streetsofboston-folks-advocating-for-notepad-coding-is-much-like]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Naam_Hai_Bulla-major-disagree-especially-if-youre-learning-a-new]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-damianGray-you-should-be-able-to-code-with-punch-cards]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-theogramme_dev-to-prove-twitter-theyre-good-coders]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-dorithegreat128-you-should-be-able-to-it-shows-that-you]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-smurfpappa123-the-decel-mind-is-perplexing]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-DarthJahus-being-able-to-code-without-assistant-is-a-good]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-megaloid6-you-are-weak]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-NeutralRational-hes-a-boomer]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-CobraSwims-same-reason-some-large-corps-demand-that-we-have]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-Desxon1-still-remember-how-my-technical-school-assigned-a]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-fightuntil-real-programmers-use-a-magnetized-needle-and-a]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-virtuallyfun-because-i-dont-want-the-distractions-i-dont-want]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-foudre_tempete-tbf-intelisense-is-just-a-faster-way-of-finding]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-maisakal-you-are-an-intellisense-yourself-if-you-have-the]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-coolkoon-because-when-you-have-to-fix-something-on-a]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-03-thewillsykes-i-sort-of-agree-but-im-so-often-forced-to-code]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-JasonKn99664124-honestly-a-lot-of-the-framework-and-transpiler]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Ancients-there-is-an-argument-where-people-build-systems]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-AdmiralMemo-i-think-people-should-be-able-to-code-without]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kechogarcia-ctags-and-cscope-if-you-know-you-know]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sylioning-ah-yes-high-school-memories-where-we-all-wrote]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-ok_devesh-legends-use-nano-or-vim-as-well]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-fforw-you-never-know-when-a-time-machine-will-transport]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-kinjalkishor-why-one-would-waste-time-do-things-in-more-error]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-Matagi1996-its-not-like-you-should-only-code-without-support]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-codesonpaper-the-skill-issue-is-strong-with-this-one]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-FChapeau-its-gatekeeping-really-there-has-never-been-a]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-NohBody3-why-do-they-teach-arithmetic-we-all-have]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-real7a-thread]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-cpps93-i-learn-to-code-in-c-back-in-2011-and-my-teacher]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-bmarci7-i-would-say-you-should-code-in-a-way-that-is]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sagiritarius-using-codeblocks-instead-of-visual-studio-for]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-simplex_fx-you-should-be-able-to-program-on-paper-thats-what]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-xusifob-if-you-wouldnt-be-able-to-do-your-job-without-an]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-YohanOttie-people-will-justify-programming-c-c-on-linux-on]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-KlavsPeder-sometimes-we-are-limited-by-our-environment-which]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-RyanAlban1-not-notepad-but-i-have-done-a-non-zero-amount-of]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-CHChistris-i-guess-this-is-just-another-expression-of-the-if]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-sean_of_w-i-know-a-lot-of-professionals-who-cant-code-at]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-gengsterrebber-its-about-gatekeeping-and-feeling-superior]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-04-andokal-if-you-cant-code-tcl-using-vi-through-a-bash]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-joimboim-it-could-be-a-good-idea-to-start-without]], [[archive/threads/SebAaltonen/2024-05-03-why-should-one-be-able-to-code-without/2024-05-05-ren_metal_n_dev-its-about-leveraging-the-tools-to-be-as]]
-**2/**
+**2/** @NOTimothyLottes
@SebAaltonen i code in notepad2, i don't use debuggers, i don't create bugs, i don't use multiple files, the C code compiles faster than i can notice after saving the single file (via a shell script) ... why anyone wants the alternative insane code complexity, i'll never know
-**3/**
+**3/** @SebAaltonen
@NOTimothyLottes Works for hobby projects. But not for big work projects with 50+ people teams.
-**4/**
+**4/** @Nerfoxingaround
@SebAaltonen @NOTimothyLottes No. It works for low level projects regardless of the team size. This whole discussion is yet another case of programmers taking their work as religion or their personality.
I wouldn't handle stepper motors in C# and I wouldn't code games in assembler.
-**5/**
+**5/** @NOTimothyLottes
@Nerfoxingaround @SebAaltonen Back in the day we would write everything, from the DOS extender (to 32bit mode) the sound blaster drivers, the VGA interface, etc, and the UI and audio synth and sequencer/editor ... all in assembly and it was dead easy, a lot easter than say bringing up a triangle in Vulkan.
-**6/**
+**6/** @NOTimothyLottes
@Nerfoxingaround @SebAaltonen There is nothing complex or hard about assembly with a good macro preprocessor. It's easier IMO than high level languages because you know exactly what you get out of it. Interrupts and syscalls are easy.
-**7/**
+**7/** @NOTimothyLottes
@Nerfoxingaround @SebAaltonen It was only later when systems forced C ABI library interfaces with it's stacks and junk that things got messy and only because of the C. Then C++ happened and things got much worse. Pure ASM is easy, its interfacing with the bloat world that got hard.
diff --git a/archive/threads/SebAaltonen/2024-12-18-fixed-all-our-vulkan-bugs/index.md b/archive/threads/SebAaltonen/2024-12-18-fixed-all-our-vulkan-bugs/index.md
index 30d9435..a68ddc9 100644
--- a/archive/threads/SebAaltonen/2024-12-18-fixed-all-our-vulkan-bugs/index.md
+++ b/archive/threads/SebAaltonen/2024-12-18-fixed-all-our-vulkan-bugs/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @SebAaltonen
Fixed all our Vulkan bugs:
- ARM: BGR swapchain handled incorrectly (our bug)
@@ -37,6 +37,6 @@ Now we are ready to ship Vulkan for end users.
-**2/**
+**2/** @SebAaltonen
Our Vulkan backend has been in internal production for 1.5 years already. We were just waiting for Google to ship the Vulkan renderer on Flutter. We have a custom Flutter version that allows us to run our engine in the side. I carved holes to get their Vulkan device ptr, etc.
diff --git a/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/2025-03-08-NOTimothyLottes-actually-this-is-a-super-important-question-imo.md b/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/2025-03-08-NOTimothyLottes-actually-this-is-a-super-important-question-imo.md
index 7eafde1..c48f1ed 100644
--- a/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/2025-03-08-NOTimothyLottes-actually-this-is-a-super-important-question-imo.md
+++ b/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/2025-03-08-NOTimothyLottes-actually-this-is-a-super-important-question-imo.md
@@ -26,7 +26,7 @@ parent_post_id: "1898272635277967509"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@SebAaltonen Actually this is a super important question IMO.
@@ -36,144 +36,144 @@ opcodes have {6-bit wait barrier mask, 3-bit read barrier index, 3-bit write bar
So don't need a u64 bitmask
-**2/**
+**2/** @NOTimothyLottes
@SebAaltonen AMD pre-GCN was a fixed TEX/ALU clause based arch. GCN went to their counter system (decade+ back). So there is a very long compiler & HW design technical debt inertia probably keeping the HW design on this counter based evolutionary tract
-**3/**
+**3/** @NOTimothyLottes
@SebAaltonen K$ loads are out of order, so the only counter that makes any sense is 0, ie waiting until all prior loads have finished.
VMEM loads had traditionally been in-order only so counter made more sense. AMD's compiler would trickle-feed waits so tiny bits of VALU could move forward..
-**4/**
+**4/** @NOTimothyLottes
@SebAaltonen Vs say pre-GCN which was all-or-nothing. And vs NV which is all (for the mask of 6 barriers or nothing). So I think the counter design mixed with in-order VMEM was an attempt to reduce latency at the time
-**5/**
+**5/** @NOTimothyLottes
@SebAaltonen And also keep in mind TEX$ had traditionally been very small with respect to the number of clients (waves). So cacheline life was quite short, so in-order with counter like this might have had line-life benefits
-**6/**
+**6/** @NOTimothyLottes
@SebAaltonen However in modern times TEX$ is bigger, and ALU issue is faster (compared to GCN's round robin wave64 on simd16). Also modern GPUs have operand caching. And trickle feeding waitcnts would break operand caching (more irregular switching to other waves) ...
-**7/**
+**7/** @NOTimothyLottes
@SebAaltonen And at the point where vector memory requests can go out-of-order (hit-under-miss, etc), counters are just legacy baggage that might not really make sense any more ...
-**8/**
+**8/** @NOTimothyLottes
@SebAaltonen Also the elephant in the room, dynamic wave scheduling. In theory with a chunky granularity design like NVIDIA, NVIDIA could build in hardware wave scheduling something that tries to keep waves at similar barriers! ->
-**9/**
+**9/** @NOTimothyLottes
@SebAaltonen -> Meaning better uniform forward progress of groups of waves. Trying to keep higher cache reuse. Where as AMD oldest first does allow the older wave(s) to get extremely out-of-sync with possible cache reuse across waves
-**10/**
+**10/** @NOTimothyLottes
@SebAaltonen On AMD I've always wanted to try to play with waitcnt placement for better dynamic scheduling (chunky vs fine-granularity, etc) BUT AMD refuses to ever allow ASM shaders in CS VK (even though ROCm supports ASM shaders without VK) ->
-**11/**
+**11/** @NOTimothyLottes
@SebAaltonen I do know traditionally that AMD often has a lot of trouble getting to 100% utilization of ALU-bound stuff. Typically sitting in the low 90%s instead, all due to wave scheduling (oldest first VALU base camping, preventing other waves to get VMEM issue out = bubbles) ->
-**12/**
+**12/** @NOTimothyLottes
@SebAaltonen AMD also wouldn't provide any access to s_setprio via intrinsics. So the two most important scheduling tools {waitcnt placement/grouping,setprio} are simply non-accessible to us "idiots" (who could never actually responsibly use intrinsics)
-**13/**
+**13/** @NOTimothyLottes
@SebAaltonen So what we actually do on AMD, is to do semi-persistent (or fully persistent) waves that instead of exiting, loop through groups of work instead. And this can sometimes actually fix HW scheduling issues by depending on oldest-first schedule behavior ->
-**14/**
+**14/** @NOTimothyLottes
@SebAaltonen Effectively the more scheduling one takes away from the dynamic HW scheduler and places instead into the static scheduling of a compiler, often seriously improves behavior by removing the worst case dynamic irregular behavior at runtime ->
-**15/**
+**15/** @NOTimothyLottes
@SebAaltonen I say "sometimes" because if you get out of I$ you hit perf death. And if the compiler explodes VGPR count then typically it can also be perf-death too
-**16/**
+**16/** @NOTimothyLottes
@SebAaltonen Historically the highest utilization stuff on AMD hardware would be 4-2 waves/SIMD actually [multiple work/wave] ... which will come to a surprise to UE material shader people who are dead in the water on performance at that wave count [single work/wave] ...
-**17/**
+**17/** @NOTimothyLottes
@SebAaltonen [IRONY] those who actually know what they are doing on AMD are fixed high-register-count low-wave-count persistent-wave folks with unrolling and static scheduling-focused (VS) the masses are lower-register-count high-wave-count non-persistent-wave dynamic-sched focused
-**18/**
+**18/** @NOTimothyLottes
@SebAaltonen One other point: in HW, how many waves should one actually keep live? The answer is only enough to reach high highest perf. But how does one build hardware to do that? With NVIDIA's design I think it is a lot easier, with the chunky barriers
-**19/**
+**19/** @SebAaltonen
@NOTimothyLottes I said WG_RR_EN (round-robin arbitration) in the RDNA4 ISA-docs, but no explanation. Wondering what this is.
-**20/**
+**20/** @NOTimothyLottes
@SebAaltonen I think it means oldest-workgroup first scheduling with round-robin scheduling across waves in the workgroups at the given workgroup priorities.
-**21/**
+**21/** @AgileJebrim
@NOTimothyLottes @SebAaltonen What about losing shader occupancy and the latency-hiding benefits it provides for memory ops?
-**22/**
+**22/** @NOTimothyLottes
@AgileJebrim @SebAaltonen The higher the occupancy the higher the clients on the caches = the lower the cache/client. So you never actually want highest occupancy, you want lowest occupancy that enables just enough latency hiding to keep highest utilization ...
-**23/**
+**23/** @NOTimothyLottes
@AgileJebrim @SebAaltonen ... To be more detailed, what you really really want, is to keep the memory requests grouped by locality (for highest cache hit rate) and NO unnecessary bubbles in the memory request queues that would result in ALU stalling !!! - this is basic real-world supply chain management
-**24/**
+**24/** @AgileJebrim
@NOTimothyLottes @SebAaltonen Now what if you want to reuse the same shared memory buffer for a larger workgroup rather than needlessly duplicating it with many smaller workgroups? Wouldn’t that be an argument for a larger workgroup size than 64,1,1?
-**25/**
+**25/** @NOTimothyLottes
@AgileJebrim @SebAaltonen Right, that is the CU-sized workgroup. Something that takes over the full CU. That is one of the persistent-wave usage models. But a CU-sized workgroup for non-persistent work is perf-death, because of the idle time during workgroup barriers (horrible with oldest-wave sched)
-**26/**
+**26/** @AgileJebrim
@NOTimothyLottes @SebAaltonen I’m not as well versed in AMD. 4 SIMDs per CU, so do 64x4 = 256 invocations per workgroup?
-**27/**
+**27/** @NOTimothyLottes
@AgileJebrim @SebAaltonen That topic gets complex with RDNA: CU vs WGP mode, wave32 vs wave64, 8 vs 12 VGPRs per allocation granularity, etc
-**28/**
+**28/** @AgileJebrim
@NOTimothyLottes @SebAaltonen Managed to get this info out of Grok.
-**29/**
+**29/** @AgileJebrim
@NOTimothyLottes @SebAaltonen Oh.
-**30/**
+**30/** @AgileJebrim
@NOTimothyLottes @SebAaltonen Seems like just using 128 is a safe bet for most hardware?
-**31/**
+**31/** @NOTimothyLottes
@AgileJebrim @SebAaltonen Yeah safe bet like one-size-fits-all unisex underwear
-**32/**
+**32/** @AgileJebrim
@NOTimothyLottes @SebAaltonen 😆
-**33/**
+**33/** @AgileJebrim
On the flip side, it appears that using 128 would only use half the register file capacity on each. If we did 256 instead, then when the hardware scheduler became active, I imagine it’d only have a single choice to choose from for another thread to schedule and can use 255-256 registers each?
-**34/**
+**34/** @AgileJebrim
@NOTimothyLottes @SebAaltonen I’m imagining scheduler going back and forth between the same two SIMDs but dunno if such even distribution is what would actually happen in practice?
diff --git a/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/index.md b/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/index.md
index c852a17..c454823 100644
--- a/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/index.md
+++ b/archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @SebAaltonen
Stupid hardware question: Why does AMD use several counters instead of one u64 bitmask for memory ops?
Each load/store would have a bit index and wait would have a bitmask (marked bits need to be set = finished).
@@ -34,10 +34,10 @@ Each load/store would have a bit index and wait would have a bitmask (marked bit
Branches: [[archive/threads/SebAaltonen/2025-03-08-stupid-hardware-question-why-does-amd-use-several/2025-03-08-NOTimothyLottes-actually-this-is-a-super-important-question-imo]]
-**2/**
+**2/** @SebAaltonen
I am glad that RDNA4 has separate counters for sampling (long latency) and lower latency raw loads now. That's a good improvement.
-**3/**
+**3/** @SebAaltonen
Some thoughts: Compiler managed bitfield slot indices would be iffy with loops and branches. One bit per register (big bitfield) would always work, but that would be much more than 64 bits. And wait instructions would be iffy (how to describe a massive bitfield).
diff --git a/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/2025-03-28-VoxelBoy-any-tips-or-existing-solutions-on-achieving.md b/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/2025-03-28-VoxelBoy-any-tips-or-existing-solutions-on-achieving.md
index 7a7dd92..3501f0e 100644
--- a/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/2025-03-28-VoxelBoy-any-tips-or-existing-solutions-on-achieving.md
+++ b/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/2025-03-28-VoxelBoy-any-tips-or-existing-solutions-on-achieving.md
@@ -26,55 +26,55 @@ parent_post_id: "1905523331496828964"
## Branch
-**1/**
+**1/** @VoxelBoy
@SebAaltonen Any tips or existing solutions on achieving something similar in Unity? (in terms of indoor lighting)
-**2/**
+**2/** @BenSimsTech
@VoxelBoy @SebAaltonen In Unity I do it this way: Custom EnvProbe component, capture gbuffer albedo normal and depth into cubemap on load. Pick 1 probe per frame and relight similar to deferred lighting using current sun/sky etc. Convolve to SH for diffuse and GGX for spec. Combine during deferred pass
-**3/**
+**3/** @BenSimsTech
@VoxelBoy @SebAaltonen This is a custom pipeline though. You'll need a decent amount of graphics code/shaders to get it working, will be very hard to retrofit into HDRP, might be feasible in URP/BiRP. I'm still working on it, may switch to octmaps instead of cubemaps. Unity is still very behind with GI
-**4/**
+**4/** @VoxelBoy
@BenSimsTech @SebAaltonen Also, with your custom render pipeline, how easy would you say it is to exceed URP performance if what’s being used are the most basic features such as Lit shader + lightmaps? Is there a lot of cruft in URP that causes overhead in your opinion?
-**5/**
+**5/** @BenSimsTech
@VoxelBoy @SebAaltonen URP is reasonably lightweight, depends what you're targeting though. For low-end mobile/mobile VR there's a few uneccessary copies/blits etc for things like color grading, depth reads, MSAA resolves etc. Lights are only culled on per-object basis which can waste performance too.
-**6/**
+**6/** @Alecazam123
@BenSimsTech @VoxelBoy @SebAaltonen I don’t think msaa is worth it on TBDR. Too much bandwidth shuffling tiles on/off. And avoiding swapping out say depth is tough.
-**7/**
+**7/** @NOTimothyLottes
@Alecazam123 @BenSimsTech @VoxelBoy @SebAaltonen MSAA+tiler makes sense if no post, assuming one does inline 4 sample tonemap before box summation (HW resolve). Have to super sample alpha test and set coverage mask, and super-sample depth for soft particle blend. Neither should require depth export if HW is good
-**8/**
+**8/** @Alecazam123
@NOTimothyLottes @BenSimsTech @VoxelBoy @SebAaltonen Gpu occlusion needs hierZ. Just not worth it IMHO.
-**9/**
+**9/** @NOTimothyLottes
@Alecazam123 @BenSimsTech @VoxelBoy @SebAaltonen Good HW in theory with wave ops on a full-screen triangle could read the MSAA depth and do an inline down-sample for the wave tile without ever needing to export MSAA depth, hierZ done with last frame's reduced depth and speculation should work for HZB occlusion
-**10/**
+**10/** @NOTimothyLottes
@Alecazam123 @BenSimsTech @VoxelBoy @SebAaltonen On a tiler you don't do mid-frame readback feeding any kind of geometry because the tiler geo passes are too latent (do all VS for the view for tile chunking, then PS)
-**11/**
+**11/** @NOTimothyLottes
@Alecazam123 @BenSimsTech @VoxelBoy @SebAaltonen The MSAA alternative I was pushing for at Unity for "general purpose" deferred g-buffer stuff was 1:2x2 nearest scaling mixed with 8x area STP (scaling-TAA), and hopefully eventually CS based index culling (to keep triangle, and thus chucker DRAM round trip bandwidth low)
-**12/**
+**12/** @Alecazam123
@NOTimothyLottes @BenSimsTech @VoxelBoy @SebAaltonen Still a lot of limitations on depth/stencil and color msaa resolves and iOS. Hw only has it all around A13. Nice sample shaders for tonemap prior to resolve. Still think TAA is the most flexible/affordable. Plus msaa lowers tile size from 32x32@1x to 16x16@4x.
-**13/**
+**13/** @NOTimothyLottes
@Alecazam123 @BenSimsTech @VoxelBoy @SebAaltonen MSAA/TAA doesn't change the problem with mid-frame CPU read back. Id still probably go with a mix of vintage precomputed clustered visibility (ratchet and clank style) and model LOD for the static geo of a tri based mobile engine
diff --git a/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/index.md b/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/index.md
index 49add1b..e5ce7be 100644
--- a/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/index.md
+++ b/archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @SebAaltonen
Indoor scenes in HypeHype are starting to look acceptable. This has no baked lighting. Only a single oct-map (conv.mips) for indirect specular and diffuse, masked with screen space AO (GTAO). No sunlight and no local lights (local lights are coming in a few months).
@@ -35,15 +35,15 @@ Game by Allu
Branches: [[archive/threads/SebAaltonen/2025-03-28-indoor-scenes-in-hypehype-are-starting-to-look/2025-03-28-VoxelBoy-any-tips-or-existing-solutions-on-achieving]]
-**2/**
+**2/** @SebAaltonen
We just shipped textures. This game is using older "pixart" assets only, which allows you to put diffuse-only textures in sprites. The ground and walls are 3d sprites in this game. The new material system allows full PBR texture sets (diffuse, normal, roughness, metallic, AO).
-**3/**
+**3/** @SebAaltonen
Local light system is shipping before summer. This will be a big improvement for indoor game visual quality. Direct lighting is important, especially when you can't bake lightmaps. Our local lights also have shadows. One big texture atlas caches all local light shadow maps.
-**4/**
+**4/** @SebAaltonen
Example of a game textured with the new PBR material system:
https://x.com/JohannesVuorine/status/1903305450969526504
@@ -52,7 +52,7 @@ Both games are running smoothly on dirt cheap <$99 phones with all the tech runn
Game by @DanielPalmiArt
-**5/**
+**5/** @SebAaltonen
@DanielPalmiArt Old HypeHype indoor pictures before we landed screen space AO (GTAO) and oct-map indirect lighting. Old version had gradient based indirect lighting. Gradient is bad for indoors, since all wall normals face to horizon direction == same gradient color. And shadow masks sun out.
@@ -60,7 +60,7 @@ Game by @DanielPalmiArt
-**6/**
+**6/** @SebAaltonen
@DanielPalmiArt Exactly one-year-old build versus the latest build. Quite a massive improvement in one year in visuals.
diff --git a/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/2026-08-05-NOTimothyLottes-that-clause-based-arch-was-interesting-in-many.md b/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/2026-08-05-NOTimothyLottes-that-clause-based-arch-was-interesting-in-many.md
index 2c51378..d3cfc08 100644
--- a/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/2026-08-05-NOTimothyLottes-that-clause-based-arch-was-interesting-in-many.md
+++ b/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/2026-08-05-NOTimothyLottes-that-clause-based-arch-was-interesting-in-many.md
@@ -26,27 +26,27 @@ parent_post_id: "2084985800836477433"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@Triang3l That clause based arch was interesting in many ways, mem clause articulates the boundary for write combining. Was also easy to engineer slow perf by fine granularity predication too.
-**2/**
+**2/** @Triang3l
@NOTimothyLottes But what is even a memory clause when MEM_RAT is a control flow instruction, or did the GPU group consecutive MEM_RATs into an implicit "clause"? I also wonder when you can mix RAT and RAT_CACHELESS (the OpenCL compiler apparently just stops using DB at all if CB is ever needed).
-**3/**
+**3/** @NOTimothyLottes
@Triang3l My understanding is that youd need UNCACHED for both write and read. So wouldn’t be all that useful perf wise. My guess is the transition from MEM_EXPORT to MEM_RD (where youd do UNCACHED) implicitly waits for uncached write visibility.
-**4/**
+**4/** @Triang3l
@NOTimothyLottes Yeah, I really hope so… But I guess I should just look at D3D11/GL/CL shader dumps. So many scary things involved, like WAIT_ACK, and that mention of SCOption_R800_UAV_NONUAV_SYNC_WORKAROUND_BUG216513_1 in disassembly. Unless they just fall back to RAT NOP_RTN for all loads 🤷♂️
-**5/**
+**5/** @NOTimothyLottes
@Triang3l Haha oops, very foggy, sounds like it is explicit via WAIT_ACK, rather than implicit. Fees like the predecessor to s_waitcnt in many respects.
-**6/**
+**6/** @NOTimothyLottes
@Triang3l There are a lot of good cases to have the same memory bound as read and write simultaneously, but under an implicit contract of no r/w overlap for a given cache line . Then dont need uncached reads, but probly would need WAIT_ACK still if write order visibility matters.
diff --git a/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/index.md b/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/index.md
index 1c6a341..b307a9c 100644
--- a/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/index.md
+++ b/archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @Triang3l
"writes … have write-only caches that are invalidated, and all update bits are sent to memory AT THE END OF A CLAUSE"
@@ -35,7 +35,7 @@ Far easier to list what makes sense in TeraScale compute shaders than what doesn
Branches: [[archive/threads/Triang3l/2026-08-05-writes-have-write-only-caches-that-are/2026-08-05-NOTimothyLottes-that-clause-based-arch-was-interesting-in-many]]
-**2/**
+**2/** @Triang3l
A clause is a sequence of ALU, buffer/texture SRV fetch, or LDS/GDS instructions.
@@ -43,6 +43,6 @@ However, UAV writes are "control flow" export instructions outside clauses.
But you can read from buffer UAVs via uncached SRVs (quicker), but what if you read in the first clause after the write?
-**3/**
+**3/** @Triang3l
(Though it's pretty pointless to read back the value just written to an SSBO, but with storage texel buffers that may be done for format conversion.)
diff --git a/archive/threads/VPCOMPRESSB/2025-11-10-im-not-familiar-with-your-problem/index.md b/archive/threads/VPCOMPRESSB/2025-11-10-im-not-familiar-with-your-problem/index.md
index a57bf93..2a76714 100644
--- a/archive/threads/VPCOMPRESSB/2025-11-10-im-not-familiar-with-your-problem/index.md
+++ b/archive/threads/VPCOMPRESSB/2025-11-10-im-not-familiar-with-your-problem/index.md
@@ -27,6 +27,6 @@ in_reply_to: "1987733345628013014"
## Thread
-**1/**
+**1/** @VPCOMPRESSB
@NOTimothyLottes i'm not familiar with your problem.
diff --git a/archive/threads/VPCOMPRESSB/2025-11-20-no-tokens-and-no-asts/index.md b/archive/threads/VPCOMPRESSB/2025-11-20-no-tokens-and-no-asts/index.md
index cdbaceb..d23d2a7 100644
--- a/archive/threads/VPCOMPRESSB/2025-11-20-no-tokens-and-no-asts/index.md
+++ b/archive/threads/VPCOMPRESSB/2025-11-20-no-tokens-and-no-asts/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @VPCOMPRESSB
no Tokens and no ASTs. (easier because its Forth-like).
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xAgathosDaimon-the-real-crime-is-those-idiots-not-knowing-who.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xAgathosDaimon-the-real-crime-is-those-idiots-not-knowing-who.md
index e5306fc..b23cfe1 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xAgathosDaimon-the-real-crime-is-those-idiots-not-knowing-who.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xAgathosDaimon-the-real-crime-is-those-idiots-not-knowing-who.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @0xAgathosDaimon
@VictorTaelin the real crime is those idiots not knowing who you are or your work.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xbadface1-what-do-you-mean-by-arguments-to-recursion.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xbadface1-what-do-you-mean-by-arguments-to-recursion.md
index e309e27..dfc5f1b 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xbadface1-what-do-you-mean-by-arguments-to-recursion.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-0xbadface1-what-do-you-mean-by-arguments-to-recursion.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @0xbadface1
@VictorTaelin What do you mean by arguments to recursion "decreasing"? ... that looks a bit too "specific" - is that just some layman description of something more general and rigorous?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-An0o0o0o0n-im-not-going-to-read-all-that-im-happy-for-you-or.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-An0o0o0o0n-im-not-going-to-read-all-that-im-happy-for-you-or.md
index 712182a..1b3c73b 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-An0o0o0o0n-im-not-going-to-read-all-that-im-happy-for-you-or.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-An0o0o0o0n-im-not-going-to-read-all-that-im-happy-for-you-or.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @An0o0o0o0n
@VictorTaelin Im not going to read all that, I'm happy for you or sorry that happened.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-AutorRecomienda-fable-simplemente-hizo-de-placa-base-pitando-para.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-AutorRecomienda-fable-simplemente-hizo-de-placa-base-pitando-para.md
index 7f11521..f13a040 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-AutorRecomienda-fable-simplemente-hizo-de-placa-base-pitando-para.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-AutorRecomienda-fable-simplemente-hizo-de-placa-base-pitando-para.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @AutorRecomienda
@VictorTaelin Fable simplemente hizo de placa base pitando para avisar del error, pero la solución elegante y real requería a alguien al volante.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Court_Reinland-this-is-an-s-tier-post-1-it-proves-non-slop.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Court_Reinland-this-is-an-s-tier-post-1-it-proves-non-slop.md
index 177a56c..0d231d0 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Court_Reinland-this-is-an-s-tier-post-1-it-proves-non-slop.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Court_Reinland-this-is-an-s-tier-post-1-it-proves-non-slop.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Court_Reinland
@VictorTaelin This is an S tier post! 1. It proves non-slop brained people exist 2. That they use this site successfully and it’s not all a bot minefield. 3. I don’t know what country you’re from but Happy American 4th! 🇺🇸
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ETazou-i-understood-5-but-i-still-enjoyed-it.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ETazou-i-understood-5-but-i-still-enjoyed-it.md
index e4b0b41..a8def7f 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ETazou-i-understood-5-but-i-still-enjoyed-it.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ETazou-i-understood-5-but-i-still-enjoyed-it.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @ETazou
@VictorTaelin i understood 5% but i still enjoyed it
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-EttoreMariotti-thanks.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-EttoreMariotti-thanks.md
index 0967039..f9fc1dd 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-EttoreMariotti-thanks.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-EttoreMariotti-thanks.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @EttoreMariotti
@VictorTaelin Thanks
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Foxfire1st-you-speak-simply-into-a-mixed-space-where-most.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Foxfire1st-you-speak-simply-into-a-mixed-space-where-most.md
index 0ce1e90..da8d645 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Foxfire1st-you-speak-simply-into-a-mixed-space-where-most.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Foxfire1st-you-speak-simply-into-a-mixed-space-where-most.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Foxfire1st
You speak simply into a mixed space where most people including me are on the "application layer". Agents, orchestration systems, memory, coding scaffolding. You are way more upstream in the stack. So while I can't find a use case for my own projects I still find it interesting to read how you go about problems. The "how" is universal and can be re-applied to other areas. And the best "hows" come from people who are wrestling with the core of mathematics and logic. Just my 2 cents.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-IncidentNoodle-this-is-a-great-post-i-cant-pretend-that-i-really.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-IncidentNoodle-this-is-a-great-post-i-cant-pretend-that-i-really.md
index 6d4c9b8..ff98873 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-IncidentNoodle-this-is-a-great-post-i-cant-pretend-that-i-really.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-IncidentNoodle-this-is-a-great-post-i-cant-pretend-that-i-really.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @IncidentNoodle
@VictorTaelin This is a great post! I can’t pretend that I really get the math, but it’s obvious that you understand what you’re talking about.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Juanpinha11-i-never-thought-you-had-ai-psychosis-but-the-fact.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Juanpinha11-i-never-thought-you-had-ai-psychosis-but-the-fact.md
index 0473900..1fcb1a1 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Juanpinha11-i-never-thought-you-had-ai-psychosis-but-the-fact.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Juanpinha11-i-never-thought-you-had-ai-psychosis-but-the-fact.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Juanpinha11
@VictorTaelin I never thought you had AI psychosis, but the fact that others thought so led to this wonderful explanation. It makes me want to learn more about Bend2.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kinch_ahoy-i-got-interested-in-bend-for-its-prosaic.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kinch_ahoy-i-got-interested-in-bend-for-its-prosaic.md
index 7d02f44..d050057 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kinch_ahoy-i-got-interested-in-bend-for-its-prosaic.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kinch_ahoy-i-got-interested-in-bend-for-its-prosaic.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Kinch_ahoy
@VictorTaelin I got interested in Bend for its prosaic capabilities. What’s the logic behind trying to make it a theorem prover? Language design should be a flight of fancy, so I approve, but I don’t think I’ve seen you write up why you are colliding these worlds.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kmmer11133-i-enjoyed-reading-this-post-i-think-that-what.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kmmer11133-i-enjoyed-reading-this-post-i-think-that-what.md
index 96c1c8f..bb1c9bd 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kmmer11133-i-enjoyed-reading-this-post-i-think-that-what.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Kmmer11133-i-enjoyed-reading-this-post-i-think-that-what.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Kmmer11133
@VictorTaelin I enjoyed reading this post. I think that what you're currently working on is the most profound and important thing next to AI. I believe that it will practically open the door to reaching kolmogorov complexity compression and as we all know:
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LeeeeeeeeeT_-i-once-implemented-a-type-checker-for.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LeeeeeeeeeT_-i-once-implemented-a-type-checker-for.md
index fd3c78e..e1e8560 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LeeeeeeeeeT_-i-once-implemented-a-type-checker-for.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LeeeeeeeeeT_-i-once-implemented-a-type-checker-for.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @LeeeeeeeeeT_
@VictorTaelin i once implemented a type checker for impredicative MLTT. i then tried to reproduce hurkens' paradox (simplified girard's paradox) - my type checker got stuck in an infinite loop. so.. you couldn't prove false in it, it just never terminated
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LusciousPear-i-love-this-shit.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LusciousPear-i-love-this-shit.md
index 2fd6cee..5572cac 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LusciousPear-i-love-this-shit.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-LusciousPear-i-love-this-shit.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @LusciousPear
@VictorTaelin I love this shit
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MancerAI_-its-lonely-sometimes-eh-im-excited-about-your.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MancerAI_-its-lonely-sometimes-eh-im-excited-about-your.md
index 74b4e41..00717fe 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MancerAI_-its-lonely-sometimes-eh-im-excited-about-your.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MancerAI_-its-lonely-sometimes-eh-im-excited-about-your.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @MancerAI_
@VictorTaelin It's lonely sometimes eh? I'm excited about your stuff and love your posts but I don't know a lot about lambda calculus etc. Applications are amazing though
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MoisasADR-os-caras-acham-que-s-eles-s-o-superinteligentes.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MoisasADR-os-caras-acham-que-s-eles-s-o-superinteligentes.md
index eb10358..399f1aa 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MoisasADR-os-caras-acham-que-s-eles-s-o-superinteligentes.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-MoisasADR-os-caras-acham-que-s-eles-s-o-superinteligentes.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @MoisasADR
@VictorTaelin os caras acham que só eles são superinteligentes mas não conseguem enxergar alem da bolha que ele mesmo se coloca entre os '' inteligentes '', que tipo de inteligência é essa ? é a vida de um engenheiro médio que trabalha em um lab de IA em SF kkkkk
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-NickChapmn-y-combinators-dont-have-valid-types-so-you-are.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-NickChapmn-y-combinators-dont-have-valid-types-so-you-are.md
index e9726df..bc4a81c 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-NickChapmn-y-combinators-dont-have-valid-types-so-you-are.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-NickChapmn-y-combinators-dont-have-valid-types-so-you-are.md
@@ -26,19 +26,19 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @NickChapmn
@VictorTaelin y-combinators don't have valid types, so you are safe from them in statically typed functional languages.
-**2/**
+**2/** @VictorTaelin
@NickChapmn that's absolutely false. you can construct the Y-Combinator and even λf.f(f) λf.f(f) in Haskell, Rust, TypeScript, and so on, even though these are statically typed functional language, through paradoxes like the ones I mentioned above. non-terminating languages are inconsistent
-**3/**
+**3/** @NickChapmn
@VictorTaelin Ok they are invalid if you don't allow recursive types
-**4/**
+**4/** @VictorTaelin
@NickChapmn yes
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-impossibility-to-write-fast-interpreter-looks.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-impossibility-to-write-fast-interpreter-looks.md
index aaba80f..f352ee7 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-impossibility-to-write-fast-interpreter-looks.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-impossibility-to-write-fast-interpreter-looks.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Pitometsu
@VictorTaelin Impossibility to write *fast* interpreter looks like a hardware architecture or compiler issue, not the language expressive power problem.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-qtt-approach-for-this-is-very-elegant-indeed.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-qtt-approach-for-this-is-very-elegant-indeed.md
index 1476754..65d4a83 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-qtt-approach-for-this-is-very-elegant-indeed.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Pitometsu-qtt-approach-for-this-is-very-elegant-indeed.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Pitometsu
@VictorTaelin QTT approach for this is very elegant indeed!
Elegantly works in relevance setting as well.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Rafa_Schwinger-no-i-prefer-the-previous-angry-rhetoric-pls.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Rafa_Schwinger-no-i-prefer-the-previous-angry-rhetoric-pls.md
index 994c182..4f41929 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Rafa_Schwinger-no-i-prefer-the-previous-angry-rhetoric-pls.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Rafa_Schwinger-no-i-prefer-the-previous-angry-rhetoric-pls.md
@@ -26,11 +26,11 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Rafa_Schwinger
@VictorTaelin No, I prefer the previous angry rhetoric pls revert the edit
-**2/**
+**2/** @VictorTaelin
@Rafa_Schwinger these are only for close followers, enjoy
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RealSchmebulog-sorry-im-not-very-technical-did-you-mean-ai-good.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RealSchmebulog-sorry-im-not-very-technical-did-you-mean-ai-good.md
index 2dcf3d4..4c8d4cb 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RealSchmebulog-sorry-im-not-very-technical-did-you-mean-ai-good.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RealSchmebulog-sorry-im-not-very-technical-did-you-mean-ai-good.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @RealSchmebulog
@VictorTaelin Sorry, im not very technical. Did you mean AI good or AI bad this time?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RizwanKhuharo-angry-ones-always-get-attention-on-internet.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RizwanKhuharo-angry-ones-always-get-attention-on-internet.md
index a33eeee..c44427a 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RizwanKhuharo-angry-ones-always-get-attention-on-internet.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-RizwanKhuharo-angry-ones-always-get-attention-on-internet.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @RizwanKhuharo
@VictorTaelin angry one's always get attention on internet
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SdoGtnepreS-dont-let-them-get-you-down-they-can-barely-see.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SdoGtnepreS-dont-let-them-get-you-down-they-can-barely-see.md
index 88bc816..02047cf 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SdoGtnepreS-dont-let-them-get-you-down-they-can-barely-see.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SdoGtnepreS-dont-let-them-get-you-down-they-can-barely-see.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @SdoGtnepreS
@VictorTaelin Don't let them get you down. They can barely see the now, much less the future.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SoritesMinor-keep-posting-and-ill-keep-reading-or-trying-to.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SoritesMinor-keep-posting-and-ill-keep-reading-or-trying-to.md
index c1d78fb..d8582ae 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SoritesMinor-keep-posting-and-ill-keep-reading-or-trying-to.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-SoritesMinor-keep-posting-and-ill-keep-reading-or-trying-to.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @SoritesMinor
@VictorTaelin Keep posting and I'll keep reading. Or trying to.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ThePremiseOfIt-theres-an-emergent-ai-psychosis-psychosis-in.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ThePremiseOfIt-theres-an-emergent-ai-psychosis-psychosis-in.md
index 5d2b4a4..dc654ad 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ThePremiseOfIt-theres-an-emergent-ai-psychosis-psychosis-in.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-ThePremiseOfIt-theres-an-emergent-ai-psychosis-psychosis-in.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @ThePremiseOfIt
@VictorTaelin There's an emergent ai psychosis psychosis in which idiots can't understand what you're saying so they cry "AI psychosis." It's a good litmus test for someone's intelligence, imho. Twice someone has suggested I'm expressing AI psychosis, but it was a tell on them.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-TheeKruger-i-think-this-is-a-super-legible-digestible.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-TheeKruger-i-think-this-is-a-super-legible-digestible.md
index 5baf23e..6d19150 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-TheeKruger-i-think-this-is-a-super-legible-digestible.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-TheeKruger-i-think-this-is-a-super-legible-digestible.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @TheeKruger
@VictorTaelin I think this is a super legible, digestible, accessible, and coherent take. Well said, exceptionally based.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Trevor62271128-i-cant-really-comprehend-what-bend2-will-be.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Trevor62271128-i-cant-really-comprehend-what-bend2-will-be.md
index 1f5b277..9bab4f1 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Trevor62271128-i-cant-really-comprehend-what-bend2-will-be.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Trevor62271128-i-cant-really-comprehend-what-bend2-will-be.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Trevor62271128
@VictorTaelin I can't really comprehend what Bend2 will be useful for except helping to make bug free software. With AI constantly getting better and better that purpose sounds mundane to me now. However, I'm very interested to see what you come up with for symbolic AI.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Unblinking3Y3-bro-you-dont-hafta-grug-post-to-be-popular-with.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Unblinking3Y3-bro-you-dont-hafta-grug-post-to-be-popular-with.md
index 9936b6d..192d7e4 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Unblinking3Y3-bro-you-dont-hafta-grug-post-to-be-popular-with.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-Unblinking3Y3-bro-you-dont-hafta-grug-post-to-be-popular-with.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Unblinking3Y3
@VictorTaelin Bro, you dont hafta Grug-post to be popular with the right people.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-VincentLejeune-the-more-ai-advances-the-more-we-need-very-high.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-VincentLejeune-the-more-ai-advances-the-more-we-need-very-high.md
index 7dc5e10..2da7950 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-VincentLejeune-the-more-ai-advances-the-more-we-need-very-high.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-VincentLejeune-the-more-ai-advances-the-more-we-need-very-high.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @VincentLejeune
@VictorTaelin The more AI advances, the more we need very high level experts in very very specialzed narrow fields, to check results ! ❤️
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-WayneBrown6922-i-began-following-you-when-i-scrolled-across-an.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-WayneBrown6922-i-began-following-you-when-i-scrolled-across-an.md
index e78db44..6996ef3 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-WayneBrown6922-i-began-following-you-when-i-scrolled-across-an.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-WayneBrown6922-i-began-following-you-when-i-scrolled-across-an.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @WayneBrown6922
@VictorTaelin I began following you when I scrolled across an image similar to that above, it is the highly technical stuff you post that I enjoy most. Just about everyone else in my timeline I have to "see fewer" but I'll search for yours. Keep up the amazing work, here for the long haul!
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-YgorIsm-texto-mt-bem-escrito-ficou-bem-mais-f-cil-de.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-YgorIsm-texto-mt-bem-escrito-ficou-bem-mais-f-cil-de.md
index 08cf39e..64a95f1 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-YgorIsm-texto-mt-bem-escrito-ficou-bem-mais-f-cil-de.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-YgorIsm-texto-mt-bem-escrito-ficou-bem-mais-f-cil-de.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @YgorIsm
@VictorTaelin Texto mt bem escrito, ficou bem mais fácil de entender os seus objetivos
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-adelbucetta-sometimes-the-problem-isnt-explaining-something.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-adelbucetta-sometimes-the-problem-isnt-explaining-something.md
index 55b54e9..3ee6ed8 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-adelbucetta-sometimes-the-problem-isnt-explaining-something.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-adelbucetta-sometimes-the-problem-isnt-explaining-something.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @adelbucetta
@VictorTaelin sometimes the problem isn't explaining something that's hard for people to grasp, but rather getting people to admit when they don't get it
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-altansukhbatbay-high-quality-post.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-altansukhbatbay-high-quality-post.md
index a562817..985f21b 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-altansukhbatbay-high-quality-post.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-altansukhbatbay-high-quality-post.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @altansukhbatbay
@VictorTaelin high quality post!
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-anghel4d-im-a-big-fan-of-interaction-combinators-and-i.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-anghel4d-im-a-big-fan-of-interaction-combinators-and-i.md
index 075f825..7b82f12 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-anghel4d-im-a-big-fan-of-interaction-combinators-and-i.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-anghel4d-im-a-big-fan-of-interaction-combinators-and-i.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @anghel4d
@VictorTaelin I'm a big fan of Interaction Combinators and I hope you keep going. Git push your changes to bend sometime :p
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-billylevin-this-is-so-cool-and-inspiring-not-that-i.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-billylevin-this-is-so-cool-and-inspiring-not-that-i.md
index de4e1e7..faccd59 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-billylevin-this-is-so-cool-and-inspiring-not-that-i.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-billylevin-this-is-so-cool-and-inspiring-not-that-i.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @billylevin
@VictorTaelin This is so cool and inspiring (not that I understand all of it; that’s part of what makes it inspiring!). I hope you won’t be dissuaded from posting this kind of thing if you want to in future. Many people (such as me who rarely engages with stuff on here) will be thankful!
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-carmim_13-adorei-ler-esse-post-timo-poder-ler-de-voc-essas.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-carmim_13-adorei-ler-esse-post-timo-poder-ler-de-voc-essas.md
index a80c814..2db6ed3 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-carmim_13-adorei-ler-esse-post-timo-poder-ler-de-voc-essas.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-carmim_13-adorei-ler-esse-post-timo-poder-ler-de-voc-essas.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @carmim_13
@VictorTaelin adorei ler esse post. é ótimo poder ler de você essas explicações. só uma pergunta. você diria que é *confortável* replicar o Mathlib do Lean para o Bend? acho o Bend muito interessante por conta do IC, acho a teoria elegante. mas, claro, gostaria que o Bend fosse bom em math.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-charlesthefool-do-people-not-study-lambda-calculus-in-college-or.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-charlesthefool-do-people-not-study-lambda-calculus-in-college-or.md
index 2da137b..068c1e7 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-charlesthefool-do-people-not-study-lambda-calculus-in-college-or.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-charlesthefool-do-people-not-study-lambda-calculus-in-college-or.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @charlesthefool
@VictorTaelin Do people not study lambda calculus in college or at any other point when looking into programming languages?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-dlbydq-these-guys-have-no-idea-what-theyre-talking-about.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-dlbydq-these-guys-have-no-idea-what-theyre-talking-about.md
index e60db67..4be14c9 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-dlbydq-these-guys-have-no-idea-what-theyre-talking-about.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-dlbydq-these-guys-have-no-idea-what-theyre-talking-about.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @dlbydq
@VictorTaelin these guys have no idea what they're talking about. I've enjoyed following your work
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-donalfellows-if-you-have-a-system-that-provably-must-terminate.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-donalfellows-if-you-have-a-system-that-provably-must-terminate.md
index 454745e..e07553d 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-donalfellows-if-you-have-a-system-that-provably-must-terminate.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-donalfellows-if-you-have-a-system-that-provably-must-terminate.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @donalfellows
@VictorTaelin If you have a system that provably must terminate, what "interesting" statements are you unable to express? And what can only be stated in restricted form?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-esa_was_taken-is-another-good-example-this-is-happening-to-both.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-esa_was_taken-is-another-good-example-this-is-happening-to-both.md
index 2c81190..8e1bba0 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-esa_was_taken-is-another-good-example-this-is-happening-to-both.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-esa_was_taken-is-another-good-example-this-is-happening-to-both.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @esa_was_taken
@VictorTaelin @tsotchke is another good example this is happening to. Both so on the frontier people start erroring out when they read it lmfao
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-fecklesstit-u-the-best-man-keep-it-up.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-fecklesstit-u-the-best-man-keep-it-up.md
index 25f8ac6..80170c9 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-fecklesstit-u-the-best-man-keep-it-up.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-fecklesstit-u-the-best-man-keep-it-up.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @fecklesstit
@VictorTaelin U the best man, keep it up 💙
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-habibislop-this-is-a-very-naive-and-ignorant-question-but.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-habibislop-this-is-a-very-naive-and-ignorant-question-but.md
index 3fa0328..f57cad1 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-habibislop-this-is-a-very-naive-and-ignorant-question-but.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-habibislop-this-is-a-very-naive-and-ignorant-question-but.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @habibislop
@VictorTaelin This is a very naive and ignorant question, but now that you've split Type into two sorts, is there anything that could be represented with both variants? and if so, what would happen if someone selected the wrong one for their use csse
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-iabom-sigh-true-brother-we-smart-people-are-alone-no.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-iabom-sigh-true-brother-we-smart-people-are-alone-no.md
index a7dc7ee..7e4337c 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-iabom-sigh-true-brother-we-smart-people-are-alone-no.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-iabom-sigh-true-brother-we-smart-people-are-alone-no.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @iabom
@VictorTaelin *sigh* true brother. We smart people are alone, no one gets us.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-itisnotsavio-one-question-does-bend-have-an-unscoped-lambda.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-itisnotsavio-one-question-does-bend-have-an-unscoped-lambda.md
index c3e7490..2d5332f 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-itisnotsavio-one-question-does-bend-have-an-unscoped-lambda.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-itisnotsavio-one-question-does-bend-have-an-unscoped-lambda.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @itisnotsavio
@VictorTaelin One question: does bend have an unscoped lambda?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kekmaomaster-taelin-ive-been-following-you-since-the-beginning.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kekmaomaster-taelin-ive-been-following-you-since-the-beginning.md
index 1512bec..a3105ed 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kekmaomaster-taelin-ive-been-following-you-since-the-beginning.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kekmaomaster-taelin-ive-been-following-you-since-the-beginning.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @kekmaomaster
@VictorTaelin Taelin I've been following you since the beginning: I think the problem is you need to aggressively position yourself and your program as a painkiller. People need to feel their pain ease as a result of formal + function discovery. You need the palantir-type deployed engineers.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kylemarieb-this-write-up-was-really-well-done-thank-you-for.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kylemarieb-this-write-up-was-really-well-done-thank-you-for.md
index 570d056..aa32fda 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kylemarieb-this-write-up-was-really-well-done-thank-you-for.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-kylemarieb-this-write-up-was-really-well-done-thank-you-for.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @kylemarieb
@VictorTaelin This write up was really well done, thank you for taking the time to write it! Broke down the concepts well
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-marunarh-most-of-you-cant-understand-my-posts-of-course.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-marunarh-most-of-you-cant-understand-my-posts-of-course.md
index 754e8e5..423da3a 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-marunarh-most-of-you-cant-understand-my-posts-of-course.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-marunarh-most-of-you-cant-understand-my-posts-of-course.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @marunarh
@VictorTaelin > most of you can’t understand my posts
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mikejt4-youre-not-allowed-to-praise-fable-you-must-bag.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mikejt4-youre-not-allowed-to-praise-fable-you-must-bag.md
index 6c2a7d5..b3f712d 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mikejt4-youre-not-allowed-to-praise-fable-you-must-bag.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mikejt4-youre-not-allowed-to-praise-fable-you-must-bag.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @mikejt4
You’re not allowed to praise Fable, you MUST bag everything on the internet 🤣 And god forbid you do anything genuinely impressive!
I’ve found Fable excellent so far, it’s night and day compared to Opus… Opus stumbles along pretending to be competent, frequently getting canceled when I realise it’s doing something dumb again… Fable picked up the project, found a bunch of strategic issues, replanned, and got everything working rapidly!!
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-misterclayt0n-many-such-cases-https-x-com-misterclayt0n-status.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-misterclayt0n-many-such-cases-https-x-com-misterclayt0n-status.md
index 4ed9578..5c5902f 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-misterclayt0n-many-such-cases-https-x-com-misterclayt0n-status.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-misterclayt0n-many-such-cases-https-x-com-misterclayt0n-status.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @misterclayt0n
@VictorTaelin many such cases
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mprado-loved-this-long-post-version-of-yours-you-should.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mprado-loved-this-long-post-version-of-yours-you-should.md
index a7a731f..fa971f5 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mprado-loved-this-long-post-version-of-yours-you-should.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-mprado-loved-this-long-post-version-of-yours-you-should.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @mprado
@VictorTaelin Loved this long post version of yours. You should do this more often, where you break down a problem for people not familiar with your domain. Very fun read! Thanks
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-noam_yy-i-presume-the-issue-was-in-duplication-inside-0.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-noam_yy-i-presume-the-issue-was-in-duplication-inside-0.md
index afe6b7f..6b9d0c0 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-noam_yy-i-presume-the-issue-was-in-duplication-inside-0.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-noam_yy-i-presume-the-issue-was-in-duplication-inside-0.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @noam_yy
@VictorTaelin I presume the issue was in duplication inside 0-contexts?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-o1lo01ol1o-do-you-allow-for-non-termination-on-total.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-o1lo01ol1o-do-you-allow-for-non-termination-on-total.md
index 5e17a99..5053a38 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-o1lo01ol1o-do-you-allow-for-non-termination-on-total.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-o1lo01ol1o-do-you-allow-for-non-termination-on-total.md
@@ -26,23 +26,23 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @o1lo01ol1o
@VictorTaelin Do you allow for non-termination on total functions on codata?
-**2/**
+**2/** @VictorTaelin
@o1lo01ol1o no codata yet :(
-**3/**
+**3/** @o1lo01ol1o
@VictorTaelin You just use really big counters for services?
-**4/**
+**4/** @VictorTaelin
@o1lo01ol1o ah, yes you could, but on V1 you'd just disable termination checking there. I don't think proving stuff about IO is a big demand, not a priority for V1. we can add support that later
-**5/**
+**5/** @o1lo01ol1o
@VictorTaelin Good
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-okiwano-im-curious-what-comes-after-bend2-bend3-or-are.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-okiwano-im-curious-what-comes-after-bend2-bend3-or-are.md
index 4dc1bf6..35b5aea 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-okiwano-im-curious-what-comes-after-bend2-bend3-or-are.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-okiwano-im-curious-what-comes-after-bend2-bend3-or-are.md
@@ -26,19 +26,19 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @okiwano
@VictorTaelin I'm curious. What comes after Bend2? Bend3 or are you going to move onto smaller more personally satisfying projects after this?
-**2/**
+**2/** @VictorTaelin
@okiwano on HOC, 100% focus on Symbolic AI research
-**3/**
+**3/** @Pitometsu
@VictorTaelin @okiwano Any possibility to join the party? 😅
-**4/**
+**4/** @VictorTaelin
@Pitometsu @okiwano yess
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-pakatanatakata-lemme-aske-gpt-for-translating-your-hieroglyph.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-pakatanatakata-lemme-aske-gpt-for-translating-your-hieroglyph.md
index 47dab7c..b42ad36 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-pakatanatakata-lemme-aske-gpt-for-translating-your-hieroglyph.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-pakatanatakata-lemme-aske-gpt-for-translating-your-hieroglyph.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @pakatanatakata
@VictorTaelin Lemme aske gpt for translating
Your hieroglyph
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-qonundrai-man-i-love-what-ur-doing-keep-going-one-of-the.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-qonundrai-man-i-love-what-ur-doing-keep-going-one-of-the.md
index b5b6e02..51d7572 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-qonundrai-man-i-love-what-ur-doing-keep-going-one-of-the.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-qonundrai-man-i-love-what-ur-doing-keep-going-one-of-the.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @qonundrai
@VictorTaelin man I love what ur doing, keep going! one of the few good uses of AI!
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-rom1504-very-cool-indeed-hard-but-important-to-pick-the.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-rom1504-very-cool-indeed-hard-but-important-to-pick-the.md
index b477f40..0422e25 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-rom1504-very-cool-indeed-hard-but-important-to-pick-the.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-rom1504-very-cool-indeed-hard-but-important-to-pick-the.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @rom1504
@VictorTaelin Very cool. Indeed hard but important to pick the right line on what coding model do vs what you do. One way to think about it is what requires being able to see the consequences 10 years away of some design choices and keep those to yourself.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-taxilogiker-russel-antinomy.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-taxilogiker-russel-antinomy.md
index a40e603..f7c6df3 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-taxilogiker-russel-antinomy.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-taxilogiker-russel-antinomy.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @taxilogiker
@VictorTaelin russel antinomy •_•
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-trinitotolukeno-karpathy-said-he-had-ai-psychosis-for-a-while-and.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-trinitotolukeno-karpathy-said-he-had-ai-psychosis-for-a-while-and.md
index beb4be3..19de754 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-trinitotolukeno-karpathy-said-he-had-ai-psychosis-for-a-while-and.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-trinitotolukeno-karpathy-said-he-had-ai-psychosis-for-a-while-and.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @trinitotolukeno
@VictorTaelin karpathy said he had AI psychosis for a while and everyone knows he's very competent
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-willyrgf-wow-thats-impressive-best-argument-on-the-quality.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-willyrgf-wow-thats-impressive-best-argument-on-the-quality.md
index a8ba98e..dd740f2 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-willyrgf-wow-thats-impressive-best-argument-on-the-quality.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-willyrgf-wow-thats-impressive-best-argument-on-the-quality.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @willyrgf
@VictorTaelin Wow, that's impressive! Best argument on the quality of Fable I have read by far.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-yacineMTB-its-not-how-many-likes-you-get-its-likes-from-who.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-yacineMTB-its-not-how-many-likes-you-get-its-likes-from-who.md
index 6ab62c6..445ba67 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-yacineMTB-its-not-how-many-likes-you-get-its-likes-from-who.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-yacineMTB-its-not-how-many-likes-you-get-its-likes-from-who.md
@@ -26,11 +26,11 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @yacineMTB
@VictorTaelin It's not how many likes you get, it's likes from who that matter. Less likes from better people is my preference
-**2/**
+**2/** @VictorTaelin
@yacineMTB true
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-zyansheep-in-my-language-im-trying-to-do-termination-by.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-zyansheep-in-my-language-im-trying-to-do-termination-by.md
index 473d301..1a69ea2 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-zyansheep-in-my-language-im-trying-to-do-termination-by.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-04-zyansheep-in-my-language-im-trying-to-do-termination-by.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @zyansheep
@VictorTaelin In my language I'm trying to do termination by proxy, I.e. if type checking terminates for a certain validated set of type predicates than the typed program should be guaranteed to not terminate. Thoughts on this strategy?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-IanCSU-sure-i-read-all-that.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-IanCSU-sure-i-read-all-that.md
index 0106a87..7c80f33 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-IanCSU-sure-i-read-all-that.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-IanCSU-sure-i-read-all-that.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @IanCSU
@VictorTaelin sure, I read all that
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-JaredC1728-quality-over-quantity.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-JaredC1728-quality-over-quantity.md
index ff8d652..ce98595 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-JaredC1728-quality-over-quantity.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-JaredC1728-quality-over-quantity.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @JaredC1728
@VictorTaelin Quality over quantity.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-KleeneAlgebra-i-disagree-on-the-consistency-is-enough-to-do.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-KleeneAlgebra-i-disagree-on-the-consistency-is-enough-to-do.md
index cb9c39f..ebeadee 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-KleeneAlgebra-i-disagree-on-the-consistency-is-enough-to-do.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-KleeneAlgebra-i-disagree-on-the-consistency-is-enough-to-do.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @KleeneAlgebra
@VictorTaelin I disagree on the consistency is enough to do mathematics, you can very weird stuff to MLTT like Nat iso Nat -> Nat and still be consistent. I would like to see you convincing a mathematician to do math in that system.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-MadisonP94618-it-was-easy-to-read-and-i-think-i-understood-most.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-MadisonP94618-it-was-easy-to-read-and-i-think-i-understood-most.md
index bc78372..fa6a5c8 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-MadisonP94618-it-was-easy-to-read-and-i-think-i-understood-most.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-MadisonP94618-it-was-easy-to-read-and-i-think-i-understood-most.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @MadisonP94618
@VictorTaelin It was easy to read and I think I understood most of it.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Orbiter777-fable-is-educated-c.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Orbiter777-fable-is-educated-c.md
index 0d94e4e..cd30278 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Orbiter777-fable-is-educated-c.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Orbiter777-fable-is-educated-c.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Orbiter777
@VictorTaelin Fable is educated c
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Siggis_Man-this-is-the-antidote-i-found-to-ai-psychosis-i.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Siggis_Man-this-is-the-antidote-i-found-to-ai-psychosis-i.md
index 510e1b6..a0b8b67 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Siggis_Man-this-is-the-antidote-i-found-to-ai-psychosis-i.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Siggis_Man-this-is-the-antidote-i-found-to-ai-psychosis-i.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Siggis_Man
@VictorTaelin > this is the antidote I found to AI psychosis. I call it "competency"
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SinghSwapneil-are-languages-built-on-bend-incapable-of.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SinghSwapneil-are-languages-built-on-bend-incapable-of.md
index 383d71a..2c5ad64 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SinghSwapneil-are-languages-built-on-bend-incapable-of.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SinghSwapneil-are-languages-built-on-bend-incapable-of.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @SinghSwapneil
@VictorTaelin Are languages built on Bend incapable of representing “eval” then? And/or disallowed from looping possibly-infinitely based on an external signal?
(In-practice both of those are useful operations to interface with reality outside the language VM)
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Snafxemp-loved-ur-rant-these-types-of-posts-deserves.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Snafxemp-loved-ur-rant-these-types-of-posts-deserves.md
index 5d97a0f..5ed0783 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Snafxemp-loved-ur-rant-these-types-of-posts-deserves.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-Snafxemp-loved-ur-rant-these-types-of-posts-deserves.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @Snafxemp
@VictorTaelin loved ur rant. these types of posts deserves attention
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SteveMoraco-legend.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SteveMoraco-legend.md
index da2cb3b..79bec34 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SteveMoraco-legend.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-SteveMoraco-legend.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @SteveMoraco
@VictorTaelin Legend
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-_machi47-im-not-reading-all-that-but-damn-hope-it-works.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-_machi47-im-not-reading-all-that-but-damn-hope-it-works.md
index 20f37a9..4688a2d 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-_machi47-im-not-reading-all-that-but-damn-hope-it-works.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-_machi47-im-not-reading-all-that-but-damn-hope-it-works.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @_machi47
@VictorTaelin I’m not reading all that but damn hope it works out for ya
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-ant1m4tt3r-stupid-question-alert-in-bends-syntax-what-is-the.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-ant1m4tt3r-stupid-question-alert-in-bends-syntax-what-is-the.md
index f569982..e07522a 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-ant1m4tt3r-stupid-question-alert-in-bends-syntax-what-is-the.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-ant1m4tt3r-stupid-question-alert-in-bends-syntax-what-is-the.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @ant1m4tt3r
@VictorTaelin stupid question alert. in bends syntax, what is the difference between -> , ~> and +> ?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-bewajitolulope-feels-like-the-precise-symbolic-analogue-of.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-bewajitolulope-feels-like-the-precise-symbolic-analogue-of.md
index d1365af..7577231 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-bewajitolulope-feels-like-the-precise-symbolic-analogue-of.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-bewajitolulope-feels-like-the-precise-symbolic-analogue-of.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @bewajitolulope
@VictorTaelin Feels like the precise, symbolic analogue of implementing LLM guard rails that aren't too strict and aren't too lax.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-dan_tiema-i-didnt-expect-id-read-all-of-this-but-i-did-cant.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-dan_tiema-i-didnt-expect-id-read-all-of-this-but-i-did-cant.md
index 6a19e41..ee31141 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-dan_tiema-i-didnt-expect-id-read-all-of-this-but-i-did-cant.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-dan_tiema-i-didnt-expect-id-read-all-of-this-but-i-did-cant.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @dan_tiema
@VictorTaelin i didn't expect i'd read all of this, but i did.....can't pretend i understand it, but i'm starting to get the picture.....
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-eshear-to-someone-who-doesnt-understand-the-actual.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-eshear-to-someone-who-doesnt-understand-the-actual.md
index 9e4411a..1dc6f73 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-eshear-to-someone-who-doesnt-understand-the-actual.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-eshear-to-someone-who-doesnt-understand-the-actual.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @eshear
@VictorTaelin To someone who doesn’t understand the actual content, AI psychosis and expert use of AI to drive a breakthrough look the same (modulo institutional credentials). It’s not their fault, it’s literally impossible for them to tell the two cases apart.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-n3ovice-dont-try-to-market-yourself-youre-not-running-for.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-n3ovice-dont-try-to-market-yourself-youre-not-running-for.md
index dea0b37..e2cc610 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-n3ovice-dont-try-to-market-yourself-youre-not-running-for.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-n3ovice-dont-try-to-market-yourself-youre-not-running-for.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @n3ovice
@VictorTaelin Don't try to market yourself. You're not running for public office.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-nudistofdespair-you-gave-it-a-great-shot-thanks-for-an-engaging.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-nudistofdespair-you-gave-it-a-great-shot-thanks-for-an-engaging.md
index 4fd4b87..f463b0b 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-nudistofdespair-you-gave-it-a-great-shot-thanks-for-an-engaging.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-nudistofdespair-you-gave-it-a-great-shot-thanks-for-an-engaging.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @nudistofdespair
@VictorTaelin You gave it a great shot, thanks for an engaging read.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-phtn458-bro-keep-posting-like-you-do-one-day-well-have.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-phtn458-bro-keep-posting-like-you-do-one-day-well-have.md
index 729254b..b785f85 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-phtn458-bro-keep-posting-like-you-do-one-day-well-have.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-phtn458-bro-keep-posting-like-you-do-one-day-well-have.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @phtn458
@VictorTaelin Bro keep posting like you do. One day we'll have the courage to learn it
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-real_philogy-dont-you-want-to-be-able-to-copy-lambdas-though.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-real_philogy-dont-you-want-to-be-able-to-copy-lambdas-though.md
index c0c0f9a..f7b312f 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-real_philogy-dont-you-want-to-be-able-to-copy-lambdas-though.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-real_philogy-dont-you-want-to-be-able-to-copy-lambdas-though.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @real_philogy
@VictorTaelin don't you want to be able to copy lambdas though? Or how do you do a lot of the typical FP stuff if you can't pass around and copy functions as you otherwise would?
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-theodorvaryag-this-post-is-not-a-rebuttal-to-a-query-about-ai.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-theodorvaryag-this-post-is-not-a-rebuttal-to-a-query-about-ai.md
index bf6602c..64d985e 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-theodorvaryag-this-post-is-not-a-rebuttal-to-a-query-about-ai.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-theodorvaryag-this-post-is-not-a-rebuttal-to-a-query-about-ai.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @theodorvaryag
@VictorTaelin this post is not a rebuttal to a query about ai psychosis regardless of the merits and robust technical details behind it
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-waefrebeorn-i-have-an-entire-math-proofs-section-in-my-maths.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-waefrebeorn-i-have-an-entire-math-proofs-section-in-my-maths.md
index 91da8d7..5f26c7c 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-waefrebeorn-i-have-an-entire-math-proofs-section-in-my-maths.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-05-waefrebeorn-i-have-an-entire-math-proofs-section-in-my-maths.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @waefrebeorn
@VictorTaelin i have an entire math proofs section in my maths repos
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-06-SGuergachi-hopefully-useful-data-point.md b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-06-SGuergachi-hopefully-useful-data-point.md
index 332046e..5356224 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-06-SGuergachi-hopefully-useful-data-point.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/2026-07-06-SGuergachi-hopefully-useful-data-point.md
@@ -26,7 +26,7 @@ parent_post_id: "2073406569459368226"
## Branch
-**1/**
+**1/** @SGuergachi
@VictorTaelin @Jonathan_Blow hopefully useful data point.
diff --git a/archive/threads/VictorTaelin/2026-07-04-sighs/index.md b/archive/threads/VictorTaelin/2026-07-04-sighs/index.md
index 1a2820a..7bf53c0 100644
--- a/archive/threads/VictorTaelin/2026-07-04-sighs/index.md
+++ b/archive/threads/VictorTaelin/2026-07-04-sighs/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @VictorTaelin
*sighs*
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-abductee_org-asimov-vibes-intensify.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-abductee_org-asimov-vibes-intensify.md
index 3267df1..c1af682 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-abductee_org-asimov-vibes-intensify.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-abductee_org-asimov-vibes-intensify.md
@@ -26,7 +26,7 @@ parent_post_id: "1650678968255913985"
## Branch
-**1/**
+**1/** @abductee_org
@kenpex [Asimov vibes intensify]
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-streleav-indeed-any-thoughts-on-how-agi-could-help-the.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-streleav-indeed-any-thoughts-on-how-agi-could-help-the.md
index 902b483..babde82 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-streleav-indeed-any-thoughts-on-how-agi-could-help-the.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-streleav-indeed-any-thoughts-on-how-agi-could-help-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1650678968255913985"
## Branch
-**1/**
+**1/** @streleav
@kenpex Indeed. Any thoughts on how AGI could help the situation?
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ChristerEricson-i-was-curious-about-what-it-would-take-to.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ChristerEricson-i-was-curious-about-what-it-would-take-to.md
index ee6e1bc..236c48d 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ChristerEricson-i-was-curious-about-what-it-would-take-to.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ChristerEricson-i-was-curious-about-what-it-would-take-to.md
@@ -26,7 +26,7 @@ parent_post_id: "1650678968255913985"
## Branch
-**1/**
+**1/** @ChristerEricson
@kenpex I was curious about what it would take to recreate today’s tech “from scratch” if a giant EMP went off. It’s clearly a crazy number of bootstrap steps needed.
@@ -36,21 +36,21 @@ No EMPs pls!
-**2/**
+**2/** @kenpex
@ChristerEricson Reminds me of when people used/could to write engines from scratch at every new game/project. Perhaps it's the best way to improve though.
-**3/**
+**3/** @npatsiouras
@kenpex @ChristerEricson There's an anime series called 7 seeds, where civ ends due to predicted meteorite shower. Each gov selects a bunch of people based on their knowledge, including trained guides, in an attempt to repopulate earth in the aftermath.......and not one of them, knew Forth......amateurs!
-**4/**
+**4/** @ChristerEricson
@npatsiouras @kenpex Don’t get me wrong, I have fondness for Forth, but if my generation had grown up on Forth instead of Basic, I suspect this would be our world today.
-**5/**
+**5/** @ChristerEricson
@npatsiouras @kenpex Also, it “almost” happened. One of my friends had one of these:
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ErikHaliewicz-this-is-actually-a-fantastic-project-though.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ErikHaliewicz-this-is-actually-a-fantastic-project-though.md
index ac73783..9593dbc 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ErikHaliewicz-this-is-actually-a-fantastic-project-though.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ErikHaliewicz-this-is-actually-a-fantastic-project-though.md
@@ -26,7 +26,7 @@ parent_post_id: "1650678968255913985"
## Branch
-**1/**
+**1/** @ErikHaliewicz
@kenpex This is actually a fantastic project though.
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-SebAaltonen-some-people-have-too-much-time-for-hobby-projects.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-SebAaltonen-some-people-have-too-much-time-for-hobby-projects.md
index 32650e1..019398a 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-SebAaltonen-some-people-have-too-much-time-for-hobby-projects.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-SebAaltonen-some-people-have-too-much-time-for-hobby-projects.md
@@ -26,11 +26,11 @@ parent_post_id: "1650678968255913985"
## Branch
-**1/**
+**1/** @SebAaltonen
@kenpex Some people have too much time for hobby projects.
-**2/**
+**2/** @HostOfMeta
@SebAaltonen @kenpex Where else can someone learn Forth nowadays?
@@ -38,17 +38,17 @@ Would place Forth knowledge above C++ in an interview, shows an understanding of
These are the people you want to help break tradition. They see the schlep, if you will.
-**3/**
+**3/** @kenpex
@Lambda_Coder @SebAaltonen I wouldn't. Forth today is hyper-niche, and even the programming model it teaches you about is. Lastly, the best way to learn forth is probably to make your own forth.
-**4/**
+**4/** @HostOfMeta
@kenpex @SebAaltonen What of the distinction between Forth the syntactic language and the semantic programming model?
The way I see modern software, an insane amount of tooling and scaffolding is maintained to achieve what Forth and Lisp had emerging from their architecture. And usually not reusable
-**5/**
+**5/** @HostOfMeta
@kenpex @SebAaltonen The fact that the model is obscure should turn it into a superpower.
@@ -56,17 +56,17 @@ I'd agree for an existing company it would be a risk, but for a startup its how
Not forth/lisp themselves, but adapting their models with modern hindsights.
-**6/**
+**6/** @kenpex
@Lambda_Coder @SebAaltonen I doubt it. I doubt that languages or paradigms make any difference in practice (never saw any study showing significant advantages). And the lisp paradigm is in my opinion, niche for reasonable reasons. In general, the lack of strong semantics is a liability, not a strength.
-**7/**
+**7/** @HostOfMeta
@kenpex @SebAaltonen What if there existed a way to get the live coding, programmable programming of Lisp/Forth, scale it to support AAA game engines, and keep most modern PLT developments in the process?
I agree languages and paradigms are compile-time concerns and as such make the runtime complex.
-**8/**
+**8/** @HostOfMeta
@kenpex @SebAaltonen Its no different than a game engine moving from one scene to the next; a few layers of abstraction deeper.
@@ -74,26 +74,26 @@ Level designers would go insane having to reboot the editor between each change,
I want this to change.
-**9/**
+**9/** @HostOfMeta
@kenpex @SebAaltonen I also appreciate how weird and niche this position is.
It's one of these situations where the thing is already executing in my mind, but translating this to software and everyday terms is another story.
-**10/**
+**10/** @kenpex
@Lambda_Coder @SebAaltonen Live-coding is indeed (and provably so, there is science) a superpower, but does not have much to do with language semantics. It's tooling and "tradition". Lisps are usually VM-based, REPLs etc, but you can do that with C or whatever, and similarly, you can "offline" compile lisp
-**11/**
+**11/** @HostOfMeta
@kenpex @SebAaltonen I would say it's deeply connected to language design, in that doing it elsewhere is more complex and yields less power.
Lisp has the most powerful REPL for this reason, but then it needs more semantic info to use it safely in a stateful simulation. Needs Erlang's supervision too.
-**12/**
+**12/** @HostOfMeta
@kenpex @SebAaltonen The runtime architecture I'm interested in keeps track of its systems, generates the wires between them, handles snapshots and replay logging from non-deterministic inputs, supervises and restores crashed systems and is aware of frame boundaries to know when live coding is safe.
-**13/**
+**13/** @HostOfMeta
@kenpex @SebAaltonen Too often in Lisp I crash something at the REPL, or lose track of a connected socket, or whatever else happening which causes me to reboot the entire runtime tower, and I see every second waiting to get back to the previous state as wasted time where the mental context fades away
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-wadetb-i-find-the-context-hilarious-but-forth-as-asm.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-wadetb-i-find-the-context-hilarious-but-forth-as-asm.md
index ae5a109..38e2211 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-wadetb-i-find-the-context-hilarious-but-forth-as-asm.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-wadetb-i-find-the-context-hilarious-but-forth-as-asm.md
@@ -26,11 +26,11 @@ parent_post_id: "1650678968255913985"
## Branch
-**1/**
+**1/** @wadetb
@kenpex I find the context hilarious, but Forth as asm-level-yet-very-usable-mini-OS has been done, as the boot firmware for OLPC (http://laptop.org) for many years. Looks like it's currently open sourced as https://github.com/openbios/openbios.
-**2/**
+**2/** @kenpex
@wadetb Yes of course. Forth is a language that took me a while to grok (re:the why it makes sense) - but once I understood the context it totally does. @NOTimothyLottes experiments w/it are also fun.
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-27-JaceCear-the-what-if-were-in-an-apocalypse-part-is-very.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-27-JaceCear-the-what-if-were-in-an-apocalypse-part-is-very.md
index c7035bb..9404341 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-27-JaceCear-the-what-if-were-in-an-apocalypse-part-is-very.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-27-JaceCear-the-what-if-were-in-an-apocalypse-part-is-very.md
@@ -26,13 +26,13 @@ parent_post_id: "1650678968255913985"
## Branch
-**1/**
+**1/** @JaceCear
@kenpex The "What if we're in an apocalypse?" part is very 'whatever' to me, but in general I find this and similar projects really cool!
And it looks like the main dev creates it on a 75MHz Pentium, with 16MB of RAM, which is awesome! ^^
-**2/**
+**2/** @kenpex
@JaceCear Of course, the grandfather of "cool OS - minus the crazy" is TempleOS
diff --git a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/index.md b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/index.md
index e452ace..f2b3397 100644
--- a/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/index.md
+++ b/archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/index.md
@@ -25,24 +25,24 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @kenpex
Nerds are crazy https://git.sr.ht/~vdupras/duskos
Branches: [[archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-abductee_org-asimov-vibes-intensify]], [[archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-25-streleav-indeed-any-thoughts-on-how-agi-could-help-the]], [[archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ChristerEricson-i-was-curious-about-what-it-would-take-to]], [[archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-SebAaltonen-some-people-have-too-much-time-for-hobby-projects]], [[archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-26-ErikHaliewicz-this-is-actually-a-fantastic-project-though]], [[archive/threads/kenpex/2023-04-25-nerds-are-crazy-https-git-sr-ht-vdupras-duskos/2023-04-27-JaceCear-the-what-if-were-in-an-apocalypse-part-is-very]]
-**2/**
+**2/** @wadetb
@kenpex I find the context hilarious, but Forth as asm-level-yet-very-usable-mini-OS has been done, as the boot firmware for OLPC (http://laptop.org) for many years. Looks like it's currently open sourced as https://github.com/openbios/openbios.
-**3/**
+**3/** @kenpex
@wadetb Yes of course. Forth is a language that took me a while to grok (re:the why it makes sense) - but once I understood the context it totally does. @NOTimothyLottes experiments w/it are also fun.
-**4/**
+**4/** @NOTimothyLottes
@kenpex @wadetb Can make a custom forth to binary in a few K. Bring up a runtime assembler in the language and do anything fast and simple from that point, load libraries, make system/dll C calls. 100,000x complexity reduction in compiler toolchain size.
-**5/**
+**5/** @wvo
@NOTimothyLottes @kenpex @wadetb A few K? Why not just 1K? https://strlen.com/false-language/
diff --git a/archive/threads/mmalex/2025-06-28-i-vibe-coded-something-horrendous-and-i-love-it-a/index.md b/archive/threads/mmalex/2025-06-28-i-vibe-coded-something-horrendous-and-i-love-it-a/index.md
index 0b6a375..3f84b28 100644
--- a/archive/threads/mmalex/2025-06-28-i-vibe-coded-something-horrendous-and-i-love-it-a/index.md
+++ b/archive/threads/mmalex/2025-06-28-i-vibe-coded-something-horrendous-and-i-love-it-a/index.md
@@ -25,18 +25,18 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @mmalex
i vibe coded something horrendous and I love it: a python c preprocessor that finds blocks like /* python */ in a .c file, runs the python, and dumps the stdout after the comment, replacing any old block if needed. im using it to precompute tables...
-**2/**
+**2/** @seflless
@mmalex There was a python tool for this remember as far back as 2000ish when working on a large c/c++ game codebase. Ah found it, it’s called Cog: https://cog.readthedocs.io/en/latest/
-**3/**
+**3/** @mmalex
@seflless ah yes ! I knew it existed - it wasnt an original idea after all, but like a faint memory stirring in my brain - but couldn't find it. thanks for the link!
-**4/**
+**4/** @NOTimothyLottes
@mmalex @seflless Many of my forth-like languages worked via nested runtime code gen, so it was possible to generate+run code to build either code or data, then repeat. The system would bootstrap its own assembler/etc that way.
diff --git a/archive/threads/onatt0/2025-04-30-holy-truthnuke-and-people-think-c-is-the-optimal-state-of/index.md b/archive/threads/onatt0/2025-04-30-holy-truthnuke-and-people-think-c-is-the-optimal-state-of/index.md
index 2b8ecae..39d49af 100644
--- a/archive/threads/onatt0/2025-04-30-holy-truthnuke-and-people-think-c-is-the-optimal-state-of/index.md
+++ b/archive/threads/onatt0/2025-04-30-holy-truthnuke-and-people-think-c-is-the-optimal-state-of/index.md
@@ -29,7 +29,7 @@ notes: "Hand-transcribed from screenshot. The original account is suspended and
## Branch
-**1/**
+**1/** @onatt0
holy truthnuke - and people think C is the optimal state of possible runtimes when it's a very limited runtime to have state mixed call/data-stacks
diff --git a/archive/threads/rianflo/2022-11-29-the-road-to-16-bit-floats-gpu-is-paved-with-our/index.md b/archive/threads/rianflo/2022-11-29-the-road-to-16-bit-floats-gpu-is-paved-with-our/index.md
index ca27a05..a44e350 100644
--- a/archive/threads/rianflo/2022-11-29-the-road-to-16-bit-floats-gpu-is-paved-with-our/index.md
+++ b/archive/threads/rianflo/2022-11-29-the-road-to-16-bit-floats-gpu-is-paved-with-our/index.md
@@ -25,34 +25,34 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @rianflo
"The road to 16-bit floats GPU is paved with our blood"
:-/
https://www.yosoygames.com.ar/wp/2022/01/the-road-to-16-bit-floats-gpu-is-paved-with-our-blood/
-**2/**
+**2/** @NOTimothyLottes
@rianflo Explicit packed 16-bit works on AMD Vulkan Vega and up. I typically get up to 30% improvement on ALU bound stuff. Lots of occupancy wins. I don't use {HLSL, RenderDoc, Reflection, RADV, or VS/PS}. All constants are packed and aliased as UINT, so no coversion overheads.
-**3/**
+**3/** @rianflo
@NOTimothyLottes Oh I know the benefits. Just no simple clear way to write it in GLSL for vulkan.
-**4/**
+**4/** @NOTimothyLottes
@rianflo Sure there is. CAS/FSR1/etc all shipped with fantastic GLSL versions using 16-bit packed math (I wrote those), all which at the time got fantastic code generation using AMD's drivers.
-**5/**
+**5/** @rianflo
@NOTimothyLottes What GLSL extension did you use?
-**6/**
+**6/** @rianflo
@NOTimothyLottes Oh wait, you're saying you wrote the fp16 math manually?
-**7/**
+**7/** @NOTimothyLottes
@rianflo Explicit packed 16-bit code. FSR1 example: https://github.com/GPUOpen-Effects/FidelityFX-FSR/blob/master/ffx-fsr/ffx_fsr1.h - There are different 'F' (32-bit) and 'H' and 'Hx2' (packed 16-bit) functions.
diff --git a/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/2025-12-17-rianflo-question-is-how-much-overhead-of-course-even-not.md b/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/2025-12-17-rianflo-question-is-how-much-overhead-of-course-even-not.md
index b712c64..4a58a53 100644
--- a/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/2025-12-17-rianflo-question-is-how-much-overhead-of-course-even-not.md
+++ b/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/2025-12-17-rianflo-question-is-how-much-overhead-of-course-even-not.md
@@ -26,15 +26,15 @@ parent_post_id: "2001106069238563204"
## Branch
-**1/**
+**1/** @rianflo
@NOTimothyLottes question is how much overhead. of course even not knowing how it was implemented, its obviously complex. but i’d take a bit of overhead in favor of writing a “program” top down on the gpu.
-**2/**
+**2/** @rianflo
@NOTimothyLottes you already know we’re on the same page wrt to rendering stuff differently, but it would be fun to show a proof of concept for rendering trad stuff this way, even just to proof a point. like load and render any gltf. :-)
-**3/**
+**3/** @NOTimothyLottes
@rianflo I just need to get off the R&D train at some point and actually ship something :)
diff --git a/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/index.md b/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/index.md
index 9253338..9c76451 100644
--- a/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/index.md
+++ b/archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/index.md
@@ -25,42 +25,42 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @rianflo
Significant amount of bloat dropped :-) 🎉🥳🎈
I’d move it all to the GPU though. A single kernel that launches your pipeline steps per frame or per whatever. Pretty sure NV can do it. AMD I have no deep knowledge. @NOTimothyLottes ?
-**2/**
+**2/** @NOTimothyLottes
@rianflo From my perspective being compute-only for graphics, few reasons to launch kernels because I'd always use a fixed amount of VGPRs. The larger problem is compilers that cannot keep up with the large program sizes (in compile time or register allocation).
Branches: [[archive/threads/rianflo/2025-12-17-significant-amount-of-bloat-dropped/2025-12-17-rianflo-question-is-how-much-overhead-of-course-even-not]]
-**3/**
+**3/** @NOTimothyLottes
@rianflo Huge amount of pitfalls with compute-side dynamic dispatch of work (NV had it back when I worked there BTW), from long latency chains, to overheads tracking work completion, preemption, state restore, etc. It's not the golden answer people think it is. It is a slow path.
-**4/**
+**4/** @NOTimothyLottes
@rianflo There are however a bunch of things we could trivially do GPU side that are currently CPU side, like computing best tiling modes for images, computing image {size, alignment, etc}, building descriptors, etc. Lots of other driver stuff could be done on the GPU for sure.
-**5/**
+**5/** @NOTimothyLottes
@rianflo My plan for 2026 is actually to build my open source AMD SteamOS/Linux driver for a future compute-graphics API, and it will be doing some radical stuff since I'm also doing shader binary code generation too :) Hopefully you all get live examples.
-**6/**
+**6/** @bkaradzic
@NOTimothyLottes @rianflo Can't wait! This compute-graphics API is something like compute + meshlets + fragment shaders only graphics API?
-**7/**
+**7/** @NOTimothyLottes
@bkaradzic @rianflo Compute as in only compute shader dispatches, no fixed function graphics (no fragment/etc). And graphics via pure compute.
-**8/**
+**8/** @Nicolas_Lopez_
@NOTimothyLottes @bkaradzic @rianflo Considering how much we already software rasterize, we are not so far from it :)
-**9/**
+**9/** @rianflo
@Nicolas_Lopez_ @NOTimothyLottes @bkaradzic yeah but then someone insists on a couple of large triangles and wants to access the rasterizer hw again, which is supposedly too small of die area to be even worth ripping it out.
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-NOTimothyLottes-yeah-its-a-common-problem-thin-wrapper-interfaces.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-NOTimothyLottes-yeah-its-a-common-problem-thin-wrapper-interfaces.md
index a621ce7..7d766e7 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-NOTimothyLottes-yeah-its-a-common-problem-thin-wrapper-interfaces.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-NOTimothyLottes-yeah-its-a-common-problem-thin-wrapper-interfaces.md
@@ -26,94 +26,94 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @NOTimothyLottes
@simplex_fx @SebAaltonen Yeah it's a common problem, thin wrapper interfaces reduced to the worst platform's caps then called at high frequency ... it's the recipe for poor software engineering
-**2/**
+**2/** @NOTimothyLottes
@simplex_fx @SebAaltonen Arguments like: we cannot do bindless at the engine interface level because our Intel iGPU binding limits are too low, etc. Just another sign the engine interface failed when all platforms are crippled for the LCD, better if only the LCD platforms are crippled
-**3/**
+**3/** @NOTimothyLottes
@simplex_fx @SebAaltonen My interfaces are like @simplex_fx perhaps, I only do either extremely high-level, or extremely low-level. So my graphics API is just this below ...
-**4/**
+**4/** @simplex_fx
@NOTimothyLottes @SebAaltonen what is the mark-unmark thing?
-**5/**
+**5/** @NOTimothyLottes
@simplex_fx @SebAaltonen It is a 1:1 map to VkEvents. Mark:set signal after all prior launched dispatches have completed, unmark:clear signal, wait: wait for signal
-**6/**
+**6/** @simplex_fx
@NOTimothyLottes @SebAaltonen Do you have plans to publish your render?
Seems like some super nice and lightweight stuff.
-**7/**
+**7/** @NOTimothyLottes
@simplex_fx @SebAaltonen The game/rendering side of my current project is too wild/game-specific to be of general usage, but the shell of the engine without the content, that I might release at some point into open source as an example
-**8/**
+**8/** @AgileJebrim
@NOTimothyLottes @simplex_fx @SebAaltonen What’s the game?
-**9/**
+**9/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen Across many years of working for IHVs and ISVs, I've been doing my own side project personal R&D prototypes geared towards solving all the key systems of a game I'd like to actually put into production some day
-**10/**
+**10/** @AgileJebrim
@NOTimothyLottes @simplex_fx @SebAaltonen A combat flight sim MMO?
-**11/**
+**11/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen Probably split it up into two: a single player vs world (low scope), then use that to fund what I really want to do which involves multi-player (high scope).
-**12/**
+**12/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen FPS-like (more like 3D Descent [DOS], instead of fixed planar), trying to break ground more in world-scope simulation/thinking/destruction but not just thin on-planet-surface stuff, more like full planetoid interior [BLAME! style, an out-of-control world-building machine]
-**13/**
+**13/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen Rewinding time, there have been some interesting milestones in PC gaming
(1.) Command HQ (and similar) - Modem connected real-time multi-player world scale battle simulation with fog of war ...
-**14/**
+**14/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen (2.) Starflight https://www.filfre.net/2014/10/starflight/ - procedural universe generation, but with persistent interaction, they actually saved game state back to the floppy disk ... might say today "No Man's Sky" is like a modern version of that procedural universe generation
-**15/**
+**15/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen Forwarding in time a lot
(3.) Teardown - expanding the lego-style chunky voxel engine with fully dynamic destruction, while still maintaining a high quality render
-**16/**
+**16/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen But there are a lot of barriers that feel like speed-of-sound barriers (possible) vs speed-of-light (impossible) with PC game tech, examples
(1.) Voxel games - they stay mostly chunky (you have games like Voxile pushing this a little, with in-voxel details)
-**17/**
+**17/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen (2.) Physical simulation. NV PhyX had some absolutely amazing demos of destruction, but not really anything that went all in on massive destruction BECAUSE the game is still on the CPU, and the GPU is limited to just graphics ... seems like still a massive opportunity
-**18/**
+**18/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen (3.) And the biggest one IMO: many do procedural generation and stop there. But it is the MIX of procedural rules and simulation that actually generates interesting behavior and content, that is very under-explored
-**19/**
+**19/** @NOTimothyLottes
@AgileJebrim @simplex_fx @SebAaltonen So the inflection point IMO was GPUs getting fast enough compute where triangle rendering wasn't required, and then getting large enough memory, where one could devote it to {high/low frequency simulation,persistence,etc} instead of "textures"
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-SebAaltonen-i-briefly-discussed-this-topic-in-my-siggraph.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-SebAaltonen-i-briefly-discussed-this-topic-in-my-siggraph.md
index 0cbb8cd..bc379a2 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-SebAaltonen-i-briefly-discussed-this-topic-in-my-siggraph.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-SebAaltonen-i-briefly-discussed-this-topic-in-my-siggraph.md
@@ -26,29 +26,29 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @SebAaltonen
@simplex_fx @NOTimothyLottes I briefly discussed this topic in my SIGGRAPH 2022 talk. The problem is that if you write a completely custom renderer for each platform, you have LOTS of platform specific code, which is super hard to maintain when your requirements change. 5x work for refactor is not fun.
-**2/**
+**2/** @SebAaltonen
@simplex_fx @NOTimothyLottes Also with good design, you can almost 1:1 wrap Vulkan/Metal/DX12 under the same thin wrapper, so you don't end up wasting performance in a wrapper. Now you can write your low level rendering code once.
-**3/**
+**3/** @SebAaltonen
@simplex_fx @NOTimothyLottes Good design == use placement heaps everywhere, use argument buffers (also in Metal) so that your memory management and binding model is identical. This way you don't need to send any data though the API wrapper. Write data directly to GPU memory, then call the wrapper to draw.
-**4/**
+**4/** @SebAaltonen
@simplex_fx @NOTimothyLottes Also separating CPU->GPU data upload completely from drawing allows you to upload data at change frequency instead of draw frequency. Many big engines are slow as they upload data per draw call. That's bad design. Couples upload/draw tightly together. Must pay for both.
-**5/**
+**5/** @yuusakumenka
@SebAaltonen @simplex_fx @NOTimothyLottes I've seen advised to use graphics queue (supporting transfer) for cpu write once gpu draw once data (immediate data recreated every frame).
Then use separate data upload for data that suffers less frequent update (like per-instance scene data of a level editor).
Is it bad advice?
-**6/**
+**6/** @yetmania
@SebAaltonen @simplex_fx @NOTimothyLottes Would this work for mobile phones?
I thought that keeping the scene resident on the GPU relies on indirect draws with a count buffer (filled by a GPU culling computer shader) and bindless resources.
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-count_mascetti-every-time-i-abstract-at-a-higher-level-i-end-up.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-count_mascetti-every-time-i-abstract-at-a-higher-level-i-end-up.md
index f9b8acf..ab16679 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-count_mascetti-every-time-i-abstract-at-a-higher-level-i-end-up.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-count_mascetti-every-time-i-abstract-at-a-higher-level-i-end-up.md
@@ -26,7 +26,7 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @count_mascetti
@simplex_fx @SebAaltonen @NOTimothyLottes Every time I abstract at a higher-level I end up precluding some use-case that I didn't anticipate, perhaps because I'm still learning and lack the whole picture. I find it very hard to write high-level graphics abstractions that are performant and flexible enough.
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-matiasgoldberg-you-can-do-whatever-you-want-the-api-just-because.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-matiasgoldberg-you-can-do-whatever-you-want-the-api-just-because.md
index 68d7164..693a98f 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-matiasgoldberg-you-can-do-whatever-you-want-the-api-just-because.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-matiasgoldberg-you-can-do-whatever-you-want-the-api-just-because.md
@@ -26,7 +26,7 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @matiasgoldberg
@simplex_fx @SebAaltonen @NOTimothyLottes You can do whatever you want the API. Just because you can read from a GPU buffer you just wrote doesn't mean you should.
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-RyDawgE256-i-dont-disagree-but-the-reason-is-that-99-of.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-RyDawgE256-i-dont-disagree-but-the-reason-is-that-99-of.md
index 6f3adc7..9975e3a 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-RyDawgE256-i-dont-disagree-but-the-reason-is-that-99-of.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-RyDawgE256-i-dont-disagree-but-the-reason-is-that-99-of.md
@@ -26,7 +26,7 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @RyDawgE256
@simplex_fx @SebAaltonen @NOTimothyLottes I don't disagree... but the reason is that 99% of programmers don't gaf about the specifics of their renderer... which is a shame... but an unambiguous fact nonetheless
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-matthewcraig42-usually-the-key-benefit-is-two-fold-making-the.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-matthewcraig42-usually-the-key-benefit-is-two-fold-making-the.md
index 59ae226..35e74b8 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-matthewcraig42-usually-the-key-benefit-is-two-fold-making-the.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-matthewcraig42-usually-the-key-benefit-is-two-fold-making-the.md
@@ -26,7 +26,7 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @matthewcraig42
Usually the key benefit is two fold, making the code truly cross platform and decoupling user level code from a specific rendering api/backend. Without that if you change the underlying render API it will break all your user level code, and adding additional render backends is also challenging.
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-pagedeux-the-render-pipeline-is-basically-a-full-piece-of.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-pagedeux-the-render-pipeline-is-basically-a-full-piece-of.md
index b692f5d..0527feb 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-pagedeux-the-render-pipeline-is-basically-a-full-piece-of.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-pagedeux-the-render-pipeline-is-basically-a-full-piece-of.md
@@ -26,7 +26,7 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @pagedeux
@simplex_fx @SebAaltonen @NOTimothyLottes the render pipeline is basically a full piece of software trapped in inside of another software
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-vanderschnarzen-i-have-exactly-that-my-abstraction-is-basically.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-vanderschnarzen-i-have-exactly-that-my-abstraction-is-basically.md
index 68ae3e5..6466824 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-vanderschnarzen-i-have-exactly-that-my-abstraction-is-basically.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-vanderschnarzen-i-have-exactly-that-my-abstraction-is-basically.md
@@ -26,7 +26,7 @@ parent_post_id: "1890348863287943363"
## Branch
-**1/**
+**1/** @vanderschnarzen
@simplex_fx @SebAaltonen @NOTimothyLottes I have exactly that. My abstraction is basically just mesh and material. If you abstract on a low level you usually have to go with the smallest common denom- which prevents you from really taking advantage of a specific api. Opinions might differ, but that's just my two cents...
diff --git a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/index.md b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/index.md
index c91e7c7..a21e205 100644
--- a/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/index.md
+++ b/archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @simplex_fx
Hey, gpu guys like @SebAaltonen @NOTimothyLottes why do rendering guys usually wrap 3d apis at low level in engines, creating some generic mid-low level API?
@@ -35,6 +35,6 @@ Unless you go with some super generic game engine (bad idea on it's own anyway),
Branches: [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-count_mascetti-every-time-i-abstract-at-a-higher-level-i-end-up]], [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-SebAaltonen-i-briefly-discussed-this-topic-in-my-siggraph]], [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-matiasgoldberg-you-can-do-whatever-you-want-the-api-just-because]], [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-14-NOTimothyLottes-yeah-its-a-common-problem-thin-wrapper-interfaces]], [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-RyDawgE256-i-dont-disagree-but-the-reason-is-that-99-of]], [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-matthewcraig42-usually-the-key-benefit-is-two-fold-making-the]], [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-pagedeux-the-render-pipeline-is-basically-a-full-piece-of]], [[archive/threads/simplex_fx/2025-02-14-hey-gpu-guys-like-sebaaltonen-notimothylottes-why/2025-02-15-vanderschnarzen-i-have-exactly-that-my-abstraction-is-basically]]
-**2/**
+**2/** @songohab
@simplex_fx @SebAaltonen @NOTimothyLottes Exactly the question I was asking myself lol. Always felt like 3D apis SHOULD be specific. But I’m just a noob
diff --git a/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-Cheezaight-if-this-is-not-timothy-lottes-then-who-is-it.md b/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-Cheezaight-if-this-is-not-timothy-lottes-then-who-is-it.md
index c727ac5..07887be 100644
--- a/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-Cheezaight-if-this-is-not-timothy-lottes-then-who-is-it.md
+++ b/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-Cheezaight-if-this-is-not-timothy-lottes-then-who-is-it.md
@@ -26,7 +26,7 @@ parent_post_id: "1990462184170926463"
## Branch
-**1/**
+**1/** @Cheezaight
@valigo @NOTimothyLottes If this is not Timothy Lottes then who is it?
diff --git a/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-mrsteyk1-his-style-goes-a-bit-beyond-that-judging-by-the.md b/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-mrsteyk1-his-style-goes-a-bit-beyond-that-judging-by-the.md
index 20edaf1..5e209d0 100644
--- a/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-mrsteyk1-his-style-goes-a-bit-beyond-that-judging-by-the.md
+++ b/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/2025-11-17-mrsteyk1-his-style-goes-a-bit-beyond-that-judging-by-the.md
@@ -26,11 +26,11 @@ parent_post_id: "1990462184170926463"
## Branch
-**1/**
+**1/** @mrsteyk1
@valigo His style goes a bit beyond that, judging by the defines used it’s similar to some form of literate programming but with C preprocessor. And the whole RAM thing iirc was for when he was hot reloading C, he said he later switched to GPU and it’s not exactly required anymore?
-**2/**
+**2/** @NOTimothyLottes
@mrsteyk1 @valigo Oh I still use the RAM global struct and pointer even without using CPU side hot reload.
diff --git a/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/index.md b/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/index.md
index 3c736d6..e3324fe 100644
--- a/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/index.md
+++ b/archive/threads/valigo/2025-11-17-people-who-say-c-is-modern-day-assembly-usually/index.md
@@ -25,7 +25,7 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @valigo
People who say "C is modern-day assembly" usually way undershoot it. This guy actually writes C like it's asm:
- No types - uints everywhere until a cast to actual type on access.
@@ -35,7 +35,7 @@ Is this how all GPU programmers write C?
-**2/**
+**2/** @valigo
This is @NOTimothyLottes btw, with his "Fixing C" talk, it's very cool. I really like mixing up shader code and regular C code in the same file and just ifdefind it out depending on which compiler you runt it through: https://www.youtube.com/watch?v=RrL7121MOeA
diff --git a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-Ron172892111531-wouldnt-this-make-working-with-arrays-more.md b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-Ron172892111531-wouldnt-this-make-working-with-arrays-more.md
index 4fd6416..a0a341e 100644
--- a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-Ron172892111531-wouldnt-this-make-working-with-arrays-more.md
+++ b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-Ron172892111531-wouldnt-this-make-working-with-arrays-more.md
@@ -26,15 +26,15 @@ parent_post_id: "1990506460531601538"
## Branch
-**1/**
+**1/** @Ron172892111531
@valigo Wouldn't this make working with arrays more difficult? Array[1] would have to be Array[sizeof(data)] etc
-**2/**
+**2/** @valigo
@Ron172892111531 As I said somewhere else, it makes sense sizeof pointer math to be the default. I was just saying that it's confusing because "+1" is not actually "plus one"
-**3/**
+**3/** @Ron172892111531
@valigo Ptr+1. It's not plus one byte (or int addition), it's plus one object. I think it's only confusing when people assume pointers are just fancy integers. They're meant to work with arrays, and they do flawlessly as long as one remembers that they are an extension of the array
diff --git a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-TheBonkMaykr-it-is-confusing-if-you-arent-used-to-it-that-is.md b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-TheBonkMaykr-it-is-confusing-if-you-arent-used-to-it-that-is.md
index 3f3592d..0a8ef69 100644
--- a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-TheBonkMaykr-it-is-confusing-if-you-arent-used-to-it-that-is.md
+++ b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-TheBonkMaykr-it-is-confusing-if-you-arent-used-to-it-that-is.md
@@ -26,7 +26,7 @@ parent_post_id: "1990506460531601538"
## Branch
-**1/**
+**1/** @TheBonkMaykr
It is confusing if you aren't used to it, that is true. But if you care about portability, letting the C compiler decide what the size of a pointer is, and how to handle pointer arithmetic, is better long-term.
diff --git a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-attamayte1-pointer-arithmetic-based-on-type-sizes-makes.md b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-attamayte1-pointer-arithmetic-based-on-type-sizes-makes.md
index 8a78c56..d0880a5 100644
--- a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-attamayte1-pointer-arithmetic-based-on-type-sizes-makes.md
+++ b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-attamayte1-pointer-arithmetic-based-on-type-sizes-makes.md
@@ -26,13 +26,13 @@ parent_post_id: "1990506460531601538"
## Branch
-**1/**
+**1/** @attamayte1
@valigo Pointer arithmetic based on type sizes makes sense when considering aligned load/store memory operations.
I’d argue that even today, with relaxed rules, we commonly use typed arrays and calculate offsets in bytes only when working with generic buffers, like binary data blobs.
-**2/**
+**2/** @valigo
@attamayte1 Yeah it makes sense for it to be the default. It's still confusing :)
diff --git a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-furiouswhopper-for-real-im-parsing-through-a-binary-array-and.md b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-furiouswhopper-for-real-im-parsing-through-a-binary-array-and.md
index 16bd105..9d14e7e 100644
--- a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-furiouswhopper-for-real-im-parsing-through-a-binary-array-and.md
+++ b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-furiouswhopper-for-real-im-parsing-through-a-binary-array-and.md
@@ -26,7 +26,7 @@ parent_post_id: "1990506460531601538"
## Branch
-**1/**
+**1/** @furiouswhopper
@valigo For real I'm parsing through a binary array and trying to say "the next byte is a uint8_t, the next two bytes are a uint16_t" and the most elegant way to do it is mind-numbingly ugly pointer bullshit.
diff --git a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-mrsteyk1-i-had-the-displeasure-of-being-exposed-to-hex.md b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-mrsteyk1-i-had-the-displeasure-of-being-exposed-to-hex.md
index 7eccd83..c7a7115 100644
--- a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-mrsteyk1-i-had-the-displeasure-of-being-exposed-to-hex.md
+++ b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-mrsteyk1-i-had-the-displeasure-of-being-exposed-to-hex.md
@@ -26,7 +26,7 @@ parent_post_id: "1990506460531601538"
## Branch
-**1/**
+**1/** @mrsteyk1
@valigo I had the displeasure of being exposed to Hex-Ray’s decompiler for years so I have gotten used to it, but it is annoying ye…
diff --git a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-25-levs57-interestingly-if-you-try-to-write-rust-in-this.md b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-25-levs57-interestingly-if-you-try-to-write-rust-in-this.md
index c55eb1b..7cc0657 100644
--- a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-25-levs57-interestingly-if-you-try-to-write-rust-in-this.md
+++ b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-25-levs57-interestingly-if-you-try-to-write-rust-in-this.md
@@ -26,7 +26,7 @@ parent_post_id: "1990506460531601538"
## Branch
-**1/**
+**1/** @levs57
@valigo Interestingly, if you try to write Rust in this way, pointer provenance will cause misoptimizations that break everything.
diff --git a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/index.md b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/index.md
index 58c62a5..d418348 100644
--- a/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/index.md
+++ b/archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/index.md
@@ -25,22 +25,22 @@ in_reply_to: ""
## Thread
-**1/**
+**1/** @valigo
When it comes to pointers, "just use 64 bit integer" is way more intuitive to me. I still remember how confusing it was that "pointer + 1" actually means "+ size_of(type_we_point_to)" when I learned all this stuff. It still kinda messes me up not gonna lie.
Branches: [[archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-mrsteyk1-i-had-the-displeasure-of-being-exposed-to-hex]], [[archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-attamayte1-pointer-arithmetic-based-on-type-sizes-makes]], [[archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-furiouswhopper-for-real-im-parsing-through-a-binary-array-and]], [[archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-TheBonkMaykr-it-is-confusing-if-you-arent-used-to-it-that-is]], [[archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-18-Ron172892111531-wouldnt-this-make-working-with-arrays-more]], [[archive/threads/valigo/2025-11-17-when-it-comes-to-pointers-just-use-64-bit-integer/2025-11-25-levs57-interestingly-if-you-try-to-write-rust-in-this]]
-**2/**
+**2/** @onelivesleft
@valigo Distinct syntax for pointer arithmetic would be good. i.e.
ptr += 1; // ptr = ptr + 1;
ptr ++= 1; // ptr = ptr + 1 * size_of(type_of(ptr));
-**3/**
+**3/** @valigo
@onelivesleft Not sure I agree with specific sign choice but I kinda dig the concept
-**4/**
+**4/** @onelivesleft
@valigo Well, you know, only applicable for languages that don't have a ++ :P
diff --git a/archive/threads/winning_tactic/2026-06-07-i-see/index.md b/archive/threads/winning_tactic/2026-06-07-i-see/index.md
index 7962148..9d49876 100644
--- a/archive/threads/winning_tactic/2026-06-07-i-see/index.md
+++ b/archive/threads/winning_tactic/2026-06-07-i-see/index.md
@@ -27,6 +27,6 @@ in_reply_to: "2063730754861822129"
## Thread
-**1/**
+**1/** @winning_tactic
@NOTimothyLottes I see!
diff --git a/notes/How threads are organized.md b/notes/How threads are organized.md
index b48dbd8..ca96b5f 100644
--- a/notes/How threads are organized.md
+++ b/notes/How threads are organized.md
@@ -20,7 +20,9 @@ archive/threads///
## Spine
-`index.md` is only what the author posted as a single chain: each post replies to the previous one of theirs. Posts are numbered **1/** **2/** in that order. Other people do not appear in this numbering.
+`index.md` is the opening author's chain. Posts are numbered **1/** **2/**. Each number line names who spoke: `**1/** @SebAaltonen`. A mention inside the tweet is not the author.
+
+Cross-author spines list every post in time order. The handle on the number line is who spoke.
If the first post is a reply to someone else, that other tweet is quoted at the top as context. It is not numbered as part of the spine.
diff --git a/scripts/twitter/README.md b/scripts/twitter/README.md
index 9d7fe98..f68c3db 100644
--- a/scripts/twitter/README.md
+++ b/scripts/twitter/README.md
@@ -17,6 +17,8 @@ python scripts/twitter/tw.py restore-origin --id --media-id
python scripts/twitter/tw.py migrate-media --id
python scripts/twitter/tw.py reslug --all
python scripts/twitter/tw.py reslug --all --apply
+python scripts/twitter/tw.py relabel --all
+python scripts/twitter/tw.py relabel --all --apply
```
`paths.py` finds the vault two parents above this file. Dumps live at `../manual_slop/docs/twitter`. Scratch lives at `../Threadwell-ai/scratch`.
@@ -59,6 +61,8 @@ A thread folder is named from the title in `index.md`: `-`. `r
Later emits use that same title for the folder and the frontmatter. Move both sides together. Each old archive prefix is replaced once in mutable `*.md` and `*.canvas` outside `.git/`, `site/`, `assets/`, `secrets/`, `node_modules/`, and frozen archive dirs.
+`relabel --all` patches existing `**N/**` lines to `**N/** @handle` from on-disk `thread_data.json`. No scrape. No folder rename. `--apply` writes notes only.
+
## Secrets
`secrets/twitter_cookies.txt` and `secrets/credentials.toml` stay on the machine that runs the capture. The scripts read them. They never print them. The Catbox hash goes in an HTTPS form body, not on a process command line. The backup command prints `synced` or `error`, not the destination path.
@@ -67,7 +71,7 @@ Later emits use that same title for the folder and the frontmatter. Move both si
| Script | Job |
|---|---|
-| `tw.py` | locate / graph / refetch / add-branch / emit / refresh / ocr / merge / sync / publish / migrate-media / backup / fallback / restore-origin / reslug |
+| `tw.py` | locate / graph / refetch / add-branch / emit / refresh / ocr / merge / sync / publish / migrate-media / backup / fallback / restore-origin / reslug / relabel |
| `graph_dry_run.py` | tip graph, no vault writes |
| `ingest_gallery.py` | gallery-dl JSON → `thread_data.json` |
| `emit_archive.py` | JSON → notes + assets. `--force` keeps derived and fallback rows |
diff --git a/scripts/twitter/emit_archive.py b/scripts/twitter/emit_archive.py
index c1764a5..45a5e72 100644
--- a/scripts/twitter/emit_archive.py
+++ b/scripts/twitter/emit_archive.py
@@ -780,6 +780,211 @@ def emit_all(
return len(dumps), skipped, written, errors
+# --- relabel (patch **N/** lines with @handle from on-disk JSON) ---
+
+
+_NUMBER_LINE: re.Pattern[str] = re.compile(
+ r"^(\*\*(\d+)/\*\*)(?: +@([A-Za-z0-9_]+))?[ \t]*$",
+ re.MULTILINE,
+)
+
+
+@dataclass(frozen=True)
+class RelabelItem:
+ """One note's in-place number-line patch outcome."""
+ path: Path
+ state: str
+ reason: str
+
+
+@dataclass(frozen=True)
+class RelabelPlan:
+ """Corpus plan for patching ``**N/**`` lines. Notes only."""
+ vault: Path
+ items: tuple[RelabelItem, ...]
+
+ @property
+ def can_apply(self) -> bool:
+ return not any(item.state == "conflict" for item in self.items)
+
+
+def _first_nonempty_line(text: str) -> str:
+ for line in text.splitlines():
+ stripped = line.strip()
+ if stripped:
+ return stripped
+ return ""
+
+
+def _extract_post_body(after_number_line: str) -> str:
+ """Text after a ``**N/**`` line, stopping at media, branches, or a heading."""
+ lines: list[str] = []
+ for line in after_number_line.lstrip("\n").splitlines():
+ if line.startswith("![") or line.startswith(" str:
+ """Return the note-root ``handle:`` value, or empty."""
+ in_front = False
+ for line in text.splitlines():
+ if line.strip() == "---":
+ if in_front:
+ return ""
+ in_front = True
+ continue
+ if in_front and line.startswith("handle:"):
+ return line.split(":", 1)[1].strip()
+ return ""
+
+
+def match_post_for_body(
+ body: str,
+ posts: tuple,
+ used: set[str],
+) -> object | None:
+ """Return one unused post whose first line matches ``body``.
+
+ Duplicate first lines are fine when every hit has the same handle.
+ Mixed-handle collisions return ``None``.
+ """
+ first = _first_nonempty_line(body)
+ if not first:
+ return None
+ hits = [
+ post
+ for post in posts
+ if post.post_id not in used
+ and _first_nonempty_line(post.text) == first
+ ]
+ if not hits:
+ return None
+ handles = {str(post.handle or "") for post in hits}
+ if len(handles) > 1:
+ return None
+ hits.sort(key=lambda post: (post.timestamp, post.post_id))
+ return hits[0]
+
+
+def patch_note_text(text: str, posts: tuple) -> tuple[str, str, str]:
+ """Patch ``**N/**`` lines in ``text``. Returns ``(new_text, state, reason)``."""
+ matches = list(_NUMBER_LINE.finditer(text))
+ if not matches:
+ return text, "noop", "no number lines"
+ pieces: list[str] = []
+ last = 0
+ changed = False
+ unmatched: list[str] = []
+ used: set[str] = set()
+ root_handle = _frontmatter_handle(text)
+ for index, match in enumerate(matches):
+ pieces.append(text[last:match.start()])
+ number = match.group(2)
+ end = matches[index + 1].start() if index + 1 < len(matches) else len(text)
+ body = _extract_post_body(text[match.end():end])
+ post = match_post_for_body(body, posts, used)
+ handle = ""
+ if post is not None:
+ handle = str(post.handle or "")
+ if handle:
+ used.add(post.post_id)
+ if not handle and index == 0 and root_handle:
+ handle = root_handle
+ if not handle:
+ unmatched.append(f"**{number}/**")
+ pieces.append(match.group(0).rstrip())
+ last = match.end()
+ continue
+ new_line = f"**{number}/** @{handle}"
+ if new_line != match.group(0).rstrip():
+ changed = True
+ pieces.append(new_line)
+ last = match.end()
+ pieces.append(text[last:])
+ new_text = "".join(pieces)
+ reason = ",".join(unmatched)
+ if unmatched and not changed:
+ return text, "conflict", reason
+ if changed:
+ return new_text, "rewrite", reason
+ return text, "noop", ""
+
+
+def plan_relabel(vault: Path) -> RelabelPlan:
+ """Walk on-disk ``thread_data.json`` and classify each thread note."""
+ assets_root = vault / "assets" / "threads"
+ notes_root = vault / "archive" / "threads"
+ items: list[RelabelItem] = []
+ if not assets_root.is_dir():
+ return RelabelPlan(vault, ())
+ for data_path in sorted(assets_root.rglob("thread_data.json")):
+ relative = data_path.parent.relative_to(assets_root)
+ note_dir = notes_root / relative
+ if not note_dir.is_dir():
+ items.append(RelabelItem(note_dir, "conflict", "missing note dir"))
+ continue
+ try:
+ thread = load_thread(data_path)
+ except (OSError, ValueError, KeyError, TypeError) as exc:
+ items.append(RelabelItem(data_path, "conflict", str(exc)[:200]))
+ continue
+ notes = sorted(path for path in note_dir.glob("*.md") if path.is_file())
+ if not notes:
+ items.append(RelabelItem(note_dir, "conflict", "no notes"))
+ continue
+ for note_path in notes:
+ text = note_path.read_text(encoding="utf-8")
+ _new, state, reason = patch_note_text(text, thread.posts)
+ items.append(RelabelItem(note_path, state, reason))
+ return RelabelPlan(vault, tuple(items))
+
+
+def apply_relabel(plan: RelabelPlan) -> None:
+ """Write ``rewrite`` notes. Leave conflicts and JSON/media untouched."""
+ assets_root = plan.vault / "assets" / "threads"
+ notes_root = plan.vault / "archive" / "threads"
+ for item in plan.items:
+ if item.state != "rewrite":
+ continue
+ try:
+ relative = item.path.parent.relative_to(notes_root)
+ except ValueError:
+ continue
+ data_path = assets_root / relative / "thread_data.json"
+ if not data_path.is_file():
+ continue
+ thread = load_thread(data_path)
+ text = item.path.read_text(encoding="utf-8")
+ new_text, state, _reason = patch_note_text(text, thread.posts)
+ if state != "rewrite":
+ continue
+ item.path.write_text(new_text, encoding="utf-8", newline="\n")
+
+
+def format_relabel_plan(plan: RelabelPlan) -> str:
+ """Print one line per note plus counts."""
+ lines: list[str] = []
+ counts = {"rewrite": 0, "noop": 0, "conflict": 0}
+ for item in plan.items:
+ counts[item.state] = counts.get(item.state, 0) + 1
+ extra = f" {item.reason}" if item.reason else ""
+ lines.append(f"{item.state} {item.path}{extra}")
+ lines.append(
+ f"rewrite={counts.get('rewrite', 0)} "
+ f"noop={counts.get('noop', 0)} "
+ f"conflict={counts.get('conflict', 0)}"
+ )
+ return "\n".join(lines) + "\n"
+
+
# --- reslug (one-time bulk title/path reconciliation) ---
diff --git a/scripts/twitter/render.py b/scripts/twitter/render.py
index 06571ac..d5d2ab6 100644
--- a/scripts/twitter/render.py
+++ b/scripts/twitter/render.py
@@ -106,9 +106,10 @@ def _post_block(
media_by_post: dict[str, tuple[str, ...]] | None,
branch_links: list[str] | None = None,
) -> str:
- """Render one post body (``**N/**`` + text + media embeds + branch links)."""
- parts = [f"**{n}/**", "", post.text]
- parts = [f"**{n}/**", "", post.text]
+ """Render one post body (``**N/** @handle`` + text + media + branch links)."""
+ if not post.handle:
+ raise ValueError(f"empty handle on post {post.post_id}")
+ parts = [f"**{n}/** @{post.handle}", "", post.text]
media = (media_by_post or {}).get(post.post_id) or ()
if media:
parts.append("")
diff --git a/scripts/twitter/tests/test_reply_attribution.py b/scripts/twitter/tests/test_reply_attribution.py
new file mode 100644
index 0000000..955a835
--- /dev/null
+++ b/scripts/twitter/tests/test_reply_attribution.py
@@ -0,0 +1,299 @@
+from __future__ import annotations
+
+import unittest
+from pathlib import Path
+from tempfile import TemporaryDirectory
+from unittest.mock import patch
+
+from twitter.emit_archive import apply_relabel, format_relabel_plan, plan_relabel
+from twitter.models import PostData, PostMetrics, ThreadData
+from twitter.render import _post_block, render_branch, render_spine
+from twitter.tw import build_parser, cmd_relabel
+
+
+def post(
+ post_id: str,
+ handle: str,
+ text: str,
+ reply_to_id: str | None,
+) -> PostData:
+ return PostData(
+ post_id=post_id,
+ author=handle,
+ handle=handle,
+ text=text,
+ timestamp="2025-03-08 12:00:00",
+ media_urls=(),
+ reply_to_id=reply_to_id,
+ quote_of_id=None,
+ metrics=PostMetrics(0, 0, 0, None),
+ )
+
+
+class PostBlockAttributionTests(unittest.TestCase):
+ def test_number_line_includes_handle(self) -> None:
+ block = _post_block(
+ 19,
+ post("1898440015182729598", "SebAaltonen", "WG_RR_EN", "1"),
+ None,
+ )
+ self.assertTrue(block.startswith("**19/** @SebAaltonen\n"))
+ self.assertIn("WG_RR_EN", block)
+
+ def test_empty_handle_raises(self) -> None:
+ with self.assertRaises(ValueError):
+ _post_block(1, post("1", "", "text", None), None)
+
+
+class RenderAttributionTests(unittest.TestCase):
+ def test_mixed_spine_labels_each_post(self) -> None:
+ thread = ThreadData(
+ root_post_id="1",
+ posts=(
+ post("1", "rianflo", "The road to 16-bit", None),
+ post("2", "NOTimothyLottes", "Explicit packed 16-bit", "1"),
+ post("3", "rianflo", "Oh I know the benefits", "2"),
+ ),
+ source_url="https://x.com/rianflo/status/1",
+ )
+ text = render_spine(thread, ["1", "2", "3"], [], {}, "2026-08-25")
+ self.assertIn("**1/** @rianflo", text)
+ self.assertIn("**2/** @NOTimothyLottes", text)
+ self.assertIn("**3/** @rianflo", text)
+
+ def test_mixed_branch_labels_seb_and_jebrim(self) -> None:
+ thread = ThreadData(
+ root_post_id="root",
+ posts=(
+ post("root", "SebAaltonen", "Stupid hardware question", None),
+ post(
+ "1898352640825651644",
+ "NOTimothyLottes",
+ "@SebAaltonen Actually this is a super important question IMO.",
+ "root",
+ ),
+ post(
+ "1898440015182729598",
+ "SebAaltonen",
+ "@NOTimothyLottes I said WG_RR_EN",
+ "1898352640825651644",
+ ),
+ post(
+ "1898385745892495810",
+ "AgileJebrim",
+ "On the flip side, it appears that using 128",
+ "1898352640825651644",
+ ),
+ ),
+ source_url="https://x.com/SebAaltonen/status/root",
+ )
+ text = render_branch(
+ thread,
+ "1898352640825651644",
+ ["1898440015182729598", "1898385745892495810"],
+ "SebAaltonen",
+ "2026-08-25",
+ )
+ self.assertIn("**1/** @NOTimothyLottes", text)
+ self.assertIn("**2/** @SebAaltonen", text)
+ self.assertIn("**3/** @AgileJebrim", text)
+ for line in text.splitlines():
+ if line.startswith("**") and "/**" in line:
+ self.assertRegex(line, r"^\*\*\d+/\*\* @[A-Za-z0-9_]+$")
+
+
+class RelabelPatchTests(unittest.TestCase):
+ def _vault(self, raw: str) -> tuple[Path, Path, Path]:
+ root = Path(raw)
+ asset = (
+ root / "assets" / "threads" / "SebAaltonen" / "2025-03-08-amd"
+ )
+ notes = (
+ root / "archive" / "threads" / "SebAaltonen" / "2025-03-08-amd"
+ )
+ asset.mkdir(parents=True)
+ notes.mkdir(parents=True)
+ (asset / "thread_data.json").write_text(
+ """{
+ "root_post_id": "root",
+ "source_url": "https://x.com/SebAaltonen/status/root",
+ "posts": [
+ {
+ "post_id": "root",
+ "author": "SebAaltonen",
+ "handle": "SebAaltonen",
+ "text": "Stupid hardware question",
+ "timestamp": "2025-03-08 07:20:39",
+ "media_urls": [],
+ "reply_to_id": null,
+ "quote_of_id": null,
+ "metrics": {"reply_count": 0, "repost_count": 0, "like_count": 0, "view_count": 1}
+ },
+ {
+ "post_id": "1898440015182729598",
+ "author": "SebAaltonen",
+ "handle": "SebAaltonen",
+ "text": "@NOTimothyLottes I said WG_RR_EN",
+ "timestamp": "2025-03-08 18:00:00",
+ "media_urls": [],
+ "reply_to_id": "1898352640825651644",
+ "quote_of_id": null,
+ "metrics": {"reply_count": 0, "repost_count": 0, "like_count": 0, "view_count": 1}
+ },
+ {
+ "post_id": "1898385745892495810",
+ "author": "AgileJebrim",
+ "handle": "AgileJebrim",
+ "text": "On the flip side, it appears that using 128",
+ "timestamp": "2025-03-08 17:00:00",
+ "media_urls": [],
+ "reply_to_id": "1898352640825651644",
+ "quote_of_id": null,
+ "metrics": {"reply_count": 0, "repost_count": 0, "like_count": 0, "view_count": 1}
+ }
+ ]
+}
+""",
+ encoding="utf-8",
+ newline="\n",
+ )
+ (asset / "media.json").write_text(
+ '{"schema_version": 2, "root_post_id": "root", "items": []}\n',
+ encoding="utf-8",
+ newline="\n",
+ )
+ (notes / "index.md").write_text(
+ "---\ndraft: false\ntags:\n - archive\n - vulkan\n---\n\n"
+ "## Thread\n\n"
+ "**1/**\n\n"
+ "Stupid hardware question\n",
+ encoding="utf-8",
+ newline="\n",
+ )
+ (notes / "branch.md").write_text(
+ "---\ndraft: false\n---\n\n"
+ "## Branch\n\n"
+ "**19/**\n\n"
+ "@NOTimothyLottes I said WG_RR_EN\n\n"
+ "**33/**\n\n"
+ "On the flip side, it appears that using 128\n\n"
+ "## Visible chain\n\n"
+ "1. **Onat Turkcuoglu** (@onatt0) - Apr 30\n"
+ " holy truthnuke\n",
+ encoding="utf-8",
+ newline="\n",
+ )
+ return root, asset, notes
+
+ def test_plan_rewrites_unlabeled_number_lines(self) -> None:
+ with TemporaryDirectory() as raw:
+ vault, asset, notes = self._vault(raw)
+ plan = plan_relabel(vault)
+ states = {item.path.name: item.state for item in plan.items}
+ self.assertEqual(states["index.md"], "rewrite")
+ self.assertEqual(states["branch.md"], "rewrite")
+ self.assertTrue(all(item.path.suffix == ".md" for item in plan.items))
+ self.assertFalse(
+ any(item.path.name == "thread_data.json" for item in plan.items)
+ )
+ json_before = (asset / "thread_data.json").read_bytes()
+ apply_relabel(plan)
+ self.assertEqual((asset / "thread_data.json").read_bytes(), json_before)
+ self.assertEqual((asset / "media.json").read_bytes(), (
+ b'{"schema_version": 2, "root_post_id": "root", "items": []}\n'
+ ))
+ branch = (notes / "branch.md").read_text(encoding="utf-8")
+ self.assertIn("**19/** @SebAaltonen", branch)
+ self.assertIn("**33/** @AgileJebrim", branch)
+ self.assertIn("1. **Onat Turkcuoglu** (@onatt0) - Apr 30", branch)
+ index = (notes / "index.md").read_text(encoding="utf-8")
+ self.assertIn("**1/** @SebAaltonen", index)
+ self.assertIn(" - vulkan", index)
+ self.assertIn("draft: false", index)
+
+ def test_already_labeled_is_noop(self) -> None:
+ with TemporaryDirectory() as raw:
+ vault, _asset, notes = self._vault(raw)
+ (notes / "index.md").write_text(
+ "---\ndraft: false\n---\n\n**1/** @SebAaltonen\n\n"
+ "Stupid hardware question\n",
+ encoding="utf-8",
+ newline="\n",
+ )
+ (notes / "branch.md").write_text(
+ "---\ndraft: false\n---\n\n"
+ "**19/** @SebAaltonen\n\n"
+ "@NOTimothyLottes I said WG_RR_EN\n\n"
+ "**33/** @AgileJebrim\n\n"
+ "On the flip side, it appears that using 128\n",
+ encoding="utf-8",
+ newline="\n",
+ )
+ plan = plan_relabel(vault)
+ self.assertTrue(all(item.state == "noop" for item in plan.items))
+ before = (notes / "index.md").read_bytes()
+ apply_relabel(plan)
+ self.assertEqual((notes / "index.md").read_bytes(), before)
+
+ def test_duplicate_first_line_same_handle_rewrites(self) -> None:
+ from twitter.emit_archive import patch_note_text
+
+ posts = (
+ post("1", "simplex_fx", "How big?", None),
+ post("2", "simplex_fx", "How big?", "1"),
+ )
+ text = "**30/**\n\nHow big?\n\n**31/**\n\nHow big?\n"
+ new, state, reason = patch_note_text(text, posts)
+ self.assertEqual(state, "rewrite")
+ self.assertEqual(reason, "")
+ self.assertIn("**30/** @simplex_fx", new)
+ self.assertIn("**31/** @simplex_fx", new)
+
+ def test_empty_handle_is_conflict(self) -> None:
+ with TemporaryDirectory() as raw:
+ vault, asset, notes = self._vault(raw)
+ text = (asset / "thread_data.json").read_text(encoding="utf-8")
+ (asset / "thread_data.json").write_text(
+ text.replace('"handle": "SebAaltonen"', '"handle": ""', 1),
+ encoding="utf-8",
+ )
+ plan = plan_relabel(vault)
+ self.assertTrue(any(item.state == "conflict" for item in plan.items))
+ before = (notes / "index.md").read_bytes()
+ apply_relabel(plan)
+ self.assertEqual((notes / "index.md").read_bytes(), before)
+
+ def test_parser_and_dry_run_do_not_apply(self) -> None:
+ args = build_parser().parse_args(["relabel", "--all"])
+ self.assertFalse(args.apply)
+ args = build_parser().parse_args(["relabel", "--all", "--apply"])
+ self.assertTrue(args.apply)
+ with TemporaryDirectory() as raw:
+ vault, _asset, notes = self._vault(raw)
+ before = (notes / "branch.md").read_bytes()
+ with patch("twitter.tw.VAULT", vault):
+ code = cmd_relabel(
+ build_parser().parse_args(["relabel", "--all"])
+ )
+ self.assertEqual(code, 0)
+ self.assertEqual((notes / "branch.md").read_bytes(), before)
+
+
+class RelabelFormatTests(unittest.TestCase):
+ def test_format_lists_states(self) -> None:
+ from twitter.emit_archive import RelabelItem, RelabelPlan
+
+ plan = RelabelPlan(
+ vault=Path("v"),
+ items=(
+ RelabelItem(Path("v/a.md"), "rewrite", ""),
+ RelabelItem(Path("v/b.md"), "noop", ""),
+ ),
+ )
+ text = format_relabel_plan(plan)
+ self.assertIn("rewrite", text)
+ self.assertIn("noop", text)
+
+
+if __name__ == "__main__":
+ unittest.main()
diff --git a/scripts/twitter/tw.py b/scripts/twitter/tw.py
index b60f285..3bf6a88 100644
--- a/scripts/twitter/tw.py
+++ b/scripts/twitter/tw.py
@@ -35,7 +35,14 @@ try:
from frozen import frozen_match, load_frozen_ids, require_writable
from backup_assets import backup_thread, load_destination_root
from catbox_client import load_userhash, upload_file
- from emit_archive import apply_reslug_plan, format_reslug_plan, plan_reslug
+ from emit_archive import (
+ apply_relabel,
+ apply_reslug_plan,
+ format_relabel_plan,
+ format_reslug_plan,
+ plan_relabel,
+ plan_reslug,
+ )
from fallback_media import activate_fallback, find_existing_fallback, restore_origin
from media_audit import audit_thread
from media_migrate import migrate_legacy_thread
@@ -43,7 +50,14 @@ except ImportError: # pragma: no cover - script-mode import
from frozen import frozen_match, load_frozen_ids, require_writable
from backup_assets import backup_thread, load_destination_root
from catbox_client import load_userhash, upload_file
- from emit_archive import apply_reslug_plan, format_reslug_plan, plan_reslug
+ from emit_archive import (
+ apply_relabel,
+ apply_reslug_plan,
+ format_relabel_plan,
+ format_reslug_plan,
+ plan_relabel,
+ plan_reslug,
+ )
from fallback_media import activate_fallback, find_existing_fallback, restore_origin
from media_audit import audit_thread
from media_migrate import migrate_legacy_thread
@@ -811,6 +825,19 @@ def cmd_reslug(args: argparse.Namespace) -> int:
return 0
+def cmd_relabel(args: argparse.Namespace) -> int:
+ """Patch ``**N/**`` lines from on-disk JSON. Notes only."""
+ if not args.all_threads:
+ raise SystemExit("relabel requires --all")
+ plan = plan_relabel(VAULT)
+ print(format_relabel_plan(plan), end="")
+ conflicts = any(item.state == "conflict" for item in plan.items)
+ if not args.apply:
+ return 2 if conflicts else 0
+ apply_relabel(plan)
+ return 2 if conflicts else 0
+
+
def build_parser() -> argparse.ArgumentParser:
parser = argparse.ArgumentParser(description=__doc__)
sub = parser.add_subparsers(dest="cmd", required=True)
@@ -916,6 +943,13 @@ def build_parser() -> argparse.ArgumentParser:
reslug.add_argument("--all", dest="all_threads", action="store_true", required=True)
reslug.add_argument("--apply", action="store_true")
+ relabel = sub.add_parser(
+ "relabel",
+ help="patch **N/** lines with @handle from on-disk JSON",
+ )
+ relabel.add_argument("--all", dest="all_threads", action="store_true", required=True)
+ relabel.add_argument("--apply", action="store_true")
+
return parser
@@ -937,6 +971,7 @@ _COMMANDS: dict[str, Callable[[argparse.Namespace], int]] = {
"fallback": cmd_fallback,
"restore-origin": cmd_restore_origin,
"reslug": cmd_reslug,
+ "relabel": cmd_relabel,
}