fa2296a124
[runtime] Add builtin shrink for dynamic arrays and maps
...
Asks the allocator to shrink the backing allocation to the current __length__, or a capacity
of the user's choosing.
Returns `(did_shrink: bool, err: mem.Allocator_Error)`.
```
shrink(&array) // shrinks to len(array)
shrink(&array, N) // shrink to N capacity
shrink(&map) // shrinks down to len(map)
shrink(&map, N) // shrink to N capacity
```
2022-06-04 23:29:47 +00:00
66de1856e3
tighter allocation for arena allocator
2022-06-01 21:37:05 -04:00
ba5f7c4e2a
Deprecate a..b based ranges in favour of ..=
2022-06-01 11:08:19 +01:00
a1f15c2c69
Merge pull request #1807 from odin-lang/simd-dev
...
Generic #simd type and intrinsics
2022-05-31 11:52:24 +01:00
a7840d50e2
Correct documentation
2022-05-31 00:01:23 +01:00
cb10af08cb
Correct intrinsics.odin for documentation
2022-05-30 16:42:32 +01:00
4e49d24df9
Add enable_target_feature to ABM
2022-05-30 16:08:06 +01:00
68222cb8ab
Add SSE4.2
2022-05-30 16:06:31 +01:00
912d29af83
Add @(require_results) to all appropriate procedures
2022-05-30 15:59:48 +01:00
51707032d1
Add SSE4.1
2022-05-30 15:17:02 +01:00
f3aefbc443
@(require_target_feature=<string>) @(enable_target_feature=<string>)
...
require_target_feature - required by the target micro-architecture
enable_target_feature - will be enabled for the specified procedure only
2022-05-30 14:53:12 +01:00
cef022539e
Rename to lanes_rotate_left, lanes_rotate_right, lanes_reverse
2022-05-29 15:13:14 +01:00
f6dfa33697
Use single line attributes
2022-05-29 15:11:15 +01:00
bc3bf939e0
Add sha.odin
2022-05-29 14:56:25 +01:00
f5e5eac3b9
Add cmpxchg16b
2022-05-29 14:46:05 +01:00
0ccbea17aa
Add pclmulqdq.odin
2022-05-29 13:50:54 +01:00
babfba5e8f
Add rdtsc.odin
2022-05-29 13:48:20 +01:00
846f8377b2
Add fxsr.odin
2022-05-29 13:44:00 +01:00
77d4409549
Add adx.odin
2022-05-29 13:40:16 +01:00
7f3540b7f5
Add abm.odin
2022-05-29 13:36:55 +01:00
3ad2cde833
Add amd64 specific instructions
2022-05-29 13:34:59 +01:00
910799cc5f
Add cpu_features for core:simd/x86
2022-05-28 15:54:41 +01:00
c60d7842cd
Remove old code
2022-05-28 15:41:27 +01:00
d7eaf0f87b
Add intrinsics.x86_cpuid and intrinsics.x86_xgetbv
2022-05-28 15:41:11 +01:00
bb4329711c
[os] Darwin: Add os.exists()
2022-05-28 15:21:07 +01:00
4db533ff71
Add ssse3 support
2022-05-27 23:07:33 +01:00
026540040d
Add SSE3 support
2022-05-27 23:00:52 +01:00
8518d3b232
Rename to non_temporaral_*
2022-05-27 22:57:16 +01:00
1c1f5e2231
Complete SSE2
2022-05-27 22:56:11 +01:00
20c5033b38
Add pack and unpack
2022-05-27 17:07:48 +01:00
20fe6d102a
Add load and stores and sets
2022-05-27 16:58:35 +01:00
4e30a64d9f
Add more sse2 intrinsics
2022-05-27 16:49:52 +01:00
c48ef7d70b
Add shifts
2022-05-27 16:39:54 +01:00
e079a7009d
Begin work on sse2.odin
2022-05-27 16:09:31 +01:00
f383bf3136
Add _mm_stream_ps
2022-05-27 14:59:09 +01:00
609ddf28b7
Add intrinsics nontemporal_store and nontemporal_load
2022-05-27 14:56:36 +01:00
2185dada56
Change package name
2022-05-27 14:26:02 +01:00
0b08080119
Add core:simd/x86 SSE
...
Proof of Concept to show intrinsics specific to a certain target platform
2022-05-27 14:23:31 +01:00
952f294bce
Add loads of aliases of vector types
2022-05-27 12:20:48 +01:00
1ff8b97dae
Add prefix of lanes_
2022-05-26 20:44:37 +01:00
70451f9335
Support reverse_bits for #simd
2022-05-26 20:40:48 +01:00
1f438d4e6c
Merge intrinsics.simd_sqrt with intrinsics.sqrt
2022-05-26 18:09:59 +01:00
421d45a7a7
Add intrinsics.fused_mul_add
2022-05-26 18:06:26 +01:00
20e7b5c88a
Support count_ones etc with #simd
2022-05-26 17:48:51 +01:00
7092273a8f
Rename simd_eq etc to simd_lanes_eq
2022-05-26 17:36:13 +01:00
d0e8a735ba
Add arithmetic operator support for simd vectors; Add intrinsics.simd_and_not
2022-05-26 17:09:46 +01:00
f308f37ba1
Remove need for simd.splat
2022-05-26 14:51:50 +01:00
c2610cb75e
Keep -vet happy
2022-05-26 13:56:35 +01:00
59e9df2609
simd.bit_not; simd.copysign
2022-05-26 13:49:27 +01:00
f3f6c12a7c
Add simd_clamp
2022-05-26 11:58:55 +01:00
Tetralux
Ian Lilley
gingerBill
gingerBill
William Roe