efe68c2e24
posix: add package
2024-08-14 01:44:35 +02:00
f56abf3780
Add intrinsics.masked_expand_load and intrinsics.masked_compress_store
2024-08-05 14:54:09 +01:00
84ac56f778
Add intrinsics.simd_masked_load and intrinsics.simd_masked_store
2024-08-05 14:08:41 +01:00
7e701d1677
Add intrinsics.simd_gather and `intrinsics.simd_scatter
2024-08-05 13:46:24 +01:00
90fc52c2ee
Rename add_sat -> saturating_add
2024-08-05 13:19:01 +01:00
9a01a13914
Add simd_reduce_any and simd_reduce_all
2024-08-05 13:13:19 +01:00
23ca27f40b
Add intrinsics add_sat and sub_sat
2024-07-16 00:48:17 +01:00
544959326b
Add intrinsics.type_struct_has_implicit_padding #3844
2024-07-01 12:13:35 +01:00
5b5402fb23
Add intrinsics.syscall_bsd
...
This is a BSD-style syscall that checks for a high Carry Flag as the
error state. If the CF is high, the boolean return value is false, and
if it is low (no errors) then the boolean return value is true.
2024-06-12 13:07:13 -04:00
fa3cae2bb0
Add intrinsics.procedure_of
...
```odin
foo :: proc(x: $T) { fmt.println(x) }
bar :: intrinsics.procedure_of(foo(int(123))) // parameters are never ran at compile time, similar to `size_of`
bar(333) // prints 333
```
2024-06-10 15:02:34 +01:00
5473758467
Add intrinsics type_is_matrix_row_major & type_is_matrix_column_major
2024-05-20 10:15:21 +01:00
b0f0e4d02a
Add intrinsics type_bit_set_elem_type & type_bit_set_underlying_type
2024-05-09 15:47:09 +01:00
25f1d0906d
compiler: improve target features support
2024-05-02 00:59:52 +02:00
a642ea0b28
Add intrinsics.type_bit_set_backing_type
2024-02-23 11:38:23 +00:00
d04c82e547
Move matrix compiler builtins to intrinsics; alias within core_builtin_matrix.odin
2024-01-28 21:20:30 +00:00
160b23f991
Remove len,cap,min,max and implement type_union_base_tag_value, type_union_variant_count
2023-10-27 11:23:26 +02:00
625cb03284
Rename type_union_tag to type_union_tag_type
2023-10-25 20:23:24 +02:00
c76ab138eb
Naming, use variant index instead of tag
2023-10-24 22:15:33 +02:00
16c176dc89
Implement new union intrinsics and add support for len/cap
2023-10-23 22:03:06 +02:00
63f755554b
Rename simd bitwise operations from intrinsics.simd_and to intrinsics.simd_bit_and etc
2023-09-28 16:42:08 +01:00
2631e07bea
Add intrinsics.type_merge
2023-05-19 11:18:20 +01:00
8a16fd7699
Rename built-in procedure to expand_values
2023-02-07 15:39:39 +00:00
a74093784c
Add intrinsics.map_cell_info and intrinsics.map_info
2022-11-08 12:24:00 +00:00
ed58374964
Make Map_Info store pointers to cell info rather than inline
2022-11-08 12:18:36 +00:00
6a14c3edb4
Make raw_data an intrinsic rather a @(builtin) runtime procedure
2022-10-30 22:05:29 +00:00
f77709e67e
Add intrinsics.type_convert_variants_to_pointers and reflect.get_union_as_ptr_variants
2022-09-08 16:52:51 +01:00
82e840a0ca
EXPERIMENTAL intrinsics.valgrind_client_request
2022-08-17 13:52:13 +01:00
576914aee1
Make unreachable() a built-in compiler-level procedure
2022-08-05 11:57:33 +01:00
b1ae5bc9fe
Changed param count from 2 to 1 for simd_abs.
2022-07-28 15:28:26 +02:00
f3868ac932
Improve missing handled results for built in procedures
2022-05-30 15:57:26 +01:00
cef022539e
Rename to lanes_rotate_left, lanes_rotate_right, lanes_reverse
2022-05-29 15:13:14 +01:00
d7eaf0f87b
Add intrinsics.x86_cpuid and intrinsics.x86_xgetbv
2022-05-28 15:41:11 +01:00
8518d3b232
Rename to non_temporaral_*
2022-05-27 22:57:16 +01:00
609ddf28b7
Add intrinsics nontemporal_store and nontemporal_load
2022-05-27 14:56:36 +01:00
432b2b19e9
Add intrinsics.simd_x86__MM_SHUFFLE
2022-05-27 12:54:28 +01:00
1f438d4e6c
Merge intrinsics.simd_sqrt with intrinsics.sqrt
2022-05-26 18:09:59 +01:00
421d45a7a7
Add intrinsics.fused_mul_add
2022-05-26 18:06:26 +01:00
7092273a8f
Rename simd_eq etc to simd_lanes_eq
2022-05-26 17:36:13 +01:00
d0e8a735ba
Add arithmetic operator support for simd vectors; Add intrinsics.simd_and_not
2022-05-26 17:09:46 +01:00
66b5a35ec3
Add simd_to_bits; correct fix typo causing issue with parapoly
2022-05-26 13:45:47 +01:00
f3f6c12a7c
Add simd_clamp
2022-05-26 11:58:55 +01:00
e331b0647e
Add simd_rotate_left simd_rotate_right`
2022-05-26 11:48:04 +01:00
35502816c7
Add simd_add_sat simd_sub_sat
2022-05-26 11:24:10 +01:00
7ec0236fbf
Add simd_reverse
2022-05-26 11:14:22 +01:00
0fd43c1a0b
Add simd.{sqrt, ceil, floor, trunc, nearest}
2022-05-26 11:02:02 +01:00
06337129d8
Remove intrinsics.odin.simd_vector in favour of #simd[N]T
2022-05-26 10:38:51 +01:00
cde6a2f7a5
Make simd_shuffle act closer to swizzle
2022-05-26 00:36:24 +01:00
7002c94a63
Add intrinsics.simd_select
2022-05-25 23:34:41 +01:00
140c00aa0c
intrinsics.simd_shuffle
2022-05-25 23:01:33 +01:00
10e4de3c01
Add intrinsics.simd_reduce_*
2022-05-25 22:04:47 +01:00
Laytan Laats
gingerBill
Feoramund
jakubtomsu
Jorri Fransen