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Improve llreg integer type generation for SysV ABI

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This commit is contained in:
gingerBill
2023-03-19 01:29:53 +00:00
parent fa62963da7
commit fe533fb809
1 changed files with 81 additions and 60 deletions
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src/llvm_abi.cpp
+25 -4
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@@ -787,15 +787,35 @@ namespace lbAbiAmd64SysV {
gb_internal LLVMTypeRef llreg(LLVMContextRef c, Array<RegClass> const &reg_classes, LLVMTypeRef type) { gb_internal LLVMTypeRef llreg(LLVMContextRef c, Array<RegClass> const &reg_classes, LLVMTypeRef type) {
auto types = array_make<LLVMTypeRef>(heap_allocator(), 0, reg_classes.count); auto types = array_make<LLVMTypeRef>(heap_allocator(), 0, reg_classes.count);
bool all_ints = true;
for (RegClass reg_class : reg_classes) {
if (reg_class != RegClass_Int) {
all_ints = false;
break;
}
}
if (all_ints) {
i64 sz = lb_sizeof(type);
for_array(i, reg_classes) {
GB_ASSERT(sz != 0);
// TODO(bill): is this even correct? BECAUSE LLVM DOES NOT DOCUMENT ANY OF THIS!!!
if (sz >= 8) {
array_add(&types, LLVMIntTypeInContext(c, 64));
sz -= 8;
} else {
array_add(&types, LLVMIntTypeInContext(c, cast(unsigned)(sz*8)));
sz = 0;
}
}
} else {
for (isize i = 0; i < reg_classes.count; /**/) { for (isize i = 0; i < reg_classes.count; /**/) {
RegClass reg_class = reg_classes[i]; RegClass reg_class = reg_classes[i];
switch (reg_class) { switch (reg_class) {
case RegClass_Int: case RegClass_Int:
if (reg_classes.count == 1) { // TODO(bill): is this even correct? BECAUSE LLVM DOES NOT DOCUMENT ANY OF THIS!!!
array_add(&types, LLVMIntTypeInContext(c, cast(unsigned)(lb_sizeof(type)*8)));
} else {
array_add(&types, LLVMIntTypeInContext(c, 64)); array_add(&types, LLVMIntTypeInContext(c, 64));
}
break; break;
case RegClass_SSEFv: case RegClass_SSEFv:
case RegClass_SSEDv: case RegClass_SSEDv:
@@ -851,6 +871,7 @@ namespace lbAbiAmd64SysV {
} }
i += 1; i += 1;
} }
}
if (types.count == 1) { if (types.count == 1) {
return types[0]; return types[0];