Add simd_rotate_left simd_rotate_right`

core/intrinsics/intrinsics.odin

@@ -252,6 +252,10 @@ simd_nearest :: proc(a: #simd[N]any_float) -> #simd[N]any_float ---
 // equivalent a swizzle with descending indices, e.g. reserve(a, 3, 2, 1, 0)
 simd_reverse :: proc(a: #simd[N]T) -> #simd[N]T ---
 
+simd_rotate_left  :: proc(a: #simd[N]T, $offset: int) -> #simd[N]T ---
+simd_rotate_right :: proc(a: #simd[N]T, $offset: int) -> #simd[N]T ---
+
+
 // WASM targets only
 wasm_memory_grow :: proc(index, delta: uintptr) -> int ---
 wasm_memory_size :: proc(index: uintptr)        -> int ---

core/simd/simd.odin

@@ -96,6 +96,9 @@ nearest :: intrinsics.simd_nearest
 
 reverse :: intrinsics.simd_reverse
 
+rotate_left  :: intrinsics.simd_rotate_left
+rotate_right :: intrinsics.simd_rotate_right
+
 splat :: #force_inline proc "contextless" ($T: typeid/#simd[$LANES]$E, value: E) -> T {
 	return T{0..<LANES = value}
 }

src/check_builtin.cpp

@@ -933,6 +933,29 @@ bool check_builtin_simd_operation(CheckerContext *c, Operand *operand, Ast *call
 			return true;
 		}
 
+	case BuiltinProc_simd_rotate_left:
+	case BuiltinProc_simd_rotate_right:
+		{
+			Operand x = {};
+			check_expr(c, &x, ce->args[0]); if (x.mode == Addressing_Invalid) { return false; }
+			if (!is_type_simd_vector(x.type)) {
+				error(x.expr, "'%.*s' expected a simd vector type", LIT(builtin_name));
+				return false;
+			}
+			Operand offset = {};
+			check_expr(c, &offset, ce->args[1]); if (offset.mode == Addressing_Invalid) { return false; }
+			convert_to_typed(c, &offset, t_i64);
+			if (!is_type_integer(offset.type) || offset.mode != Addressing_Constant) {
+				error(offset.expr, "'%.*s' expected a constant integer offset");
+				return false;
+			}
+			check_assignment(c, &offset, t_i64, builtin_name);
+
+			operand->type = x.type;
+			operand->mode = Addressing_Value;
+			return true;
+		}
+
 	default:
 		GB_PANIC("Unhandled simd intrinsic: %.*s", LIT(builtin_name));
 	}

src/checker_builtin_procs.hpp

@@ -170,6 +170,8 @@ BuiltinProc__simd_begin,
 	BuiltinProc_simd_nearest,
 
 	BuiltinProc_simd_reverse,
+	BuiltinProc_simd_rotate_left,
+	BuiltinProc_simd_rotate_right,
 BuiltinProc__simd_end,
 	
 	// Platform specific intrinsics
@@ -444,6 +446,8 @@ gb_global BuiltinProc builtin_procs[BuiltinProc_COUNT] = {
 	{STR_LIT("simd_nearest"), 1, false, Expr_Expr, BuiltinProcPkg_intrinsics},
 
 	{STR_LIT("simd_reverse"), 1, false, Expr_Expr, BuiltinProcPkg_intrinsics},
+	{STR_LIT("simd_rotate_left"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
+	{STR_LIT("simd_rotate_right"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
 	{STR_LIT(""), 0, false, Expr_Stmt, BuiltinProcPkg_intrinsics},
 
 

src/llvm_backend_proc.cpp

@@ -1353,6 +1353,41 @@ lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAndValue const
 			return res;
 		}
 
+	case BuiltinProc_simd_rotate_left:
+	case BuiltinProc_simd_rotate_right:
+		{
+
+			i64 count = get_array_type_count(arg0.type);
+			GB_ASSERT(is_power_of_two(count));
+			BigInt bi_count = {};
+			big_int_from_i64(&bi_count, count);
+
+			TypeAndValue const &tv = ce->args[1]->tav;
+			ExactValue val = exact_value_to_integer(tv.value);
+			GB_ASSERT(val.kind == ExactValue_Integer);
+			BigInt *bi = &val.value_integer;
+			if (builtin_id == BuiltinProc_simd_rotate_right) {
+				big_int_neg(bi, bi);
+			}
+			big_int_rem(bi, bi, &bi_count);
+			big_int_dealloc(&bi_count);
+
+			i64 left = big_int_to_i64(bi);
+
+			LLVMValueRef *values = gb_alloc_array(temporary_allocator(), LLVMValueRef, count);
+			LLVMTypeRef llvm_u32 = lb_type(m, t_u32);
+			for (i64 i = 0; i < count; i++) {
+				u64 idx = cast(u64)(i+left) & cast(u64)(count-1);
+				values[i] = LLVMConstInt(llvm_u32, idx, false);
+			}
+			LLVMValueRef mask = LLVMConstVector(values, cast(unsigned)count);
+
+			LLVMValueRef v = arg0.value;
+			res.value = LLVMBuildShuffleVector(p->builder, v, v, mask, "");
+			return res;
+		}
+
+
 	case BuiltinProc_simd_add_sat:
 	case BuiltinProc_simd_sub_sat:
 		{