mirror of
https://github.com/Ed94/Odin.git
synced 2026-08-03 05:08:14 +00:00
Merge tag 'dev-2025-06'
This commit is contained in:
+209
-112
@@ -16,6 +16,12 @@ RUNTIME_REQUIRE :: false // !ODIN_TILDE
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@(private)
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__float16 :: f16 when __ODIN_LLVM_F16_SUPPORTED else u16
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HAS_HARDWARE_SIMD :: false when (ODIN_ARCH == .amd64 || ODIN_ARCH == .i386) && !intrinsics.has_target_feature("sse2") else
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false when (ODIN_ARCH == .arm64 || ODIN_ARCH == .arm32) && !intrinsics.has_target_feature("neon") else
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false when (ODIN_ARCH == .wasm64p32 || ODIN_ARCH == .wasm32) && !intrinsics.has_target_feature("simd128") else
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false when (ODIN_ARCH == .riscv64) && !intrinsics.has_target_feature("v") else
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true
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@(private)
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byte_slice :: #force_inline proc "contextless" (data: rawptr, len: int) -> []byte #no_bounds_check {
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@@ -229,151 +235,242 @@ memory_equal :: proc "contextless" (x, y: rawptr, n: int) -> bool {
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case n == 0: return true
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case x == y: return true
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}
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a, b := ([^]byte)(x), ([^]byte)(y)
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length := uint(n)
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a, b := cast([^]byte)x, cast([^]byte)y
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for i := uint(0); i < length; i += 1 {
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n := uint(n)
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i := uint(0)
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m := uint(0)
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if n >= 8 {
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when HAS_HARDWARE_SIMD {
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// Avoid using 256-bit SIMD on platforms where its emulation is
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// likely to be less than ideal.
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when ODIN_ARCH == .amd64 && intrinsics.has_target_feature("avx2") {
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m = n / 32 * 32
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for /**/; i < m; i += 32 {
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load_a := intrinsics.unaligned_load(cast(^#simd[32]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[32]u8)&b[i])
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ne := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(ne) != 0 {
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return false
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}
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}
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}
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}
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m = (n-i) / 16 * 16
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for /**/; i < m; i += 16 {
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load_a := intrinsics.unaligned_load(cast(^#simd[16]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[16]u8)&b[i])
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ne := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(ne) != 0 {
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return false
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}
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}
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m = (n-i) / 8 * 8
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for /**/; i < m; i += 8 {
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if intrinsics.unaligned_load(cast(^uintptr)&a[i]) != intrinsics.unaligned_load(cast(^uintptr)&b[i]) {
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return false
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}
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}
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}
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for /**/; i < n; i += 1 {
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if a[i] != b[i] {
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return false
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}
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}
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return true
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/*
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when size_of(uint) == 8 {
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if word_length := length >> 3; word_length != 0 {
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for _ in 0..<word_length {
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if intrinsics.unaligned_load((^u64)(a)) != intrinsics.unaligned_load((^u64)(b)) {
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return false
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}
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a = a[size_of(u64):]
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b = b[size_of(u64):]
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}
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}
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if length & 4 != 0 {
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if intrinsics.unaligned_load((^u32)(a)) != intrinsics.unaligned_load((^u32)(b)) {
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return false
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}
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a = a[size_of(u32):]
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b = b[size_of(u32):]
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}
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if length & 2 != 0 {
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if intrinsics.unaligned_load((^u16)(a)) != intrinsics.unaligned_load((^u16)(b)) {
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return false
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}
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a = a[size_of(u16):]
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b = b[size_of(u16):]
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}
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if length & 1 != 0 && a[0] != b[0] {
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return false
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}
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return true
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} else {
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if word_length := length >> 2; word_length != 0 {
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for _ in 0..<word_length {
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if intrinsics.unaligned_load((^u32)(a)) != intrinsics.unaligned_load((^u32)(b)) {
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return false
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}
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a = a[size_of(u32):]
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b = b[size_of(u32):]
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}
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}
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length &= 3
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if length != 0 {
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for i in 0..<length {
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if a[i] != b[i] {
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return false
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}
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}
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}
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return true
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}
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*/
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}
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memory_compare :: proc "contextless" (a, b: rawptr, n: int) -> int #no_bounds_check {
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memory_compare :: proc "contextless" (x, y: rawptr, n: int) -> int #no_bounds_check {
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switch {
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case a == b: return 0
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case a == nil: return -1
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case b == nil: return +1
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case x == y: return 0
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case x == nil: return -1
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case y == nil: return +1
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}
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a, b := cast([^]byte)x, cast([^]byte)y
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n := uint(n)
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i := uint(0)
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m := uint(0)
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x := uintptr(a)
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y := uintptr(b)
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n := uintptr(n)
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SU :: size_of(uintptr)
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fast := n/SU + 1
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offset := (fast-1)*SU
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curr_block := uintptr(0)
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if n < SU {
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fast = 0
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}
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for /**/; curr_block < fast; curr_block += 1 {
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va := (^uintptr)(x + curr_block * size_of(uintptr))^
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vb := (^uintptr)(y + curr_block * size_of(uintptr))^
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if va ~ vb != 0 {
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for pos := curr_block*SU; pos < n; pos += 1 {
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a := (^byte)(x+pos)^
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b := (^byte)(y+pos)^
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if a ~ b != 0 {
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return -1 if (int(a) - int(b)) < 0 else +1
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when HAS_HARDWARE_SIMD {
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when ODIN_ARCH == .amd64 && intrinsics.has_target_feature("avx2") {
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m = n / 32 * 32
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for /**/; i < m; i += 32 {
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load_a := intrinsics.unaligned_load(cast(^#simd[32]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[32]u8)&b[i])
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comparison := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(comparison) != 0 {
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sentinel: #simd[32]u8 = u8(0xFF)
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indices := intrinsics.simd_indices(#simd[32]u8)
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index_select := intrinsics.simd_select(comparison, indices, sentinel)
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index_reduce := cast(uint)intrinsics.simd_reduce_min(index_select)
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return -1 if a[i+index_reduce] < b[i+index_reduce] else +1
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}
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}
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}
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}
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for /**/; offset < n; offset += 1 {
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a := (^byte)(x+offset)^
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b := (^byte)(y+offset)^
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if a ~ b != 0 {
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return -1 if (int(a) - int(b)) < 0 else +1
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m = (n-i) / 16 * 16
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for /**/; i < m; i += 16 {
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load_a := intrinsics.unaligned_load(cast(^#simd[16]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[16]u8)&b[i])
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comparison := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(comparison) != 0 {
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sentinel: #simd[16]u8 = u8(0xFF)
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indices := intrinsics.simd_indices(#simd[16]u8)
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index_select := intrinsics.simd_select(comparison, indices, sentinel)
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index_reduce := cast(uint)intrinsics.simd_reduce_min(index_select)
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return -1 if a[i+index_reduce] < b[i+index_reduce] else +1
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}
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}
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// 64-bit SIMD is faster than using a `uintptr` to detect a difference then
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// re-iterating with the byte-by-byte loop, at least on AMD64.
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m = (n-i) / 8 * 8
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for /**/; i < m; i += 8 {
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load_a := intrinsics.unaligned_load(cast(^#simd[8]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[8]u8)&b[i])
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comparison := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(comparison) != 0 {
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sentinel: #simd[8]u8 = u8(0xFF)
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indices := intrinsics.simd_indices(#simd[8]u8)
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index_select := intrinsics.simd_select(comparison, indices, sentinel)
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index_reduce := cast(uint)intrinsics.simd_reduce_min(index_select)
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return -1 if a[i+index_reduce] < b[i+index_reduce] else +1
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}
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}
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for /**/; i < n; i += 1 {
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if a[i] ~ b[i] != 0 {
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return -1 if int(a[i]) - int(b[i]) < 0 else +1
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}
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}
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return 0
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}
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memory_compare_zero :: proc "contextless" (a: rawptr, n: int) -> int #no_bounds_check {
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x := uintptr(a)
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n := uintptr(n)
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n := uint(n)
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i := uint(0)
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m := uint(0)
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SU :: size_of(uintptr)
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fast := n/SU + 1
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offset := (fast-1)*SU
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curr_block := uintptr(0)
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if n < SU {
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fast = 0
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// Because we're comparing against zero, we never return -1, as that would
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// indicate the compared value is less than zero.
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//
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// Note that a zero return value here means equality.
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bytes := ([^]u8)(a)
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if n >= 8 {
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when HAS_HARDWARE_SIMD {
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when ODIN_ARCH == .amd64 && intrinsics.has_target_feature("avx2") {
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scanner32: #simd[32]u8
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m = n / 32 * 32
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for /**/; i < m; i += 32 {
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load := intrinsics.unaligned_load(cast(^#simd[32]u8)&bytes[i])
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ne := intrinsics.simd_lanes_ne(scanner32, load)
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if intrinsics.simd_reduce_or(ne) > 0 {
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return 1
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}
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}
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}
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}
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scanner16: #simd[16]u8
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m = (n-i) / 16 * 16
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for /**/; i < m; i += 16 {
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load := intrinsics.unaligned_load(cast(^#simd[16]u8)&bytes[i])
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ne := intrinsics.simd_lanes_ne(scanner16, load)
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if intrinsics.simd_reduce_or(ne) != 0 {
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return 1
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}
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}
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m = (n-i) / 8 * 8
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for /**/; i < m; i += 8 {
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if intrinsics.unaligned_load(cast(^uintptr)&bytes[i]) != 0 {
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return 1
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}
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}
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}
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for /**/; curr_block < fast; curr_block += 1 {
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va := (^uintptr)(x + curr_block * size_of(uintptr))^
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if va ~ 0 != 0 {
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for pos := curr_block*SU; pos < n; pos += 1 {
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a := (^byte)(x+pos)^
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if a ~ 0 != 0 {
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return -1 if int(a) < 0 else +1
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for /**/; i < n; i += 1 {
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if bytes[i] != 0 {
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return 1
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}
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}
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return 0
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}
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memory_prefix_length :: proc "contextless" (x, y: rawptr, n: int) -> (idx: int) #no_bounds_check {
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switch {
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case x == y: return n
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case x == nil: return 0
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case y == nil: return 0
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}
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a, b := cast([^]byte)x, cast([^]byte)y
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n := uint(n)
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i := uint(0)
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m := uint(0)
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when HAS_HARDWARE_SIMD {
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when ODIN_ARCH == .amd64 && intrinsics.has_target_feature("avx2") {
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m = n / 32 * 32
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for /**/; i < m; i += 32 {
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load_a := intrinsics.unaligned_load(cast(^#simd[32]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[32]u8)&b[i])
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comparison := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(comparison) != 0 {
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sentinel: #simd[32]u8 = u8(0xFF)
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indices := intrinsics.simd_indices(#simd[32]u8)
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index_select := intrinsics.simd_select(comparison, indices, sentinel)
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index_reduce := cast(uint)intrinsics.simd_reduce_min(index_select)
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return int(i + index_reduce)
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}
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}
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}
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}
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for /**/; offset < n; offset += 1 {
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a := (^byte)(x+offset)^
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if a ~ 0 != 0 {
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return -1 if int(a) < 0 else +1
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m = (n-i) / 16 * 16
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for /**/; i < m; i += 16 {
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load_a := intrinsics.unaligned_load(cast(^#simd[16]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[16]u8)&b[i])
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comparison := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(comparison) != 0 {
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sentinel: #simd[16]u8 = u8(0xFF)
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indices := intrinsics.simd_indices(#simd[16]u8)
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index_select := intrinsics.simd_select(comparison, indices, sentinel)
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index_reduce := cast(uint)intrinsics.simd_reduce_min(index_select)
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return int(i + index_reduce)
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}
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}
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return 0
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// 64-bit SIMD is faster than using a `uintptr` to detect a difference then
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// re-iterating with the byte-by-byte loop, at least on AMD64.
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m = (n-i) / 8 * 8
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for /**/; i < m; i += 8 {
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load_a := intrinsics.unaligned_load(cast(^#simd[8]u8)&a[i])
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load_b := intrinsics.unaligned_load(cast(^#simd[8]u8)&b[i])
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comparison := intrinsics.simd_lanes_ne(load_a, load_b)
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if intrinsics.simd_reduce_or(comparison) != 0 {
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sentinel: #simd[8]u8 = u8(0xFF)
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indices := intrinsics.simd_indices(#simd[8]u8)
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index_select := intrinsics.simd_select(comparison, indices, sentinel)
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index_reduce := cast(uint)intrinsics.simd_reduce_min(index_select)
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return int(i + index_reduce)
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}
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}
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for /**/; i < n; i += 1 {
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if a[i] ~ b[i] != 0 {
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return int(i)
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}
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}
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return int(n)
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}
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string_eq :: proc "contextless" (lhs, rhs: string) -> bool {
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