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Add static SIMD support to XXH3 in core:hash/xxhash.

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This uses compile-time features to decide how large of a SIMD vector to
use. It currently has checks for amd64/i386 to size its vectors for
SSE2/AVX2/AVX512 as necessary.

The generalized SIMD functions could also be useful for multiversioning
of the hash procs, to allow for run-time dispatch based on available CPU
features.
This commit is contained in:
Barinzaya
2025-07-31 13:05:08 -04:00
parent 393e00bec3
commit 9d40f371be
4 changed files with 137 additions and 4 deletions
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core/hash/xxhash/xxhash_3_intel.odin
+13
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#+build amd64, i386
package xxhash
import "base:intrinsics"
@(private="file") SSE2_FEATURES :: "sse2"
@(private="file") AVX2_FEATURES :: "avx2"
@(private="file") AVX512_FEATURES :: "avx512dq,evex512"
XXH_NATIVE_WIDTH :: min(XXH_MAX_WIDTH,
8 when intrinsics.has_target_feature(AVX512_FEATURES) else
4 when intrinsics.has_target_feature(AVX2_FEATURES) else
2 when intrinsics.has_target_feature(SSE2_FEATURES) else 1)