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Fix #1834

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This commit is contained in:
gingerBill
2022-07-24 22:46:00 +01:00
parent b28d4b753b
commit 9614ca92f0
1 changed files with 14 additions and 7 deletions
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src/llvm_abi.cpp
+14 -7
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@@ -233,7 +233,7 @@ i64 lb_sizeof(LLVMTypeRef type) {
i64 elem_size = lb_sizeof(elem); i64 elem_size = lb_sizeof(elem);
i64 count = LLVMGetVectorSize(type); i64 count = LLVMGetVectorSize(type);
i64 size = count * elem_size; i64 size = count * elem_size;
return gb_clamp(next_pow2(size), 1, build_context.max_align); return next_pow2(size);
} }
} }
@@ -801,16 +801,23 @@ namespace lbAbiAmd64SysV {
i64 elem_sz = lb_sizeof(elem); i64 elem_sz = lb_sizeof(elem);
LLVMTypeKind elem_kind = LLVMGetTypeKind(elem); LLVMTypeKind elem_kind = LLVMGetTypeKind(elem);
RegClass reg = RegClass_NoClass; RegClass reg = RegClass_NoClass;
unsigned elem_width = LLVMGetIntTypeWidth(elem);
switch (elem_kind) { switch (elem_kind) {
case LLVMIntegerTypeKind: case LLVMIntegerTypeKind:
case LLVMHalfTypeKind: case LLVMHalfTypeKind:
switch (LLVMGetIntTypeWidth(elem)) { switch (elem_width) {
case 8: reg = RegClass_SSEInt8; case 8: reg = RegClass_SSEInt8; break;
case 16: reg = RegClass_SSEInt16; case 16: reg = RegClass_SSEInt16; break;
case 32: reg = RegClass_SSEInt32; case 32: reg = RegClass_SSEInt32; break;
case 64: reg = RegClass_SSEInt64; case 64: reg = RegClass_SSEInt64; break;
default: default:
GB_PANIC("Unhandled integer width for vector type"); if (elem_width > 64) {
for (i64 i = 0; i < len; i++) {
classify_with(elem, cls, ix, off + i*elem_sz);
}
break;
}
GB_PANIC("Unhandled integer width for vector type %u", elem_width);
} }
break; break;
case LLVMFloatTypeKind: case LLVMFloatTypeKind: