Rename simd_eq etc to simd_lanes_eq

This commit is contained in:
gingerBill
2022-05-26 17:36:13 +01:00
parent d0e8a735ba
commit 7092273a8f
5 changed files with 54 additions and 53 deletions
+10 -9
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@@ -205,9 +205,10 @@ simd_shr_masked :: proc(a: #simd[N]T, b: #simd[N]Unsigned_Integer) -> #simd[N]T
simd_add_sat :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_add_sat :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_sub_sat :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_sub_sat :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_and :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_and :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_or :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_or :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_xor :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_xor :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_and_not :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_neg :: proc(a: #simd[N]T) -> #simd[N]T --- simd_neg :: proc(a: #simd[N]T) -> #simd[N]T ---
@@ -222,12 +223,12 @@ simd_clamp :: proc(v, min, max: #simd[N]T) -> #simd[N]T ---
// element-wise: // element-wise:
// false => 0x00...00 // false => 0x00...00
// true => 0xff...ff // true => 0xff...ff
simd_eq :: proc(a, b: #simd[N]T) -> #simd[N]Integer --- simd_lanes_eq :: proc(a, b: #simd[N]T) -> #simd[N]Integer ---
simd_ne :: proc(a, b: #simd[N]T) -> #simd[N]Integer --- simd_lanes_ne :: proc(a, b: #simd[N]T) -> #simd[N]Integer ---
simd_lt :: proc(a, b: #simd[N]T) -> #simd[N]Integer --- simd_lanes_lt :: proc(a, b: #simd[N]T) -> #simd[N]Integer ---
simd_le :: proc(a, b: #simd[N]T) -> #simd[N]Integer --- simd_lanes_le :: proc(a, b: #simd[N]T) -> #simd[N]Integer ---
simd_gt :: proc(a, b: #simd[N]T) -> #simd[N]Integer --- simd_lanes_gt :: proc(a, b: #simd[N]T) -> #simd[N]Integer ---
simd_ge :: proc(a, b: #simd[N]T) -> #simd[N]Integer --- simd_lanes_ge :: proc(a, b: #simd[N]T) -> #simd[N]Integer ---
simd_extract :: proc(a: #simd[N]T, idx: uint) -> T --- simd_extract :: proc(a: #simd[N]T, idx: uint) -> T ---
simd_replace :: proc(a: #simd[N]T, idx: uint, elem: T) -> #simd[N]T --- simd_replace :: proc(a: #simd[N]T, idx: uint, elem: T) -> #simd[N]T ---
+6 -6
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@@ -61,12 +61,12 @@ clamp :: intrinsics.simd_clamp
// element-wise: // element-wise:
// false => 0x00...00 // false => 0x00...00
// true => 0xff...ff // true => 0xff...ff
eq :: intrinsics.simd_eq lanes_eq :: intrinsics.simd_lanes_eq
ne :: intrinsics.simd_ne lanes_ne :: intrinsics.simd_lanes_ne
lt :: intrinsics.simd_lt lanes_lt :: intrinsics.simd_lanes_lt
le :: intrinsics.simd_le lanes_le :: intrinsics.simd_lanes_le
gt :: intrinsics.simd_gt lanes_gt :: intrinsics.simd_lanes_gt
ge :: intrinsics.simd_ge lanes_ge :: intrinsics.simd_lanes_ge
// extract :: proc(a: #simd[N]T, idx: uint) -> T // extract :: proc(a: #simd[N]T, idx: uint) -> T
extract :: intrinsics.simd_extract extract :: intrinsics.simd_extract
+8 -8
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@@ -589,12 +589,12 @@ bool check_builtin_simd_operation(CheckerContext *c, Operand *operand, Ast *call
} }
// Return integer masks // Return integer masks
case BuiltinProc_simd_eq: case BuiltinProc_simd_lanes_eq:
case BuiltinProc_simd_ne: case BuiltinProc_simd_lanes_ne:
case BuiltinProc_simd_lt: case BuiltinProc_simd_lanes_lt:
case BuiltinProc_simd_le: case BuiltinProc_simd_lanes_le:
case BuiltinProc_simd_gt: case BuiltinProc_simd_lanes_gt:
case BuiltinProc_simd_ge: case BuiltinProc_simd_lanes_ge:
{ {
// op(#simd[N]T, #simd[N]T) -> #simd[N]V // op(#simd[N]T, #simd[N]T) -> #simd[N]V
// where `V` is an integer, `size_of(T) == size_of(V)` // where `V` is an integer, `size_of(T) == size_of(V)`
@@ -611,8 +611,8 @@ bool check_builtin_simd_operation(CheckerContext *c, Operand *operand, Ast *call
} }
Type *elem = base_array_type(x.type); Type *elem = base_array_type(x.type);
switch (id) { switch (id) {
case BuiltinProc_simd_eq: case BuiltinProc_simd_lanes_eq:
case BuiltinProc_simd_ne: case BuiltinProc_simd_lanes_ne:
if (!is_type_integer(elem) && !is_type_float(elem) && !is_type_boolean(elem)) { if (!is_type_integer(elem) && !is_type_float(elem) && !is_type_boolean(elem)) {
gbString xs = type_to_string(x.type); gbString xs = type_to_string(x.type);
error(x.expr, "'%.*s' expected a #simd type with an integer, floating point, or boolean element, got '%s'", LIT(builtin_name), xs); error(x.expr, "'%.*s' expected a #simd type with an integer, floating point, or boolean element, got '%s'", LIT(builtin_name), xs);
+12 -12
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@@ -144,12 +144,12 @@ BuiltinProc__simd_begin,
BuiltinProc_simd_max, BuiltinProc_simd_max,
BuiltinProc_simd_clamp, BuiltinProc_simd_clamp,
BuiltinProc_simd_eq, BuiltinProc_simd_lanes_eq,
BuiltinProc_simd_ne, BuiltinProc_simd_lanes_ne,
BuiltinProc_simd_lt, BuiltinProc_simd_lanes_lt,
BuiltinProc_simd_le, BuiltinProc_simd_lanes_le,
BuiltinProc_simd_gt, BuiltinProc_simd_lanes_gt,
BuiltinProc_simd_ge, BuiltinProc_simd_lanes_ge,
BuiltinProc_simd_extract, BuiltinProc_simd_extract,
BuiltinProc_simd_replace, BuiltinProc_simd_replace,
@@ -428,12 +428,12 @@ gb_global BuiltinProc builtin_procs[BuiltinProc_COUNT] = {
{STR_LIT("simd_max"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_max"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_clamp"), 3, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_clamp"), 3, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_eq"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_lanes_eq"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_ne"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_lanes_ne"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_lt"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_lanes_lt"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_le"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_lanes_le"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_gt"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_lanes_gt"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_ge"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_lanes_ge"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_extract"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_extract"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_replace"), 3, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_replace"), 3, false, Expr_Expr, BuiltinProcPkg_intrinsics},
+18 -18
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@@ -1151,22 +1151,22 @@ lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAndValue const
res.value = LLVMBuildSelect(p->builder, cond, arg0.value, arg1.value, ""); res.value = LLVMBuildSelect(p->builder, cond, arg0.value, arg1.value, "");
} }
return res; return res;
case BuiltinProc_simd_eq: case BuiltinProc_simd_lanes_eq:
case BuiltinProc_simd_ne: case BuiltinProc_simd_lanes_ne:
case BuiltinProc_simd_lt: case BuiltinProc_simd_lanes_lt:
case BuiltinProc_simd_le: case BuiltinProc_simd_lanes_le:
case BuiltinProc_simd_gt: case BuiltinProc_simd_lanes_gt:
case BuiltinProc_simd_ge: case BuiltinProc_simd_lanes_ge:
arg1 = lb_build_expr(p, ce->args[1]); arg1 = lb_build_expr(p, ce->args[1]);
if (is_float) { if (is_float) {
LLVMRealPredicate pred = cast(LLVMRealPredicate)0; LLVMRealPredicate pred = cast(LLVMRealPredicate)0;
switch (builtin_id) { switch (builtin_id) {
case BuiltinProc_simd_eq: pred = LLVMRealOEQ; break; case BuiltinProc_simd_lanes_eq: pred = LLVMRealOEQ; break;
case BuiltinProc_simd_ne: pred = LLVMRealONE; break; case BuiltinProc_simd_lanes_ne: pred = LLVMRealONE; break;
case BuiltinProc_simd_lt: pred = LLVMRealOLT; break; case BuiltinProc_simd_lanes_lt: pred = LLVMRealOLT; break;
case BuiltinProc_simd_le: pred = LLVMRealOLE; break; case BuiltinProc_simd_lanes_le: pred = LLVMRealOLE; break;
case BuiltinProc_simd_gt: pred = LLVMRealOGT; break; case BuiltinProc_simd_lanes_gt: pred = LLVMRealOGT; break;
case BuiltinProc_simd_ge: pred = LLVMRealOGE; break; case BuiltinProc_simd_lanes_ge: pred = LLVMRealOGE; break;
} }
if (pred) { if (pred) {
res.value = LLVMBuildFCmp(p->builder, pred, arg0.value, arg1.value, ""); res.value = LLVMBuildFCmp(p->builder, pred, arg0.value, arg1.value, "");
@@ -1176,12 +1176,12 @@ lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAndValue const
} else { } else {
LLVMIntPredicate pred = cast(LLVMIntPredicate)0; LLVMIntPredicate pred = cast(LLVMIntPredicate)0;
switch (builtin_id) { switch (builtin_id) {
case BuiltinProc_simd_eq: pred = LLVMIntEQ; break; case BuiltinProc_simd_lanes_eq: pred = LLVMIntEQ; break;
case BuiltinProc_simd_ne: pred = LLVMIntNE; break; case BuiltinProc_simd_lanes_ne: pred = LLVMIntNE; break;
case BuiltinProc_simd_lt: pred = is_signed ? LLVMIntSLT :LLVMIntULT; break; case BuiltinProc_simd_lanes_lt: pred = is_signed ? LLVMIntSLT :LLVMIntULT; break;
case BuiltinProc_simd_le: pred = is_signed ? LLVMIntSLE :LLVMIntULE; break; case BuiltinProc_simd_lanes_le: pred = is_signed ? LLVMIntSLE :LLVMIntULE; break;
case BuiltinProc_simd_gt: pred = is_signed ? LLVMIntSGT :LLVMIntUGT; break; case BuiltinProc_simd_lanes_gt: pred = is_signed ? LLVMIntSGT :LLVMIntUGT; break;
case BuiltinProc_simd_ge: pred = is_signed ? LLVMIntSGE :LLVMIntUGE; break; case BuiltinProc_simd_lanes_ge: pred = is_signed ? LLVMIntSGE :LLVMIntUGE; break;
} }
if (pred) { if (pred) {
res.value = LLVMBuildICmp(p->builder, pred, arg0.value, arg1.value, ""); res.value = LLVMBuildICmp(p->builder, pred, arg0.value, arg1.value, "");