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Rename simd bitwise operations from intrinsics.simd_and to intrinsics.simd_bit_and etc

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gingerBill
2023-09-28 16:42:08 +01:00
parent 2ac463f003
commit 63f755554b
5 changed files with 28 additions and 28 deletions
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core/intrinsics/intrinsics.odin
+4 -4
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@@ -215,10 +215,10 @@ simd_shr_masked :: proc(a: #simd[N]T, b: #simd[N]Unsigned_Integer) -> #simd[N]T
simd_add_sat :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_add_sat :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_sub_sat :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_sub_sat :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_and :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_bit_and :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_or :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_bit_or :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_xor :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_bit_xor :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_and_not :: proc(a, b: #simd[N]T) -> #simd[N]T --- simd_bit_and_not :: proc(a, b: #simd[N]T) -> #simd[N]T ---
simd_neg :: proc(a: #simd[N]T) -> #simd[N]T --- simd_neg :: proc(a: #simd[N]T) -> #simd[N]T ---
core/simd/simd.odin
+4 -4
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@@ -77,10 +77,10 @@ shr_masked :: intrinsics.simd_shr_masked
add_sat :: intrinsics.simd_add_sat add_sat :: intrinsics.simd_add_sat
sub_sat :: intrinsics.simd_sub_sat sub_sat :: intrinsics.simd_sub_sat
and :: intrinsics.simd_and bit_and :: intrinsics.simd_bit_and
or :: intrinsics.simd_or bit_or :: intrinsics.simd_bit_or
xor :: intrinsics.simd_xor bit_xor :: intrinsics.simd_bit_xor
and_not :: intrinsics.simd_and_not bit_and_not :: intrinsics.simd_bit_and_not
neg :: intrinsics.simd_neg neg :: intrinsics.simd_neg
src/check_builtin.cpp
+4 -4
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@@ -471,10 +471,10 @@ gb_internal bool check_builtin_simd_operation(CheckerContext *c, Operand *operan
// Integer only // Integer only
case BuiltinProc_simd_add_sat: case BuiltinProc_simd_add_sat:
case BuiltinProc_simd_sub_sat: case BuiltinProc_simd_sub_sat:
case BuiltinProc_simd_and: case BuiltinProc_simd_bit_and:
case BuiltinProc_simd_or: case BuiltinProc_simd_bit_or:
case BuiltinProc_simd_xor: case BuiltinProc_simd_bit_xor:
case BuiltinProc_simd_and_not: case BuiltinProc_simd_bit_and_not:
{ {
Operand x = {}; Operand x = {};
Operand y = {}; Operand y = {};
src/checker_builtin_procs.hpp
+8 -8
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@@ -139,10 +139,10 @@ BuiltinProc__simd_begin,
BuiltinProc_simd_add_sat, // saturation arithmetic BuiltinProc_simd_add_sat, // saturation arithmetic
BuiltinProc_simd_sub_sat, // saturation arithmetic BuiltinProc_simd_sub_sat, // saturation arithmetic
BuiltinProc_simd_and, BuiltinProc_simd_bit_and,
BuiltinProc_simd_or, BuiltinProc_simd_bit_or,
BuiltinProc_simd_xor, BuiltinProc_simd_bit_xor,
BuiltinProc_simd_and_not, BuiltinProc_simd_bit_and_not,
BuiltinProc_simd_neg, BuiltinProc_simd_neg,
BuiltinProc_simd_abs, BuiltinProc_simd_abs,
@@ -442,10 +442,10 @@ gb_global BuiltinProc builtin_procs[BuiltinProc_COUNT] = {
{STR_LIT("simd_add_sat"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_add_sat"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_sub_sat"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_sub_sat"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_and"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_bit_and"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_or"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_bit_or"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_xor"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_bit_xor"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_and_not"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_bit_and_not"), 2, false, Expr_Expr, BuiltinProcPkg_intrinsics},
{STR_LIT("simd_neg"), 1, false, Expr_Expr, BuiltinProcPkg_intrinsics}, {STR_LIT("simd_neg"), 1, false, Expr_Expr, BuiltinProcPkg_intrinsics},
src/llvm_backend_proc.cpp
+8 -8
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@@ -1345,15 +1345,15 @@ gb_internal lbValue lb_build_builtin_simd_proc(lbProcedure *p, Ast *expr, TypeAn
} }
} }
break; break;
case BuiltinProc_simd_and: case BuiltinProc_simd_bit_and:
case BuiltinProc_simd_or: case BuiltinProc_simd_bit_or:
case BuiltinProc_simd_xor: case BuiltinProc_simd_bit_xor:
case BuiltinProc_simd_and_not: case BuiltinProc_simd_bit_and_not:
switch (builtin_id) { switch (builtin_id) {
case BuiltinProc_simd_and: op_code = LLVMAnd; break; case BuiltinProc_simd_bit_and: op_code = LLVMAnd; break;
case BuiltinProc_simd_or: op_code = LLVMOr; break; case BuiltinProc_simd_bit_or: op_code = LLVMOr; break;
case BuiltinProc_simd_xor: op_code = LLVMXor; break; case BuiltinProc_simd_bit_xor: op_code = LLVMXor; break;
case BuiltinProc_simd_and_not: case BuiltinProc_simd_bit_and_not:
op_code = LLVMAnd; op_code = LLVMAnd;
arg1.value = LLVMBuildNot(p->builder, arg1.value, ""); arg1.value = LLVMBuildNot(p->builder, arg1.value, "");
break; break;